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Article

Matrix Extraction of Parasitic Parameters and Suppression of Common-Mode Conducted Interference in a PMSG-IDOS Rectifier Module

Ministry of Education, Engineering Research Center of Automotive Electronics Drive Control and System Integration, Harbin University of Science and Technology, Harbin 150080, China
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(2), 206; https://doi.org/10.3390/electronics9020206
Submission received: 25 December 2019 / Revised: 17 January 2020 / Accepted: 21 January 2020 / Published: 22 January 2020
(This article belongs to the Section Systems & Control Engineering)

Abstract

:
The rectifier module is the key part of a permanent magnet synchronous generator integrated DC output system (PMSG-IDOS) with low-voltage and high-current. The high-speed switching device of the rectifier module is the main source of electromagnetic interference (EMI). In this paper, the matrix extraction method is proposed to establish an accurate conducted interference model, and a 3D crimped SiC MOSFET model is established via Ansoft Q3D simulation software. The matrix of the parasitic parameters between poles of the MOSFET is simulated to extract the accurate parasitic parameters. Furthermore, a high-precision conducted interference simulation model of the pulse width modulation (PWM) rectifier system is established. Then, the space vector pulse width modulation (SVPWM) jump-backward control strategy based on the three-phase four-leg structure is proposed to suppress the common-mode interference, and the comparison with other two methods is carried out based on this model. Finally, the experimental platform of a 5 V/1000 A synchronous generator with rectifier is constructed, and conducted interference is tested in accordance with the simulated results. It demonstrates the accuracy of the model with parasitic parameters based on the matrix extraction method. This paper provides a more simple and effective reference method for the prediction study of conducted interference in power converter systems. After comparing the simulation results with the experimental results, it is proven that the SVPWM jump-backward control strategy based on the three-phase four-leg structure can ensure the output balance of the bridge leg and allow the common-mode (CM) interference to reach the ideal state.

1. Introduction

The permanent automotive magnet synchronous generator integrated direct current (DC) output system has the advantages of a low voltage and high-power output, which reduces harmonic loss, improves generator efficiency, strengthens fault tolerance, improves reliability, and allows for direct output without filtering. A low-voltage, high-current rectifier module is the core of the permanent magnet synchronous generator integrated DC output system (PMSG-IDOS). Electromagnetic interference (EMI) is caused by the parasitic parameters of switching devices in the module, and directly affects the DC output quality of the system. To extract the parasitic parameters of switch module packaging, Aleksandr, V. and Yang, L.Y. established the equivalent models of parasitic parameters [1,2]; however, these models are too simple, and the simulation waveforms are quite different from the experimental waveforms. Based on the impedance measurement method, Lobsiger, Y. established the equivalent circuit of the parasitic parameters of a half-bridge module; however, the values of some parameters are only valid with certain assumptions [3]. Liu, Z. proposed the finite element analysis method, which uses the differential equation method; however, it imposes a cutoff boundary condition when the open domain problems are calculated [4]. Hiroki, whose work is based on the original finite element interpolation function multiplied by the attenuation function, proposed an infinite element method [5]. The infinite element method can satisfy the Dirichlet boundary condition at infinity, which is a good supplement to the finite element method. However, the processing speed and hardware requirements of this method are beyond the developmental capacity of a computer. A non-linear model based on bias voltage greater than zero data was proposed by Yu, P.P. [6]. It can accurately describe the characteristics of MOSFET devices in saturated and threshold regions. However, due to the lack of alternating current (AC) and DC data in the reverse and cut-off regions, it is difficult to validate the characteristics of MOSFET devices in this region.
In recent years, many scholars have studied the conducted EMI characteristics of the PWM rectifier system. In the work by Jiang, B.J., a model of the PWM rectifier system was established via simulation software [7,8]. The model was validated by both frequency domain and time domain methods. However, because these models do not take into account the high-frequency model of the interference source, they are only suitable for the low frequency band of 1MHz. In previous studies [9,10,11,12], both methods were used to establish circuit models to analyze the conducted EMI mechanism and predict the EMI spectrum. However, none of these methods involved the extraction of the parasitic parameters of interference propagation channels. Moreau, M.X. and Lai, J.S. built a system model combining both experimental testing and theoretical calculations [13,14]. However, the calculation process of this method was slow, and there were many assumptions and simplifications; thus, it cannot reflect the influences of real parasitic parameters caused by high-frequency interference.
There are two traditional methods of suppressing conducted EMI, namely suppression of interference source and suppression of interference path. In the work by Hamidreza, G.D., the EMI generated by different control strategies of the same system was first analyzed, and a control strategy and modulation algorithm that could effectively suppress EMI generated by the interference source were then found [15]. However, the workload of this method is too large, and it is not suitable for products that have entered the market. Diogo, V.J and Rui, E.A. added an EMI filter to suppress the conducted EMI [16]. This method can result in a significant attenuation of both low- and high-frequency EMI; however the volume of the EMI filter will increase the weight and cost of the converter, and the active components will increase the additional driving circuit, thereby increasing the complexity of the control of the converter.
In this paper, the low-voltage, high-current rectifier module in PMSG-IDOS was used as a research object. Based on the matrix extraction method, the parasitic parameters of each pole and between poles in the package module were extracted by the commercial software Ansoft Q3D. Based on the extracted parasitic parameters, a high-precision conducted EMI simulation model of a PWM rectifier system was established by MATLAB. Finally, the validity of the extraction of the parasitic parameters of MOSFET and the accuracy of the established high-precision conducted EMI model of the PWM rectifier system were verified by experiments. Additionally, a two-stage filter, a three-phase four-bridge leg, and a spread spectrum technology were used to have the common mode interference of the system satisfy the GB/T 17626 electromagnetic compatibility (EMC) test standard.

2. Methods

2.1. PMSG-IDOS

PMSG-IDOS is based on a technology of only half-turn coils in each phase, and a magnetic field generated by a single conductor is used to replace the magnetic field generated by multi-turn coils. An asymmetric, multi-three-phase permanent magnet synchronous generator was used to realize electromechanical energy conversion. The modular rectifier and a high-current confluence disk were combined organically, and a new type of low-voltage, high-current DC power generation system of over 5 V/1000 A was realized.
The multi-three-phase, high-current, DC-powered, permanent magnet synchronous generation system of the PMSG-IDOS is shown in Figure 1. It consisted of a permanent magnet synchronous generator with half-turn coils and two confluence disks. The generator rotor was composed of six pairs of poles. There were 54 slots in the stator core, and insulated half-turn coils were embedded in each slot as one phase. The three-phase stator windings were installed at a 120-degree electric angle, and there was π/9 degree electric angle of mutual difference between adjacent windings, thus forming a nine-phase asymmetric set of windings which is referred to as the three-three-phase generator. To improve development efficiency, a test system consisting of 1/6 stator windings and the entire rotor was adopted in the early stage of development. The 1/6 stator windings, that is, nine stator slots could cover angles in a complete 360-degree electric cycle, and the coils were placed at 60-degree space angles. Therefore, the performance of the entire motor system can be estimated by the performance of angles within one electric cycle. The prototype is shown in Figure 2.
The introduction of the confluence disc reduced the capacity requirement of filter capacitance and further reduced the volume and weight of the system. The integrated structure of the new generator and rectifier with controllers can, by conservative estimates, increase the power density of the permanent magnet synchronous generator system by more than 10%. However, because each confluence disc of the system consisted of 54 rectifier modules, there were 108 MOSFETs in this limited space. The EMI caused by the parasitic parameters of the MOSFET directly affected the DC output quality of the system. In this study, a matrix method based on the structural characteristics of MOSFET is proposed to extract the parasitic parameters of the MOSFET package. The corresponding high-frequency parasitic parameters model is then established, providing an accurate reference for further research on the suppression scheme.

2.2. Extraction of the Parasitic Parameters of Each Pole and Between Poles for MOSFET Packaging

The matrix extraction method proposed in this paper aims to get at the parasitic parameters of MOSFET. The central idea of matrix extraction method is to use Green’s formula, that is, to convert the volume division of the region into the area division on the boundary, so as to reduce the number of discrete grids, reduce the difficulty of grid division, and simplify the calculation. There are natural advantages to dealing with infinite or semi-infinite domain problems. They eliminate the limitations of the existing methods that cannot solve infinite domain problems and handle large amounts of calculation. There are three main parts of the calculation process of the matrix extraction method. First, the boundary conditions and node information are obtained by discretizing the structure boundary. Then, the influence coefficients of each discrete element are solved by the boundary integral equation to form the influence coefficient matrix. Finally, the physical quantities at the boundary nodes are obtained by solving the matrix equations with the boundary conditions. Figure 3 presents a schematic diagram of the relationship between two points, where P and Q points are a collocation point and integration point, respectively.
From Figure 1, the following boundary integral equations can be obtained:
1 2 P ( r p ) = [ G ( r P , r Q ) P ( r Q ) n Q P ( r P , r Q ) n Q P ( r Q ) ] d S
Since the external normal vector has the following relationship with the particle velocity:
P ( r Q ) n Q = j ρ ω v n ( r Q )
Equation (1) is rewritten as follows:
1 2 P ( r p ) = [ j ρ ω v n ( r Q ) G ( r P , r Q ) + P ( r P , r Q ) n Q P ( r Q ) ] d S
Among them, δ/δnQ is the external normal derivative of the function with respect to Q point, and G is the basic solution of Helmholtz equations in three-dimensional space. That is, Green’s function can be written as follows:
G ( r P , r Q ) = exp ( j k r P Q ) / 4 π r P Q
where rPQ is the distance between points P and Q on the boundary. In discretizing Equation (3) by meshing the boundary, the following system of linear equations can be obtained:
[ H + I ] { P } = [ G ] { U }
Among them, the matrix H, I, G is a coefficient matrix of N×N order, N is the total number of discrete boundary nodes, and the vectors {P}, {U} are the column vectors composed of the vector of each node and the velocity of the particle, respectively. The following is the element calculation formula:
I i j = 1 2 δ i j
H i j = Γ N j ( r Q ) G ( r i   , r Q ) n Q d S Q
G i j = j ω ρ 0 Γ N j ( r Q ) G ( r i   , r Q ) d S Q
Among them, Kronecker’s Delta function, Ri, is the position vector of the first node, and Nj is the interpolation function of node j:
P ( Q ) = j = 1 N N j ( r Q ) P j
The boundary conditions of the two nodes (i.e. impedance boundary (P/vn is known), velocity boundary (vn is known), and rigid boundary (normal particle velocity vn is 0)) are shown in Figure 3. These three boundary conditions can be transformed into the form of [A] {X} = {B} quotation by substituting Equation (5). By solving linear equations, physical quantities at all boundary nodes can be obtained.
This paper studied the crimped SiC MOSFET. Compared with the traditional semiconductor devices, the crimped SiC MOSFET has the following advantages: (1) it has smaller internal parasitic inductance and higher reliability because there is no bonding wire; (2) it can realize double-sided heat dissipation; (3) it allows for an easy series and parallel connection [17]. The package module of MOSFET is a 12-layer structure consisting of an upper substrate, a bottom plate, a top plate, an intermediate layer substrate, and a SiC MOSFET chip. The MOSFET packaging module is a typical half-bridge stacked structure. In this study, the CPM2–1200–0025B SiC MOSFET chip was used as a research object, and its parasitic circuit topology was analyzed due to its advantages of ultra-high system efficiency, power density, system switching frequency, and ultra-low cooling demand.
The schematic diagram of the MOSFET topology with parasitic parameters [18] is shown in Figure 4. Ld, Ls, and Lg, and Rd, Rs, and Rg, are the parasitic inductance and resistance on the drain, source, and gate, respectively. Cgs and Cgd are gate-source capacitors and gate-drain capacitors, respectively, while Cds identifies drain-source parasitic capacitors [19]. The parasitic parameters of the circuit itself provide abundant propagation paths for common-mode (CM) interference, which results in the CM current flowing into and affecting other systems through the parasitic parameters of the ground potential. Therefore, the harm of CM interference is much greater than that of the differential-mode (DM) interference. CM interference is the main component and suppression object of EMI in the PWM system [20]. Additionally, encapsulation of parasitic capacitance is the main cause of CM interference [21]. In the subsequent analysis of the simulation model of high-precision conducted interference in the PWM rectifier system, emphasis was placed on CM interference, and the parasitic parameters of MOSFET only considered the parasitic capacitance.
A 12-layer crimped SiC MOSFET 3D packaging model was drawn in Ansoft Q3D according to the size, structure, and material properties provided in the detailed manual of MOSFET (see Figure 5). In this section, the grid parasitic resistance and parasitic inductance at an extraction frequency of 100 kHz were used as examples. The source and sink of the simulation model was set as shown in Figure 6. Figure 7 presents the solutions of parasitic resistance and inductance under AC excitation. Similarly, according to the previously discussed method, the parasitic parameter values at 1 kHz, 10 kHz, and 200 kHz were obtained, as exhibited in Table 1.
To verify the validity of the simulation data, an Agilent 4263B LCR meter was used to measure the parasitic parameters of each pole and between poles in the package module. The measured data at 1 kHz, 10 kHz, 100 kHz, and 200 kHz are listed in Table 1. It can be seen that the simulation results are very stable at different frequencies, the experimental values are affected by various parasitic parameters, and the results are not completely consistent at different frequencies. At 100 kHz, the error between the simulation and experimental results is the smallest. The maximum errors between the simulation and experimental results of parasitic capacitance, inductance, and resistance are 9 pF, 1.4 nH, and 5 μΩ, respectively. It is evident that the errors of the extraction results are small. Therefore, the matrix method proposed in this paper is feasible for the extraction of parasitic parameters of device packaging.

3. Results and Discussion

3.1. High Precision Conducted Interference Simulation Model

In order to simplify the process of conducting EMI research, one three-phase set of stator windings and the corresponding three-phase rectifier were taken as a module to be analyzed and studied. Three parallel modules can reflect the characteristics of PMSG-IDOS about complete 360-degree electric angle. Because the CM interference of a three-phase rectifier bridge mainly originates from the DC side [22], line impedance stabilizing network (LISN) was required in a series on the DC side to detect the CM-conducted interference spectrum for the system. Therefore, the high-precision-conducted EMI simulation model of the single module was established, as shown in Figure 8. The AC side is a three-phase permanent magnet synchronous generator. The capacitor C1 on the DC output side plays the role of DC energy storage and filtering, and R1 is the load of DC side. The simulation model included four sub-modules, including a three-phase permanent magnet synchronous generator, a three-phase bridge converter topology, a double closed-loop control system, and an space vector pulse width modulation (SVPWM) signal output module.
The multi-three-phase permanent magnet synchronous generator model established in Ansoft Maxwell is shown in Figure 9. The three-phase voltage data generated by this model was saved in an Excel data format and then imported as a generator model into the simulation environment of MATLAB using the unique Form Spreadsheet in Simulink software (see Figure 10). In fact, the three-phase output of the simulated multi-three-phase permanent magnet generator of Ansoft Maxwell was the input of the high-precision conducted EMI simulation model of MATLAB.
The three-phase bridge converter module is shown in Figure 11. The MOSFET in the figure was an equivalent circuit with parasitic parameters. Based on the conclusion reached in Section 2 of this paper, parasitic capacitance was the main cause of CM interference. The operating frequency of the system was 100 kHz, and the parasitic capacitance parameters were set to the corresponding parasitic capacitance values listed in Table 1. The structure of this rectifier can better predict the real situation of common mode interference.
The topological model of MOSFET adds parasitic capacitance of drain to heat sink on the basis of adding parasitic parameters of package itself as shown in Figure 11. The parasitic capacitance provided a coupling loop for the propagation of the CM interference. The total parasitic capacitance CP between module and heat sink can be calculated using the following equation [23]:
C P = ε 0 ε r A / d
where ɛ0ɛr is the dielectric constant of the insulating medium (silica gel is 8.5), A is the contact area between module and heat sink, and D is the thickness of the insulating medium. In this paper, the base area of rectifier bridge was A = 62 × 122 = 7564 mm2, d = 0.3 mm, and it could be obtained in the following way:
C i p = 1 6 ε 0 ε r A d = 316 p F
The calculation and experimental comparison curves of the impedance analysis of the drain of MOSFET and the heat sink are presented in Figure 12. The experimental and computational results reveal that the maximum error occurred at the operating frequency of 10 kHz, while the error was relatively smaller at the operating frequency of 100 kHz. The impedance curves calculated by the model were basically consistent with the experimental results in the range of 1 k to 100 M, which proves that the established high-frequency interference simulation model is accurate to some extent.
The double closed-loop controlled system module includes an inner current loop and an outer voltage loop, as shown in Figure 13. First, Vdc1 and Vo were subtracted to obtain the difference. The difference value was then adjusted by PI to obtain the required Id as the given value of the q-axis current. Then, Id was converted to Id of the dq-axis through abc-dq transformation, and Iq was used as current feedback. Id and Iq of the dq-axis were then compared with the given Id and Iq. Finally, the comparison results were adjusted by PI to obtain the required Vd and Vq, after which Vabc_c was obtained via dq-abc transformation.
SVPWM has the advantages of simple control, digital realization and high voltage utilization. The output model of the SVPWM signal is shown in Figure 14. The output Vabc_c of the double closed-loop module is the input of the module of the subsequent model. Six control signals of switches are outputs from Vabc_c and from the triangle wave via logic circuit.
First, the parasitic parameter simulation model established by the infinite element method was used, and the CM of the AC side and DC side of the rectifier were obtained as shown in Figure 15a,b. It can be seen that the CM interference of the AC side and the DC side of the whole system were mainly concentrated in the low-frequency band, obviously not the CM interference. The simulation results were far removed from an actual situation. Through the simulation analysis of a single three-phase rectifier module considering the parasitic parameters of MOSFET, the common mode interference of AC and DC sides of the rectifier system were compared as shown in Figure 15c,d, and its strength was found to exceed the GB/T 17626 international EMC test standard. The strongest CM interference was concentrated near the switching frequency, and other peaks appeared at the switching frequency multiplication. The CM interference decreased rapidly near other frequencies. This demonstrates that the CM interference source of the system is the high-speed switch function of MOSFET, and the parasitic capacitance of MOSFET could provide a rich propagation path for CM interference transmission.
Three rectifier modules of PMSG-IDOS corresponded to nine stator windings spaces of the synchronous generator that can form a 360-degree electric angle space. The high-precision conducted interference model of the system with three rectifier modules connected in parallel on the same load is shown in Figure 16. Three-phase rectifier modules of 1, 2, and 3 were the sub-modules encapsulated by the same three-phase rectifier module as shown in Figure 8.
The CM interference on DC-side of three parallel modules is shown in Figure 17. The conducted interference of the entire system was mainly concentrated in the range of 5 MHz-30 MHz, which is clearly the frequency band of CM interference. This paper focuses on the corresponding analysis and CM interference suppression.

3.2. Suppression of CM Interference

Based on the established EMI model, three methods were utilized to complete the CM interference suppression of three-phase rectifier, and their performances were compared. First, the EMI filter suppression method was used to suppress the interference source. Then, the PWM technology strategy based on spread spectrum technology was used to change the control strategy. Finally, the three-phase four-leg suppression method was used to change the topology of the rectifier.

3.2.1. EMI Filter Design

Based on the results of the completed CM interference simulations of the three parallel high-precision interference models, it can be seen that the maximum interference exceeding the standard was about 10 dBμv. Therefore, the insertion loss of the designed EMI filter was at least 10 dB in the frequency range of 150 kHz to 30 MHz. In this study, the stages of the multi-stage filter were mainly based on the minimum reactance design. This can minimize the weight, cost, and volume of the designed filter. The criteria for determining the best stages are listed in Table 2.
In Table 2, F = 2 π f L M C M , where f is the lower limit frequency of filtering. For conducted EMI, the lower limit frequency was 150 kHz. LMCM represents the maximum value of total filtering reactance, which can be obtained using the following equation:
L M C M = ( Δ U I g ) / ( U M I M ω M 2 )
where Δ U is the maximum voltage drop of both ends of the filter under the grid ω M (50 Hz), U M is the rated voltage, In is the rated current, and Ig is the leakage current. For the rectifier, Ig ≤ 3.5 mA. Bringing each parameter into Equation (12), allows to calculate LMCM = 108 μHμF, which in turn allows to calculate F = 92. A two-stage filter can be designed using this information in combination with the data in Table 2. However, considering the volume and cost of the filter, the one designed for this paper was a two-stage filter.
Combined with the original EMI signal result in Figure 15, it becomes evident that the CM EMI is the main component of the EMI signal. Due to the mutual conversion of the DM signal and CM signal when the equipment is running, the CM filter circuit generally adopts an LC (L for inductance, C for capacitance)-type filter circuit, and the DM filter generally adopts a π-type filter circuit according to practical experience, so the design of the two-stage filter was based on the combination of LC-type and π-type filter circuits. The source impedance and load impedance were both considered to be 50 Ω, which is convenient for improvement. The specific circuit structure is shown in Figure 18. In the figure, L1 and L2 represent CM choke coils, Cy1-y6 represent CM capacitance, Ld1, Ld2, and Ld3 represents DM inductance, and Cx1-x9 represents DM capacitance.
Based on the previous analysis, the insertion loss of the designed EMI filter is at least 10 dB for suppressing EMI generated by rectifier, and the frequency range of the conducted EMI study is 150 kHz to 30 MHz, so the corner frequency is (150 kHz, 10 dB). Insertion loss (IL) asymptotes have been plotted by researchers [24], as shown in Figure 19. A parallel line of insertion loss diagonal family was made at the crossing point (150 kHz, 10 dB) in Figure 19, and the intersection of the parallel line and frequency axis (horizontal axis) was obtained. The frequency value corresponding to the intersection point was the turning frequency corresponding to the required filter. According to the above analysis, the corner frequency of LC-type filter was fc = 147.4 kHz, and that of π-type filter was fc = 146.7 kHz.
According to Ig ≤ 3.5 mA, the maximum value of CM capacitance of LC-type filter can be calculated as follows:
C y m a x = I g / ( 2 π f m U m ) = 9.8 n F
In this paper, the CM capacitance was selected as Cy1-y6 = 4.7 nF. At the same time, other parameters were calculated as follows: L1 = L2 = 31.94 mH, Ld1-d3 = 0.56 mH, and C x 1 – x 9 = 3.3 μF. In each module of the three parallel simulation modules, a two-stage EMI filter was added. After setting the parameters and running the simulation, the CM interference results of the three parallel simulation modules are shown in Figure 20. It can be seen that the CM interference meets the requirements of GB / T17626 for the amplitude of conducted EMI generated by the rectifier with a certain safety margin.

3.2.2. Suppression Method of PWM Technology Based on Spread Spectrum Technology

Spread spectrum technology refers to the controllable modulation of a signal, i.e., the signal energy is extended from a narrow band to a wide band. The peak amplitude of the signal spectrum is then reduced. A switching frequency of 100 kHz, as an example, has a high spectrum peak. If the spectrum width of the signal frequency is expanded, its spectrum peak will be significantly reduced, as shown in Figure 21.
Figure 22 presents the mechanism for generating SVPWM waveforms via the suppression method of the spread spectrum technology. First, a modulated triangle wave must be obtained by modulating a low-frequency sawtooth to a high-frequency sawtooth. The PWM signal is then generated by using this as a carrier wave. Finally, it works as the input of the rectifier.
Each rectifier module in the three parallel simulation modules adopted this suppression method. The CM interference simulation waveform of the three parallel modules obtained is shown in Figure 23. From the simulation results, it can be seen that this method has a good suppression effect of the harmonic amplitude at the switching frequency and the frequency multiplication. In other words, the SVPWM based on spread spectrum technology can suppress EMI caused by high switching frequency.

3.2.3. SVPWM Jump-Backward Control Strategy Based on Three-Phase Four-Leg Structure

The CM voltage originates primarily from the unbalanced output voltage of the three-phase three-leg rectifier. To eliminate the circuit asymmetry, the circuit topology must be changed. In this paper, a type of SVPWM jump-backward control strategy based on three-phase four-leg structure is proposed to reduce the CM voltage of the three-phase three-leg rectifier caused by circuit asymmetry. The structure of the three-phase four-leg rectifier is characterized by the addition of an auxiliary leg to the conventional three-phase three-leg. This makes the three-phase rectifier circuit symmetrical to the ground EMF.
SVPWM jump-backward control strategy can greatly reduce the CM voltage of rectifier output and break through the limit range of the modulation index in the original SVPWM strategy of three-phase four-leg rectifier, which can be applied to all occasions [25]. Therefore, this method was selected in this paper. The principle of SVPWM jump-backward control strategy was as follows. Once the zero state was about to appear, that is, the A-leg of A, B and C three legs was about to turn upper into lower, and the B and C two legs were in the same state (before the zero state was about to appear), the current state of A-leg would be locked, and the turning of A-legs would be postponed until one of B and C legs changed state, as shown in Figure 24.
The process of SVPWM jump-backward control is very simple, and can be easily realized by software control or hardware circuits. The fourth leg was controlled according to Equation (14). Based on SVPWM carrier phase-shift control technology, the SVPWM control strategy adopts the jump-backward control method. The SVPWM jump-backward control strategy ensures that the output of the four legs of the rectifier can be balanced and the zero-state can be avoided completely to suppress the CM interference.
S d = S a S b S c
The simulation model of the three-phase four-leg rectifier created in MATLAB is shown in Figure 25. The MOSFET in the figure is an equivalent circuit with parasitic parameters. The operating frequency of the system is 100 kHz, and the parasitic capacitance parameters are set to the corresponding values listed in Table 1.
Each rectifier module in the three parallel modules adopts the SVPWM jump-backward control strategy based on three-phase four-leg structure. The CM voltage of the three parallel modules is presented in Figure 26. It can be seen in comparison with the CM voltage of the three-phase three-bridge rectifier in Figure 17, the CM voltage of the four-leg is close to that of the three-leg in the low-frequency, while in the high frequency, the CM voltage of the four-leg is obviously suppressed, and the peak value is reduced from 55 dB of the three-leg to about 42 dB, and the CM voltage of the main frequency band is below 25 dB, so the CM interference is significantly suppressed.

3.2.4. Comparative Analysis of Suppression Methods

After comparing the simulation results of the three CM interference suppression methods, it can be concluded that SVPWM jump-backward control strategy based on three-phase four-leg structure presents the best suppression effect. To compare the three methods better, the total harmonic distortion (THD) of the DC output waveform under the three methods was tested as shown in Figure 27. It can be seen that the SVPWM jump-backward control strategy based on a three-phase four-leg structure has the minimum THD value and the minimum first, third, fifth, and seventh harmonics. This demonstrates that this method is more practical than the other two.
Additionally, disturbance was added in the three parallel modules that adopted the SVPWM jump-backward control strategy based on the three-phase four-leg structure, and the DC output results are presented in Figure 30. After 0.05 seconds, the power-on process of the system reached the steady state, and the output current and voltage were 500 A and 5 V, respectively, and the output effect of low-voltage and high-current was realized. When the simulation ran for 0.2 seconds, the load of the system suddenly changed, and the output current of the system increased rapidly. The new steady state of the system with 1000 A output current after a 0.025 seconds of adjustment time is shown in Figure 28a. The output voltage of the system decreased about 1V and reached the steady state again after 0.025 seconds of adjustment time as shown in Figure 28b. The output voltage of the system can quickly return to the steady state, and the output current can quickly reach the new steady state without overshooting, which proves that the three parallel modules adopting the SVPWM jump-backward control strategy based on three-phase four-leg structure exhibit good dynamic control performance.

3.3. Verification of the Experimental Result

In this study, the PMSG-IDOS experimental platform (Figure 29) was utilized as a research object to verify the proposed high-precision conducted EMI simulation model of the SVPWM rectifier system, and corresponding experiments were completed. The diesel engine drove the generator to rotate coaxially, and the controller realized SVPWM control of the power-switch devices.
An AFJ ER55 spectrum receiver was used to complete the conducted EMI test on the PMSG-IDOS experimental platform. The CM interference of single module on DC side is shown in Figure 30a, and that of the three modules on DC side is shown in Figure 30b. It can be seen that the CM interference of the latter is greater than that of the former, and the CM interference of both exceeds the GB/T 1762 EMC test standard. In the entire frequency band, the simulation spectrum and the experimental spectrum are found to be basically the same near the main harmonic and harmonic frequencies, which can meet the requirements of the engineering design. This proves that the method proposed in this paper based on matrix extraction for the determination of parasitic parameters to build the conducted EMI model has good accuracy.
The CM interference on DC side of PMSG-IDOS experimental platform using the three suppression methods in Section 3 is shown in Figure 31. It can be seen from the figure that the suppression effect of the SVPWM jump-backward control strategy based on the three-phase four-leg structure method is better than the other two methods. In the entire frequency band, the CM interference of the three-phase four-leg method is reduced below the GB/T 17626 EMC standard, and the peak of the CM interference is suppressed at both the switching frequency and its frequency multiplication, which proves the feasibility of the suppression method.
Additionally, disturbance is added in the PMSG-IDOS that adopts the SVPWM jump-backward control strategy based on the three-phase four-leg structure, and the DC output result is presented in Figure 32. The output voltage of the system can quickly return to the steady state, the output current can quickly reach the new steady state within 0.025 s. The experimental results are basically consistent with the dynamic simulation results. Therefore, the SVPWM control strategy based on the three-phase four-leg structure can ensure the output balance of the leg and can make the CM interference reach the ideal suppression state.

4. Conclusions

This paper first proposes a method of extracting the parasitic parameters of each pole and between poles of the MOSFET packaging module based on a matrix. It can eliminate the limitations of the existing methods but longer running times still need to be addressed. An Agilent 4263B LCR meter is used to measure the parasitic parameters. The obtained experimental data are generally consistent with the simulation data, and the validity of the method is proven. Second, the high-precision conducted EMI simulation model is established by MATLAB for extracting parasitic parameters, which ensures the accuracy of the high-frequency prediction results. Third, a two-stage filter, spread spectrum technology, and the SVPWM jump-backward control strategy based on the three-phase four-leg structure are used to suppress the conducted interference. Finally, the experimental platform of 5 V/1000 A synchronous generator with rectifier is constructed, and conducted interference is tested. Experimental results demonstrate accuracy of the model with parasitic parameters based on the matrix extraction method. It is also verified that the SVPWM jump-backward control strategy based on the three-phase four-leg structure can ensure the output balance of the leg and allow the CM interference to reach EMC standard. At present, the system has realized the experiment and simulation verification of nine slots in synchronous generator. In the future, an operation experiment of 54 slots in a full generator needs further study in order to prove the practicability of the model and of the suppression strategy.

Author Contributions

Conceptualization, J.L. and C.X.; methodology, J.L. and C.X.; software, C.X.; validation, J.L. and C.X.; formal analysis, J.L. and C.X.; investigation, J.L and X.W.; writing—original draft preparation, J.L. and C.X.; writing—review and editing, J.L and C.X.; visualization, L.L.; supervision, X.W.; project administration, X.W.; funding acquisition, X.W. and J.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by National Natural Science Foundation of China, grant number LH2019E067.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Design model of 5V/1000A permanent magnet synchronous generator integrated DC output system (PMSG-IDOS).
Figure 1. Design model of 5V/1000A permanent magnet synchronous generator integrated DC output system (PMSG-IDOS).
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Figure 2. Multi-three-phase test prototype.
Figure 2. Multi-three-phase test prototype.
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Figure 3. Two-point relationship schematic level.
Figure 3. Two-point relationship schematic level.
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Figure 4. Metal-oxide-semiconductor field-effect transistor (MOSFET) topology with parasitic parameters.
Figure 4. Metal-oxide-semiconductor field-effect transistor (MOSFET) topology with parasitic parameters.
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Figure 5. 3D Simulation model of MOSFET package module.
Figure 5. 3D Simulation model of MOSFET package module.
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Figure 6. Schematic diagram of grid node setting.
Figure 6. Schematic diagram of grid node setting.
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Figure 7. Simulation results of grid parasitic inductance and resistance matrix.
Figure 7. Simulation results of grid parasitic inductance and resistance matrix.
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Figure 8. High precision simulation overall model of single module.
Figure 8. High precision simulation overall model of single module.
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Figure 9. 3D Simulation model of three-phase permanent magnet synchronous generator in Maxwell.
Figure 9. 3D Simulation model of three-phase permanent magnet synchronous generator in Maxwell.
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Figure 10. Generator module of AC sides on MATLAB.
Figure 10. Generator module of AC sides on MATLAB.
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Figure 11. Three-phase converter bridge topology with parasitic parameters.
Figure 11. Three-phase converter bridge topology with parasitic parameters.
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Figure 12. Impedance analysis curve.
Figure 12. Impedance analysis curve.
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Figure 13. Double closed loop control system.
Figure 13. Double closed loop control system.
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Figure 14. PWM signal output model.
Figure 14. PWM signal output model.
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Figure 15. Common-mode (CM) interference simulation diagram: (a) common mode interference on AC side of infinite element method; (b) common mode interference on DC side of infinite element method; (c) CM interference on the AC side of the rectifier system discussed in this paper; (d) CM interference on the DC side of the rectifier system discussed in this paper.
Figure 15. Common-mode (CM) interference simulation diagram: (a) common mode interference on AC side of infinite element method; (b) common mode interference on DC side of infinite element method; (c) CM interference on the AC side of the rectifier system discussed in this paper; (d) CM interference on the DC side of the rectifier system discussed in this paper.
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Figure 16. Three-module parallel simulation model.
Figure 16. Three-module parallel simulation model.
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Figure 17. Three-module parallel DC-side CM interference.
Figure 17. Three-module parallel DC-side CM interference.
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Figure 18. Circuit structure of two-stage filter in MATLAB.
Figure 18. Circuit structure of two-stage filter in MATLAB.
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Figure 19. Asymptote of insertion loss curve: (a) LC-type filter circuit; (b) π-type filter circuit.
Figure 19. Asymptote of insertion loss curve: (a) LC-type filter circuit; (b) π-type filter circuit.
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Figure 20. Simulation diagram of CM EMI with two-stage EMI filter.
Figure 20. Simulation diagram of CM EMI with two-stage EMI filter.
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Figure 21. Schematic diagram of the spread spectrum at the switching frequency of 100 kHz.
Figure 21. Schematic diagram of the spread spectrum at the switching frequency of 100 kHz.
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Figure 22. Space vector pulse width modulation (SVPWM) signal output model based on spread spectrum technology.
Figure 22. Space vector pulse width modulation (SVPWM) signal output model based on spread spectrum technology.
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Figure 23. Simulation of CM EMI after suppression.
Figure 23. Simulation of CM EMI after suppression.
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Figure 24. Schematic diagram of SVPWM jump-backward control strategy.
Figure 24. Schematic diagram of SVPWM jump-backward control strategy.
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Figure 25. Circuit simulation model of three-phase four-leg rectifier.
Figure 25. Circuit simulation model of three-phase four-leg rectifier.
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Figure 26. CM voltage of three-phase four-leg rectifier under the jump-backward control strategy.
Figure 26. CM voltage of three-phase four-leg rectifier under the jump-backward control strategy.
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Figure 27. THD of DC output waveform of three methods: (a) THD value of DC side with two-stage EMI filter; (b) THD value of DC side after using spread spectrum technology; (c) THD value of DC side after adopting three-phase four bridge method.
Figure 27. THD of DC output waveform of three methods: (a) THD value of DC side with two-stage EMI filter; (b) THD value of DC side after using spread spectrum technology; (c) THD value of DC side after adopting three-phase four bridge method.
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Figure 28. Output simulation results of the three parallel modules: (a) current simulation waveform under sudden load change, and (b) voltage simulation waveform under sudden load change.
Figure 28. Output simulation results of the three parallel modules: (a) current simulation waveform under sudden load change, and (b) voltage simulation waveform under sudden load change.
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Figure 29. Experimental platform of PMSG-IDOS.
Figure 29. Experimental platform of PMSG-IDOS.
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Figure 30. Experimental result of CM interference: (a) CM interference of single module on AC side; (b) CM interference of three module parallel DC side.
Figure 30. Experimental result of CM interference: (a) CM interference of single module on AC side; (b) CM interference of three module parallel DC side.
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Figure 31. CM interference on DC side after suppression: (a) suppressed CM interference by second-order filter; (b) suppressed CM interference by spread spectrum technology; (c) suppressed CM interference by three-phase four-leg rectifier.
Figure 31. CM interference on DC side after suppression: (a) suppressed CM interference by second-order filter; (b) suppressed CM interference by spread spectrum technology; (c) suppressed CM interference by three-phase four-leg rectifier.
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Figure 32. Load mutation experiment output waveform: (a) voltage experimental waveform under sudden load change, and (b) current experimental waveform under sudden load change.
Figure 32. Load mutation experiment output waveform: (a) voltage experimental waveform under sudden load change, and (b) current experimental waveform under sudden load change.
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Table 1. Parasitic inductance, resistance, and capacitance values of the MOSFET poles to ground.
Table 1. Parasitic inductance, resistance, and capacitance values of the MOSFET poles to ground.
ModelParameterSimulation ValueExperimental Value
Crimp type SIC MOSFETFrequency/Hz1 k10 k100 k200 k1 k10 k100 k200 k
Cgs/pF953953953953944947952956
Cgd/pF400400400400393395401404
Cds/pF7777777770737680
Ld/nH2.62.62.62.63.63.22.52.2
Ls/nH6.56.56.56.57.77.26.66.0
Lg/nH9.69.69.69.611109.59.0
Rd/μΩ51549696204970
Rs/μΩ9278512093086120
Rg/μΩ11361141611140115163
Table 2. Best stages of electromagnetic interference (EMI) filters.
Table 2. Best stages of electromagnetic interference (EMI) filters.
F2 (LC Product Limit)The Best Series of EMI Filter
10~301
20~1002
70~2003
150~3004
250~4005

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MDPI and ACS Style

Liu, J.; Xia, C.; Liu, L.; Wang, X. Matrix Extraction of Parasitic Parameters and Suppression of Common-Mode Conducted Interference in a PMSG-IDOS Rectifier Module. Electronics 2020, 9, 206. https://doi.org/10.3390/electronics9020206

AMA Style

Liu J, Xia C, Liu L, Wang X. Matrix Extraction of Parasitic Parameters and Suppression of Common-Mode Conducted Interference in a PMSG-IDOS Rectifier Module. Electronics. 2020; 9(2):206. https://doi.org/10.3390/electronics9020206

Chicago/Turabian Style

Liu, Jinfeng, Chunjian Xia, Lantian Liu, and Xudong Wang. 2020. "Matrix Extraction of Parasitic Parameters and Suppression of Common-Mode Conducted Interference in a PMSG-IDOS Rectifier Module" Electronics 9, no. 2: 206. https://doi.org/10.3390/electronics9020206

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