1. Introduction
The rapid evolution of modern wireless networks and maturing 4G networks has paved the path to the new 5G communication generation, which is no longer exclusively an advancement of legacy 4G mobile networks and behaves as a system with several fresh carrier proficiencies [
1]. This emerging 5G technology provides low latency and ultra-high-speed massive connectivity between devices, leading to cross-industry transformations and pervasive processing in an ecosystem where all devices are interconnected. However, it also faces various challenges [
2]. To effectively employ these inclusive ideas, a range of applied sciences is required, such as heterogeneous networks, large multiple-input multiple-output, millimeter wave (mmWave) detection, device-to-device communications, software-defined networks, network function visualization, and networking slicing [
1]. The motivation of this paper is in the scope of mmWave detection improvement, where a unique, low-cost radio frequency (RF) detector suitable for 5G networks is proposed, both for signal detection and for opportunistically reusing the cellular spectrum and energy efficiency for future RF energy harvesting applications. The critical aspect of this operation is to ensure sufficient efficiency in detecting the received RF signal in the zero-bias condition to convert it into useful energy [
3,
4]. Zero-bias detectors in 5G networks have been reported using metal oxide semiconductor field effect transistors [
5], PN junction diodes [
6], and Schottky diodes. Schottky diodes have been most commonly used because of their inherently low turn-on voltages [
7]. However, they require a sophisticated nanogate fabrication process that often results in parasitic effects and the coupling of a Schottky device with antennas and waveguides; moreover, the fabrication of large arrays poses additional engineering issues [
8]. In addition, self-switching devices (SSDs) have received attention from researchers worldwide as they have been reported to effectively function as zero-bias RF detectors [
9,
10,
11]. The rectification property of the SSD is dependent on the nonlinear IV characteristic of the device, which can be obtained by controlling the electric-field-independent zone (depletion region) of the SSD asymmetric channel. The L-shaped channel can be simply realized by electron beam lithography and chemical etching and does not involve junctions, doping, or the third gate terminal, being more adequate in terms of fabrication complexity compared to the most-used Schottky diode [
12] (more details on the SSD working principle and mechanism can be found in [
13]).
Several works on SSDs have focused on the detection and application in the “terahertz (THz) gap” region, the region from 0.1 THz to 10 THz on the electromagnetic spectrum where functionable detectors are scarcely reported [
14]. To function in this high-frequency region, the use of high-mobility substrate materials, such as III-V materials (InGaAs, GaAs, InAs, and GaN) [
10], is mandatory. Exploration of the usage of SSD in the lower 5G network region, which targets frequencies from approximately 3 to 5 GHz in the sub-6 GHz region in the worldwide communication spectrum [
15], has been reported in a small number of studies using silicon as an alternative substrate [
16,
17,
18,
19], as the mobility of electrons is sufficiently high to accommodate the transition of the sinusoidal RF wave, with the advantage of a considerably lower cost compared to that of III-V materials. Optimization of the structural and material parameters of the SSD is crucial for manipulating nonlinear IV characteristics of the device, which strongly influence the rectification performance of the SSD [
20]. Most optimization approaches of the SSD involve varying the channel length,
L, channel width,
W, and channel trench,
Wt, where the depletion region is more affected to control the electron flow. Almost all reported optimization processes were performed using the trial-and-error method, where the parameters were individually varied using a range of values without any structured optimization method [
21,
22,
23,
24]. In this work, we propose the integration of a statistical analysis using the Taguchi optimization method, supported by the analysis of variance (ANOVA) and regression analysis with a numerical simulation to determine the best structural parameters of a silicon-on-insulator (SOI)-based SSD to achieve the best responsivity in the zero-bias region.
The Taguchi method has been widely used in quantitative research and reported in recent studies on experiment-based procedures to obtain an optimized result and produce high product quality by reducing the production cost using robust design experiments [
13,
25]. Integration of the Taguchi method with numerical analysis in simulation-based research was also reported using device simulators such as ANSYS [
26,
27] and ATLAS [
20,
28]. This shows the capability of the integration between statistical and numerical analysis to reduce the number of simulations and to obtain a prominent result with the aid of the noise ratio analysis in the Taguchi method [
14]. Apart from the Taguchi, other designs of experiments (DOE) such as the central composite design and Box–Behnken design, or other quasi-random sequences can be an alternative. These alternatives may offer more precise results in trend prediction involving a higher number of runs and are more complex in design, but are not in the scope of this work. In this study, numerical simulations using the ATLAS device simulator were performed, corresponding to the DOE and analysis of the Taguchi method to obtain the highest curvature coefficient,
γ, of a device that is proportional to the responsivity of the detector [
28]. In addition, ANOVA and regression analyses were performed to further analyze the sensitivity of the corresponding control factors. By integrating an organized optimization method and numerical simulation, we aimed for an optimized SOI-SSD structure with high responsivity in the 5G network region.
2. Materials and Methods
The SSD was characterized using a Silvaco ATLAS two-dimensional (2D) simulator with a top-view (TV) simulation.
Figure 1a shows the geometry of a silicon-based SSD with air as the dielectric in the etched channel of the device (white area), and the cross-section of the device is shown in
Figure 1b.
By considering the three-dimensional (3D) nature of the diode, we assigned an approximate positive background doping of 2.45 × 10
16 cm
−3 and an interface charge density of 3.16 × 10
11 cm
−2 along the channel [
16,
29]. Physical models such as Klaassen’s unified low-field mobility model, the Watt model, Auger recombination, and the energy balance transport model [
30] were defined in the simulation to simulate the electron transport and imitate the mechanism of the real device. The materials and physical models used in the simulation were validated by comparing the electrical characteristics with those of a fabricated SOI SSD from [
16], and the results were in good agreement, as shown in
Figure 2.
2.1. Determination of Control Factors and Levels for the Design of Experiment
Prior to the DOE in the Taguchi method, a series of simulations were conducted by varying the individual geometrical parameters of SSD: channel length,
L, channel width,
W, and trench width,
Wt (refer to
Figure 1a). These are the primary parameters affecting the depletion region in the SSD channel, which controls the on–off condition of the device. We have reported the performance of these individually varied parameters and their physical explanation in [
19]. The control factors and their levels in this optimization work were selected based on the best electrical performance (high forward current and low leakage current) in each reported variation and are listed in
Table 1.
2.2. Selection of Suitable Orthogonal Array
To determine a suitable orthogonal array for the DOE, the degrees of freedom must be considered, and they are defined as the number of comparisons between the process parameters of an experiment and the levels [
31]. In this study, three control factors and three levels with nine degrees of freedom were used [
28]; thus, an L9 orthogonal array of Taguchi’s DOE was implemented. The run number and its parameters with their corresponding level values are listed in
Table 2.
2.3. Evaluation of Curvature Coefficient Peak Value and Its Corresponding Voltage
By using the structural parameters from the DOE table, the IV characteristic performance of each run was numerically simulated using the ATLAS device simulator to analyze the rectification performance. The rectification performance in a nonlinear device can be represented by the curvature coefficient,
γ, which is proportional to the rectified current [
14] and can be calculated as:
where
and
are the second and first derivatives, respectively, of the simulated IV characteristics. The peak value of the plotted
γ versus voltage (V) and its corresponding bias voltage were recorded for further statistical analysis.
2.4. Evaluation of the Signal-to-Noise Ratio
The signal-to-noise (S/N) ratio in the Taguchi method is used to analyze the quality characteristics of each run [
32]. The S/N ratio consists of three quality characteristics: nominal, lower, and higher [
33]. To obtain the optimum response for this work, the S/N ratios for
γpeak and
Vpeak were calculated using the higher, the better (Equation (2) and the lower, the better (Equation (3) quality characteristics, respectively. The higher the
γpeak, the better the rectification performance in a nonlinear device, and a lower
Vpeak indicates a lower bias needed in the device to function.
4. Conclusions
In this work, an optimized SSD structure utilized as an RF detector was analyzed by integrating statistical and numerical analyses using the Taguchi method and ATLAS device simulator, respectively. By performing numerical simulations based on Taguchi’s DOE using the identified control factors and their corresponding levels, the number of significant simulation frequencies was reduced to nine runs, whereas the trial-and-error method requires a range of varied parameters in each structural parameter. Simulations were performed using the ATLAS device simulator by utilizing the physical models validated with the experimental results. The curvature coefficients, γ, from the resulting IV characteristics from each run were used for the analysis of the S/N ratios of the γ peak, and its corresponding voltage, V, was used for the overall ratio. By performing the overall calculation of the S/N ratios, the give-and-take of both γ and V was considered, where a high γ value in the lower bias voltage region was desired. The optimized structure was 0.23 µm, 1.30 µm, and 0.10 µm in channel width, channel length, and trench width, respectively.
Furthermore, the ANOVA conducted in this study provided an understanding of the sensitivity and the most affected control factors in both observed parameters of the SSD, where the γ peak value and its corresponding voltage were mostly affected by the channel length and trench width, respectively. However, only the p-value of the trench width rejected the null hypothesis, despite the high contribution percentage of other control factors. Additional regression analysis was performed to reconfirm the simultaneous relationship of all control factors with the results, which showed the rejection of the null hypotheses in most of the parameters. From the regression analysis, it can be understood that γ was mostly affected by the channel length and width, and its corresponding voltage was dependent on the channel width and trench. The average percentage errors of the predicted and simulated S/N ratios from regression and numerical analyses in all runs were 3.26% and 4.29% for γ and V, respectively, which shows acceptable prediction using regression analysis. Analysis using the response optimizer of the regression analysis showed a favorable composite desirability of 0.8252 with well-balanced performances of γ and V predicted at 26.3239 V−1 and 0.0572 V, respectively, using the optimized structure.
Characterization of the optimized SSD from the Taguchi method analysis by means of ATLAS device simulator showed prominent rectification performance with a γ of 26.4260 V−1 at 0.05 V bias, which was improved from the highest reported γ value of 25.9172 V−1 using the trial-and-error method. The AC analysis of the optimized structure showed a cutoff frequency of ~6.50 GHz, which is higher than the reported cutoff of 4 ± 1 GHz, with a detection peak at 5 GHz. This shows the promising ability of the SOI SSD to function in the 5G network frequency range, which can be a good alternative for a 5G network RF detector with the advantages of fabrication simplicity and low cost.