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Article

Analysis of a Series‑Parallel Resonant Converter for DC Microgrid Applications

Department of Electrical Engineering, National Yunlin University of Science and Technology, Yunlin 640, Taiwan
Processes 2021, 9(3), 542; https://doi.org/10.3390/pr9030542
Submission received: 22 February 2021 / Revised: 14 March 2021 / Accepted: 17 March 2021 / Published: 18 March 2021
(This article belongs to the Special Issue Application of Power Electronics Technologies in Power System)

Abstract

:
An input-series output-parallel soft switching resonant circuit with balance input voltage and primary-side current is studied and implemented for direct current (DC) microgrid system applications. Two resonant circuits are connected with input-series and output-parallel structure to have the advantages of low voltage stresses on active devices and low current stresses on power diodes. A balance capacitor is adopted on high voltage side to balance two input capacitor voltages. The LLC (inductor–inductor–capacitor) resonant circuit cells are employed in the converter to have soft switching operation for power semiconductors. The magnetic coupling component is adopted on the primary-side to automatically realize current balance of the two resonant circuits. In the end, a laboratory hardware circuit is built and tested. Experiments demonstrate and prove the validity of the resonant converter.

1. Introduction

High efficiency power converters were widely presented and discussed for modern industry products [1,2]. For high power demand, power converters with high input voltage have been proposed for DC microgrid systems and DC light rail transportation power units. The input voltage may be higher than 750 or 1500 V. The control strategies and basic circuit topologies in DC microgrid have been presented and discussed in detail in [3,4]. Power semiconductors with high voltage rating capability have high cost, low frequency operation and large conduction losses. Therefore, the circuit size cannot be reduced due to limited switching frequency. To overcome this problem, the circuit topologies with series-connected switches or converters [5,6,7,8,9,10,11,12] and multilevel converters [13,14,15,16,17,18,19,20] can adopt low voltage stress and high switching frequency operation power switches in high voltage input cases. Therefore, the voltage stress on active devices can be reduced in these circuit topologies. However, power switches may have an unbalanced voltage rating on these circuit topologies. Multilevel diode-clamped or flying circuit topologies have been developed for converters or inverters with balance voltage rating on power switches. The control scheme is usually based on duty cycle control [21,22] or variable frequency control [23,24] to regulate load voltage and implement soft switching operation on power devices. LLC (inductor–inductor–capacitor) resonant converters [25,26] have the benefits of high circuit efficiency and less switching loss. However, the main drawback of the parallel-connected resonant circuit is unbalanced resonant currents. Thus, the current stresses on input power switches and output diodes are different.
A series‑parallel resonant converter is presented and accomplished to achieve the advantages of the balanced input capacitor voltages and balance diode currents on two resonant circuits. The resonant converter presented has two LLC circuits with series–parallel connection. To balance input voltages, a flying capacitor is employed on high voltage side. A current balance component based on a magnetic-coupling core is used between two resonant circuits to achieve current sharing on power diodes. Therefore, the voltage and current balance issues on power semiconductors are all accomplished and achieved by using the voltage balance capacitor and magnetic-coupling component. Two resonant circuits are operated at inductive load. Thus, the soft switching operation on power semiconductors can be realized over the whole load range. Compared to past three-level circuit topologies in [13,19,21], this circuit topology has simpler control and less circuit components for high voltage input applications. Experiments of a laboratory circuit with 750~800 V input voltage, 24 V output voltage and 40 A load current are demonstrated to confirm the benefits of the circuit.

2. Presented Resonant Converter

Figure 1 gives the basic circuit diagram in a simplify DC microgrid. The input sources of the DC microgrid may be DC or AC utility systems and clean energy power systems such as solar power or wind power. The outputs of the DC microgrid may be the low or high power DC loads, AC motor drives, battery storage systems or light rail transit applications. For DC transportation or DC light rail transit system applications, the input DC bus voltage may be 750 or 1500 V. For local industry factory and residential house applications, the input DC bus voltage is 380 V. Thus, the DC bus voltage in the DC microgrid system may be 380, 750 and 1500 V for universal power demands. Therefore, the high voltage input DC–DC converters are needed for DC transportation or high power DC loads applications. The proposed converter is presented to meet the demand of these applications.

2.1. Circuit Characteristics of a Conventional Resonant Converter

Figure 2a provides the circuit structure of conventional LLC converter. Lm, Lr and Cr are the magnetizing inductance, series resonant inductance and series resonant capacitance, respectively. Da and Db are rectifier diodes and Sa and Sb are power switches. Frequency modulation with constant duty cycle is employed to regulate load voltage Vo and produce the gate signals for Sa and Sb. The basic circuit analysis of LLC converter can be analyzed using the fundamental harmonic approach in [27]. When a LLC converter is operated at series resonant frequency, the resonant converter likes a high frequency isolated DC transformer with zero-voltage switching (ZVS) turn-on operation on power switches and zero-current switching (ZCS) turn-off operation on rectifier didoes. Fundamental frequency harmonic approach is usually used to approximately derive voltage gain of the resonant circuit. The turn-on time of Sa and Sb equals half of the switching period so that a square signal with 0 and Vin voltage values are observed on vab. The root-mean-square fundamental voltage of vab can be calculated as 2 V i n / π . However, the secondary winding current is a quasi-sinusoidal current so that vLm is a quasi-square voltage signal with nVo and −nVo voltage values. The root-mean-square value of vLm is derived as 2 2 n V o / π . Figure 2b gives the ac equivalent circuit on the primary side. For high voltage applications, the Insulated Gate Bipolar Transistor (IGBT) devices with 1200 V voltage rating can be used for Sa and Sb, shown in Figure 2a. The switching frequency of IGBT devices, however, is normally less than 400 kHz, and IGBT devices have serious switching losses at turn-off instant.

2.2. Proposed LLC Resonant Converter

Figure 3 provides the circuit schematic of the LLC converter presented. The input voltage is about 750~800 V from DC microgrid or DC light rail power system. The converter developed has two LLC circuits with series–parallel structure. Thus, the voltage stress of Sa~Sd is reduced to Vin/2 and the average current of Da~Dd is reduced to Io/4. The first LLC circuit have components Sa, Sb, Cr,a, Lr,a, Ta, Da and Db. The circuit components of the second LLC circuit are Sc, Sd, Cr,b, Lr,b, Tb, Dc and Dd. Da~Dd are rectifier diodes. Cr1 and Cr2 are the resonant capacitances, Lr,a and Lr,b are resonant inductors and Lm,a and Lm,b are the magnetizing inductors. Co, Cin,a and Cin,b are output capacitor and input split capacitors. Capacitor Cf is connected between points b and c. If Sa and Sc are in the on-state and Sb and Sd are in the off-state, then VCf = VCin,a. If Sa and Sc are turned off and Sb and Sd are turned on, then VCf = VCin,b. Since the turn-on times of Sa~Sd are identical and equal Ts/2, the average capacitor voltages are derived as VCf = VCin,a = VCin,b = Vin/2. Therefore, input split DC voltages VCin,a and VCin,b are well balanced in each switching cycle. For achieving current balance of two LLC circuits, a magnetic-coupling (MC) component [28] is employed to achieve current sharing. If the inductor currents are well balanced (|iLr,a| = |iLr,b|), then the induced voltages VLa = VLb = 0. If the inductor currents are unbalanced (such as |iLr,a| > |iLr,b|), then VL,a is decreased to reduce iLr,a and VLb is increased to increase iLr,b. After |iLr,a| = |iLr,b|, the voltages VLa and VLb are reduced to zero. Thus, iLr,a and iLr,b can be automatically balanced under steady state by using the MC component. The switching frequency is regulated to adjust voltage gain of the LLC presented. Therefore, Vo is regulated at the reference voltage value Vo,ref.

3. Principle of Operation

The circuit operations of the LLC converter presented are discussed from the following statements:
(1)
Transformers Ta and Tb have identical turn-ratio na = nb = np/ns;
(2)
Inductances Lm,a = Lm,b = Lm and Lr,a = Lr,b = Lr;
(3)
Sa~Sc have identical output capacitances CSa = CSb = CSc = CSd = CS;
(4)
Capacitances Cin,a = Cin,b and Cr,a = Cr,b = Cr.
The gate singles of power switches and key current and voltage waveforms per every switching cycle are given in Figure 4. From the conducting states of power devices, it can be observed that the converter presented has six operating steps for every switching cycle. Figure 5 gives the topological circuits for the six operating steps.
Step 1 (t0~t1): At time t < t0, Sa~Sd are all off and iLr,a > 0 and iLr,b < 0. Thus, iLr,a discharges CSa and charges CSb and iLr,b discharges CSc and charges CSd. Due to iLr,a < iLm,a and iLr,b > iLm,b, the diode currents iDb and iDc are positive. After time t > t0, vCSa and vCSc decrease to zero voltage. Due to iSa(t0) < 0 and iSc(t0) < 0, the body diodes of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) Sa and Sc conduct and vSa,ds and vSc,ds are zero voltage. Therefore, switches Sa and Sc can turn on to realize a soft switching characteristic. In step 1, iLr,a < iLm,a and iLr,b > iLm,b, the rectifier diodes Dc and Dd conduct, and VCf = VCin,a. Since the magnetizing voltages vLm,a = –nVo and vLm,b = nVo, the magnetizing currents iLm,a and iLm,b decrease and increase, respectively. Under steady state operation and |iLr,a| = |iLr,b| operation, the induced voltages VLa and VLb across the MC cell are equal to zero. (Lr,a and Cr,a) and (Lr,b and Cr,a) are naturally resonant in converters 1 and 2, respectively with frequency f r = 1 / 2 π L r C r . If fs > fr, then iDb and iDc will decrease to zero before Sa and Sd turn off. After the step 1, circuit operation goes to step 2 when iDb = iDc = 0. If fs < fr, then iDb and iDc are still positive when Sa and Sc turn off. Under this condition, the circuit will go to step 3.
Step 2 (t1~t2): If fs > fr, then iLr,a = iLm,a and iLr,b = iLm,b at time t1. Diodes Da~Dd are turned off without reverse recovery current. (Cr,a, Lr,a and Lm,a) and (Cr,b, Lr,b and Lm,b) are resonant in circuits 1 and 2, respectively with frequency f p = 1 / 2 π ( L m + L r ) C r .
Step 3 (t2~t3): At t2, power devices Sa and Sc turn off. Due to iLr,a(t2) < 0 and iLr,b(t2) > 0, CSa (CSb) and CSc (CSd) are charged (discharged) in step 3. Diodes Da and Dd are forward biased to conduct load current. If the energies on Lr,a and Lr,b are greater than the energies on CSa~CSd, then vSb,ds and vSd,ds will decrease to zero at t3.
Step 4 (t3~t4): At time t3, CSb and CSd discharge to zero voltage. Due to iLr,a(t3) < 0 and iLr,b(t3) > 0, the body diodes of Sb and Sd conduct and Thus, Sb and Sd can turn on to realize ZVS operation. Diodes Da and Dd conduct, vLm,a = nVo, vLm,b = −nVo, iLm,a increases, and iLm,b decreases. (Lr,a and Cr,a) and (Lr,b and Cr,b) are naturally resonant in each LLC circuit.
Step 5 (t4~t5): At time t4, the magnetizing currents iLm,a and iLm,b equal iLr,a and iLr,b, respectively. Thus, the secondary-side diodes Da~Dd are turned off without reverse recovery current loss. (Lr,a, Cr,a and Lm,a) and (Lr,b, Cr,b and Lm,b) are naturally resonant in each circuit, respectively.
Step 6 (t5~Ts + t0): At time t5, power devices Sb and Sd turn off. Due to iLr,a(t5) > 0 and iLr,b(t5) < 0, CSa (CSb) and CSc (CSd) are discharged (charged) in step 6. The diodes Db and Dc are conducting. If the energies on Lr,a and Lr,b is greater than the energies on CSa~CSd, then vSa,ds and vSc,ds will be decreased to zero at Ts + t0.

4. System Analysis and Design Example

Two LLC resonant circuits with series–parallel structure are adopted to decrease voltage stresses on power switches and current stresses on power diodes. A flying capacitor is employed to realize voltage balance on input capacitors. A magnetic-coupling component is connected between two LLC circuits to accomplish current sharing. In current balance condition and steady state operation, the primary and secondary voltages of the magnetic-coupling component equal zero. The magnetic-coupling component is ignored in the following discussion. Fundamental frequency analysis [27] is employed to obtain voltage gain of the converter presented. It is observed that vab and vcd are square voltage waveforms. (Lr,a and Cr,a) and (Lr,b and Cr,b) are resonant on circuits 1 and 2 to generate two quasi-sinusoidal on iLr,a and iLr,b. The voltages vab and vcd at the fundamental frequency are v a b , f = v c d , f = V i n sin ( 2 π f s t ) / π . If the circuit is operated at series resonant frequency, then the conducting time of Da~Dd is equal to Ts/2. The secondary winding currents at fundamental frequency are derived as i T a , sec = i T b , sec = π I o sin ( 2 π f s t θ ) / 4 . The fundamental magnetizing voltages are given as v L m , a , f = v L m , b , f = 4 n V o sin ( 2 π f s t θ ) / π . The ac equivalent resistances Rac,a and Rac,b on primary-side of Ta and Tb are derived R a c , a = R a c , b = v L m , a , f i T a , sec / n = 16 ( n π ) 2 R o (Cr,a, Lr,a, Lm,a and Rac,a) and (Cr,b, Lr,b, Lm,b and Rac,b) are resonant on each corresponding resonant tank. Figure 6a gives the resonant tank on the primary-side of resonant circuit 1. The ac voltage gain of the circuit developed can be expressed as.
| G ( f s ) | = v L m , a , f / v a b , f = 1 / [ 1 + 1 K L ( 1 1 F 2 ) ] 2 + [ Q ( F 1 F ) ] 2
where f r = 1 / 2 π L r C r , KL = Lm,a/Lr,a, Q = L r / C r / R a c , a and F = fs/fr. From Equation (1), the gain voltage between the different load (Q) and normalized switching frequency (F) under KL = 8 is provided in Figure 6b.
The converter studied is proved by a prototype based on the following conditions: 750 V~800 V input voltage, 24 V output voltage, 40 A load current and 120 kHz series resonant frequency by Cr,a and Lr,a. Ta and Tb are implemented by magnetic cores TDK EER-42 with 24 primary winding turns and 3 secondary winding turns. Based on the turn-ratio of Ta and Tb, the maximum and minimum voltage gains of LLC converter are provided in (2).
G d c , max = 4 n ( V o + V f ) V i n , min 1.06 ,   G d c , min = 4 n ( V o + V f ) V i n , max 1
where Vf = 0.8 V on Da~Dd. At 100% output power, Rac,a and Rac,b are derived in (3).
R a c , a = R a c , b = 16 ( n π ) 2 R o 62.25 Ω
In the prototype, the selected Q is 0.3 to obtain the maximum gain at low voltage input under full load. The inductor ratio KL is selected as 8 to reduce the circulating current losses on magnetizing inductor. With the given KL, fr and Q, the components Lr,a, Lr,b, Cr,a, Cr,b, Lm,a and Lm,b are derived:
L r , a = L r , b = Q R a c , a 2 π f r 25 μ H
C r , a = C r , b = 1 4 π 2 L r 1 f r 2 70 n F
L m , a = L m , b = K L L r , a 200 μ H
The root-mean-square magnetizing currents iLm,a,rms and iLm,a,rms at series resonant frequency 120 kHz are calculated as
i L m , a , r m s = i L m , b , r m s = 1 2 3 n V o 2 f s L m , a 1.155 A
The primary-side root-mean-square load currents at full load are expressed as
i T a , p r i , r m s = i T b , p r i , r m s = π 4 2 I o n 2.78 A
Therefore, the root-mean-square resonant inductor currents are obtained as
i L r , a , r m s = i L r , b , r m s = i L m , a , r m s 2 + i T a , p r i , r m s 2 3 A
Due the circuit structure, the voltage rating of power devices Sa~Sd is obtained as
v S a , s t r e s s = v S b , s t r e s s = v S c , s t r e s s = v S d , s t r e s s = V i n , max / 2 = 400 V
The root-mean-square switch currents iSa,rms~iSd,rms are obtained in (11).
i S a , r m s = i S d , r m s = i L a , a , r m s / 2 2.13 A
MOSFETs SIHG20N50C with 500 V/20 A rating are employed for power devices Sa~Sd. The voltage and average current ratings of diodes Da~Dd are expressed as
v D a , s t r e s s = v D b , s t r e s s = v D c , s t r e s s = v D d , s t r e s s = 2 ( V o + V f ) 49.6 V
i D a , a v = i D b , a v = i D c , a v = i D d , a v = I o / 4 = 10 A
MBR40100PT with 100 V/40 A ratings are employed for power diodes Da~Dd. The input capacitances, voltage balance capacitance and output capacitances are Cin,a = Cin,b = 440 μF/450 V, Cf = 1 μF/630 V and Co = 4400 μF/100 V.

5. Experimental Results

Experiments are given to confirm the circuit performance. The circuit components of the converter presented are derived in the previous section. Figure 7 demonstrates the test waveforms of Sa~Sd under 100% rated power. It is clear that Sa (Sb) and Sc (Sd) have the same gate signal. Therefore, the square voltage waveforms can be generated on voltages vab and vcd. Due to the converter needing a higher voltage gain at Vin = 750 V than Vin = 800 V, the switching frequency of Sa~Sd at Vin = 750 V input (Figure 7a) is lower than the switching frequency at Vin = 800 V input (Figure 7b). Figure 8 provides the test waveforms of vSa,gs, vSa,ds and iSa at different input voltage and output power conditions. From the experimental results, one can observe that zero voltage switching of Sa is realized from 5% to 100% load over the whole input voltage range. Since the other switches Sc~Sd have the same circuit characteristics as switch Sa, it can be concluded that the soft switching operation of Sc~Sd is also accomplished from 5% load to full load. Figure 9 demonstrates the test results of vCr,a, vCr,b, iLr,a and iLr,b of two half-bridge resonant circuits at 100% rated power. The two currents iLr,a and iLr,b are well balanced for different input voltage cases. Figure 10 illustrates the experimental waveforms of iDa~iDd under 100% rated power. The diode currents are also well balanced between two resonant circuits. Figure 11 gives the test results of VCin,a, VCin,b and VCf at 800 V input and 100% rated power. The voltage variation between VCin,a and VCin,b is 5 V under full load. The measured circuit efficiencies are 91.4%, 94.8% and 93.7% at 96, 480 and 960 W output power, respectively. The measured switching frequencies are 117 kHz (152 kHz), 110 kHz (135 kHz) and 99 kHz (120 kHz) at 96, 480 and 960 W output load under 750 V (800 V) input operation. Figure 12 provides the test waveforms of the load voltage and load current under load step response. It is clear that the load voltage is stable without serious voltage variation.

6. Conclusions

A series–parallel connected resonant circuit with the benefits of low current and voltage ratings, balance voltage on active switches, balance current on power components, and soft switching operation on power devices is proposed, discussed and implemented in this paper. The voltage balance of input split capacitors is achieved by a flying capacitor. The current sharing of two resonant tanks is realized by a magnetic-coupling core. Frequency-control modulation is used to adjust voltage gain of the LLC converter. Therefore, the load voltage is well controlled for different input voltage and output current. Since the resonant circuit is worked at the inductive impedance, power semiconductors can be controlled at soft switching operation. The converter presented can be applied in DC light rail vehicles and a DC microgrid bipolar voltage system with high voltage input applications. Finally, experimental tests are given and demonstrate the practicability of the proposed circuit.

Funding

This research is supported by the Ministry of Science and Technology (MOST), Taiwan, under grant number MOST 108-2221-E-224-022-MY2.

Acknowledgments

The author would like to thank Zong-Xian Xie for his help with measuring the circuit waveforms in the experiment. The author is grateful to the editor and all reviewers for their valuable suggestions to improve this paper.

Conflicts of Interest

The author declares no conflict of interest.

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Figure 1. Simplified circuit schematic of a DC microgrid system.
Figure 1. Simplified circuit schematic of a DC microgrid system.
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Figure 2. Conventional resonant converter (a) circuit structure and (b) AC equivalent circuit on primary side.
Figure 2. Conventional resonant converter (a) circuit structure and (b) AC equivalent circuit on primary side.
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Figure 3. Circuit schematic of the inductor–inductor–capacitor (LLC) converter with series–parallel structure.
Figure 3. Circuit schematic of the inductor–inductor–capacitor (LLC) converter with series–parallel structure.
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Figure 4. Main current and voltage signals of the LLC converter.
Figure 4. Main current and voltage signals of the LLC converter.
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Figure 5. Equivalent circuits for each step (a) step 1, (b) step 2, (c) mode 3, (d) step 4, (e) step 5, (f) step 6.
Figure 5. Equivalent circuits for each step (a) step 1, (b) step 2, (c) mode 3, (d) step 4, (e) step 5, (f) step 6.
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Figure 6. The ac resonant tank and voltage gain (a) resonant tank on primary-side of resonant circuit 1 and (b) converter voltage gain.
Figure 6. The ac resonant tank and voltage gain (a) resonant tank on primary-side of resonant circuit 1 and (b) converter voltage gain.
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Figure 7. Measured waveforms vSa,gs~vSs,gs at 100% rated power under (a) 750 V input voltage (vSa,gs~vSd,gs: 10 V/div; time: 2 μs) and (b) 800 V input voltage (vSa,gs~vSd,gs: 10 V/div; time: 2 μs).
Figure 7. Measured waveforms vSa,gs~vSs,gs at 100% rated power under (a) 750 V input voltage (vSa,gs~vSd,gs: 10 V/div; time: 2 μs) and (b) 800 V input voltage (vSa,gs~vSd,gs: 10 V/div; time: 2 μs).
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Figure 8. Experimental waveforms of vSa,gs, vSa,ds and iSa under (a) 750 V input and 5% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 2 A/div; time: 2 μs), (b) 750 V input and 100% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 5 A/div; time: 2 μs), (c) 800 V input and 5% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 2 A/div; time: 2 μs) and (d) 800 V input and 100% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 5 A/div; time: 2 μs).
Figure 8. Experimental waveforms of vSa,gs, vSa,ds and iSa under (a) 750 V input and 5% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 2 A/div; time: 2 μs), (b) 750 V input and 100% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 5 A/div; time: 2 μs), (c) 800 V input and 5% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 2 A/div; time: 2 μs) and (d) 800 V input and 100% load (vSa,gs: 10 V/div; vSa,ds: 200 V/div; iSa: 5 A/div; time: 2 μs).
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Figure 9. Experimental waveforms of vCr,a, vCr,b, iLr,a and iLr,b at 100% rated power under (a) Vin = 750 V (vCr,a, vCr,b: 100 V/div; iLr,a, iLr,b: 10 A/div; time: 2 μs) and (b) Vin = 800 V (vCr,a, vCr,b: 100 V/div; iLr,a, iLr,b: 10 A/div; time: 2 μs).
Figure 9. Experimental waveforms of vCr,a, vCr,b, iLr,a and iLr,b at 100% rated power under (a) Vin = 750 V (vCr,a, vCr,b: 100 V/div; iLr,a, iLr,b: 10 A/div; time: 2 μs) and (b) Vin = 800 V (vCr,a, vCr,b: 100 V/div; iLr,a, iLr,b: 10 A/div; time: 2 μs).
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Figure 10. Experimental waveforms of iDa~iDd at 100% rated power under (a) 750 V input voltage (iDa~iDd: 20 A/div; time: 2 μs) and (b) 800 V input voltage (iDa~iDd: 20 A/div; time: 2 μs).
Figure 10. Experimental waveforms of iDa~iDd at 100% rated power under (a) 750 V input voltage (iDa~iDd: 20 A/div; time: 2 μs) and (b) 800 V input voltage (iDa~iDd: 20 A/div; time: 2 μs).
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Figure 11. Experimental waveforms of VCin,a, VCin,b and VCf at 800 V input and 100% rated power (VCin,a, VCin,b, VCf: 200 V/div; time: 2 μs).
Figure 11. Experimental waveforms of VCin,a, VCin,b and VCf at 800 V input and 100% rated power (VCin,a, VCin,b, VCf: 200 V/div; time: 2 μs).
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Figure 12. Experimental waveforms of Vo and Io under load variation between Io = 12 and 24 A (Vo: 10 V/div; Io: 20 A/div; time: 200 μs).
Figure 12. Experimental waveforms of Vo and Io under load variation between Io = 12 and 24 A (Vo: 10 V/div; Io: 20 A/div; time: 200 μs).
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Lin, B.-R. Analysis of a Series‑Parallel Resonant Converter for DC Microgrid Applications. Processes 2021, 9, 542. https://doi.org/10.3390/pr9030542

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Lin B-R. Analysis of a Series‑Parallel Resonant Converter for DC Microgrid Applications. Processes. 2021; 9(3):542. https://doi.org/10.3390/pr9030542

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Lin, Bor-Ren. 2021. "Analysis of a Series‑Parallel Resonant Converter for DC Microgrid Applications" Processes 9, no. 3: 542. https://doi.org/10.3390/pr9030542

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