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Article
Peer-Review Record

Fabrication Tolerances’ Impact on an ODAC-Based PAM-4 Transmitter

Photonics 2024, 11(7), 589; https://doi.org/10.3390/photonics11070589
by Adebayo E. Abejide 1,2,3,*, João Santos 1,2,3, Tanay Chattopadhyay 4, Francisco Rodrigues 3, Mario Lima 1,2 and António Teixeira 1,2,3
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Reviewer 4: Anonymous
Photonics 2024, 11(7), 589; https://doi.org/10.3390/photonics11070589
Submission received: 9 May 2024 / Revised: 7 June 2024 / Accepted: 11 June 2024 / Published: 24 June 2024
(This article belongs to the Special Issue Photonics for Emerging Applications in Communication and Sensing II)

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

Dear Authors,

Thank you for your interesting contribution. I do not have any mistakes to point out and I accept your draft in the current form.

Kind regards,

Comments on the Quality of English Language

Please spell-check the text (e.g. an MZM in line 80).

Author Response

Thank you very much for your review, we have taken note and correct the typo you pointed out

Reviewer 2 Report

Comments and Suggestions for Authors

In this article, a method for predicting the fabrication impacts on a telecommunication optical digital-to-analogue converter (oDAC) based pulse amplitude modulator level four (PAM-4) transmitter is presented. To estimate the production yield in fabrication scenario using symbol error rate (SER) benchmark is explored. The presented research is interesting however, I do not recommend its acceptance in present form.

 

1)      The authors must clarify the contribution/novelty of the paper particularly in the bullet form. How is the presented system model concern with fabrication tolerance of Chips? It needs detail explanation with reported literatures.

2)      Which mathematical expression is used to compute throughput? As the authors mentioned “We derive a complex closed-form throughput expression, solved numerically, and offer an approximate expression for specific conditions”, I did not find it. It needs to clarify.

3)      In the Conclusion Section “Using the flexibility of FPPGA, an oDAC-based PAM-4 telecommunication transmitter was mimed and with passive variances ranging from 0...12 % while mimicking the production of 1000 components, what types of information authors convey with 0…12%.

4)      From Fig. 10, it is very difficult to understand the basis to decide pass and fail chips. I think it need detail explanation.

5)      From Fig. 7, the pass and failed criteria is based on the SER. Is there any cutoff/threshold to fix this? What is the basis to decide it?

Comments on the Quality of English Language

Minor editing is required.

Author Response

Comment1

The authors must clarify the contribution/novelty of the paper particularly in the bullet form. How is the presented system model concern with fabrication tolerance of Chips? It needs detail explanation with reported literatures.

Answer 1

Thank you very much for your very good question. Here are the contributions of this work to fabrication tolerance of chips

  • The model can be adapted to any passive based PIC device before production to estimate possible yield from several runs after fabrication by mimicking different instances of the fabricated devices.
  • The model contributes to the study of the viability of an oDAC PAM-4 transmitter to replace conventional one. The yield at varying passive tolerance can be used to establish the trade off between eDAC and oDAC based PAM-4 transmitters
  • The model enables the study of fabrication non-conformity and its implications is modelled over the passive section of the oDAC-PAM-4 transmitter for large scale production. Hence, we study the tolerance of the transmitter under different system variations.
  • This model serves as a template for passive PIC evaluation before fabrication which reduces the cost and wastage. Conventionally, PIC based devices will be developed and fabricated before testing. There is possibility that this variation will reduce the yield. But with this model, a passive based PIC device will be tested before fabrication and the tolerance of the device will be examined before going into production at all. This will aid the decision of either making the production or not or going in the direction of improving the model before production which is justified by the yield observed through the model if it is comfortable or not by the designer.
  • Please, see pages 1,2, Line numbers [28-74] for related literature and see page 3, Line numbers [99-108] for contribution

Comment 2

Which mathematical expression is used to compute throughput? As the authors mentioned “We derive a complex closed-form throughput expression, solved numerically, and offer an approximate expression for specific conditions”, I did not find it. It needs to clarify.

Answer 2

  • Thank you, however, I think the reviewer attached quotation from other paper wrongly. I don't find the lines as he quoted

Comment 3

In the Conclusion Section “Using the flexibility of FPPGA, an oDAC-based PAM-4 telecommunication transmitter was mimed and with passive variances ranging from 0...12 % while mimicking the production of 1000 components, what types of information authors convey with 0…12%.

Answer 3

  • Thank you for taking notice of this. I meant to say ranging from 0%-12%, We have corrected this.
  • Please, see page 9 Line number 247

Comment 4

From Fig. 10, it is very difficult to understand the basis to decide pass and fail chips. I think it need detail explanation.

Answer 4

  • Thank you very much for pointing out, An improved explanation has been added to the discussion on Fig 10.
  • Please, see pages 8, 9 Line Number [228-242]

Comment 5

From Fig. 7, the pass and failed criteria is based on the SER. Is there any cutoff/threshold to fix this? What is the basis to decide it?

Answer 5

  • Thank you very much for pointing out, further explanation has been added to the discussion on Fig 7.
  • Please, see page 8, Line Number [205-208]

Reviewer 3 Report

Comments and Suggestions for Authors

Authors   present  a hybrid model to study the effects of fabrication  tolerance resulting from passive variation in PIC based devices. The authors have come up with a good research idea for the study. However, the author's discussion of the research background of the field is too little to detract from the paper's innovativeness. Also the number of references is significantly low. The discussion section is missing reference support and comparison of existing research results. A major revision of the paper is recommended.

Author Response

Question 1

Authors   present  a hybrid model to study the effects of fabrication  tolerance resulting from passive variation in PIC based devices. The authors have come up with a good research idea for the study. However, the author's discussion of the research background of the field is too little to detract from the paper's innovativeness. Also the number of references is significantly low. The discussion section is missing reference support and comparison of existing research results. A major revision of the paper is recommended.

Answer 1.

  • Thank you very much for your comments. The introduction section has been updated with more discussions of the research background. We have also improved on the results discussion section and we hope this would be satisfactory.
  • Please, see pages 1,2, Line numbers [28-74] for related literature and see page 3, Line numbers [99-108] for contribution

Reviewer 4 Report

Comments and Suggestions for Authors

The authors proposed a model to predict the yield of FPGA based PIC, which may be useful for practical application. Nevertheless, it is well known that the unbalanced MZM would have critical influence on the performance and yield of PIC FPGA and there are numerous reported works about how to solve this problem through MZM design.  For example, S. Xie, S. Veilleux and M. Dagenais, "On-Chip High Extinction Ratio Single-Stage Mach-Zehnder Interferometer Based on Multimode Interferometer," in IEEE Photonics Journal, vol. 14, no. 4, pp. 1-6, Aug. 2022,  

The authors had better to cite more previous works about this topic to address how to solve this problem. 

Besides, based on the proposed model, can the authors propose some ways to minimize the influence of unbalanced MZM on chip performance ?

This will make the whole manuscript become more attractive.       

Author Response

Question 1

The authors proposed a model to predict the yield of FPGA based PIC, which may be useful for practical application. Nevertheless, it is well known that the unbalanced MZM would have critical influence on the performance and yield of PIC FPGA and there are numerous reported works about how to solve this problem through MZM design.  For example, S. Xie, S. Veilleux and M. Dagenais, "On-Chip High Extinction Ratio Single-Stage Mach-Zehnder Interferometer Based on Multimode Interferometer," in IEEE Photonics Journal, vol. 14, no. 4, pp. 1-6, Aug. 2022,  

Answer 1.

  • Thank you for your comment and for pointing out the reference that discussed an approach to improve MZM performance. Our objective in our paper is to study the degree of tolerance of PIC based device to passive variation and how this can impact production by mimicking different instances of the fabricated devices. Here we have used the oDAC-PAM-4 transmitter to test our model. The concept can also be applied to other PIC based devices and a prior analysis of this type is interesting before fabrication as we believed this will aid the decision of the designer to proceed to fabrication after designing or to improve on the design. This is especially when the preliminary analysis must have been carried out showcasing the production yield and loss using the model before it is physically fabricated in the foundry.
  • Please, see pages 1,2, Line numbers [28-74] for related literature and see page 3, Line numbers [99-108] for contribution

Question 2 

Besides, based on the proposed model, can the authors propose some ways to minimize the influence of unbalanced MZM on chip performance ?

Answer 2

  • Thank you for your question, we are currently investigating the model by modulating within the linear region of the MZM instead of the rail to rail modulation we have used in the current work. Our findings will then be compared with the current work. This is the future direction in this work.

Round 2

Reviewer 2 Report

Comments and Suggestions for Authors

The authors have incorporated almost all the comments and suggestions raised by the reviewers. Therefore, I recommend the acceptance of this manuscript for publication.

Reviewer 3 Report

Comments and Suggestions for Authors

The author has made revisions to the comments provided by three reviewers. The reviewer believes that the article basically meets the acceptance standards of the publication.

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