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Article
Peer-Review Record

A CMOS Inverter-Based Active Feedback Transimpedance Amplifier

Photonics 2024, 11(7), 617; https://doi.org/10.3390/photonics11070617
by Somi Park 1,2, Sunkyung Lee 1,2, Bobin Seo 1, Yejin Choi 1,2, Yunji Song 1,2, Yeojin Chon 1,2, Shinhae Choi 1,2 and Sung-Min Park 1,2,*
Reviewer 1: Anonymous
Reviewer 2:
Reviewer 3: Anonymous
Photonics 2024, 11(7), 617; https://doi.org/10.3390/photonics11070617
Submission received: 28 May 2024 / Revised: 25 June 2024 / Accepted: 26 June 2024 / Published: 28 June 2024
(This article belongs to the Section Optoelectronics and Optical Materials)

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

This paper presents an inverter-based active-feedback transimpedance amplifier. The proposed IAF-TIA can achieve the limiting operations for the input currents greater than 100 μApp because it applies an active-feedback to a voltage-mode inverter-based TIA through a controlled positive regeneration process. The active inverter feedback technique, however, may be unstable, therefore careful loop gain adjustment is required. Authors propose to use a diode-connected NMOS transistor as a switch in the feedback path, with its gate connected to the input. This helps to accommodate large input currents of up to 1.5 mApp.

Validation of the proposed apprach relies non post layout simulations referring to a 180nm CMOS process.

A comparison against other TIAs from the literature shows interesting results in terms of low power consumption, low noise and dynamic range.

The paper is clear and well written.

Since authors state that the proposed active inverter feedback technique may be unstable and needs careful loop gain adjustment, they should better describe stability issues and better explain the citeria to guarantee the stability of the proposed TIA. What authors exactly mean by the sentence: "With the judiciously optimization process." ? 

 

Author Response

Dear Reviewer 1,

Please find the attached answer sheet.

Best Regards,

Sung Min Park

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

The manuscript present a new TIA architecture for optical detection. 

Detailed comments are included in the attached PDF (annotation of the original manuscript). However some general considerations apply:

1. Please revise the title: the use of double "CMOS" may result redundant.

2. The mechanism of the double feedback is not explained properly. Please provide some analysis in order to highlight the novelty introduced by the proposed architecture.

3. Design choices are not discussed. Since stability is of concern for the proposed architecture, these choices are fundamental and need to be included in the manuscript.

Comments for author File: Comments.pdf

Comments on the Quality of English Language

Minor English edits have been suggested

Author Response

Comment 1. Please revise the title: the use of double "CMOS" may result redundant.

(ans.) It was a typo. We have deleted the second CMOS in the title.

 

Comment 2. The mechanism of the double feedback is not explained properly. Please provide some analysis in order to highlight the novelty introduced by the proposed architecture.

(ans.) Thanks a lot for this comment. As shown in Fig. 1(b), the double feedback is exploited in the main TIA. Here, the feedback resistor (RF1) is applied from the output node (vo1) to the input, and the local feedback resistor (RF3) exists at the third stage (M5, M6) of the main TIA. Thereby, the transimpedance gain and the input resistance of the main TIA are given by two equations in the revised manuscript. (Equations cannot be shown in this note.)

 

Comment 3. Design choices are not discussed. Since stability is of concern for the proposed architecture, these choices are fundamental and need to be included in the manuscript.

(ans.) Thanks a lot for this valuable comment. The fundamental design choices of this work are certainly the parameters listed in Table I, including transimpedance gain (TZ gain), bandwidth, noise current spectral density, dynamic range, power dissipation, and chip area. Also, stability is one of those concerns in the proposed IAF-TIA because of its positive feedback mechanism. Particularly because of the multi-stage architecture with double-feedback, we need to address the stability issues in this paper. Hence, we have analyzed the stability by means of ‘phase margin simulations’, and also conducted PVT variation simulations that confirm the robust design of the proposed IAF-TIA even under the various worst conditions. Conclusively, the proposed IAF-TIA maintain the stability with the phase margin greater than 60 deg., and the performance degradations even under the worst cases are not significant at all, as demonstrated in Table I.

 

Comment 4. All the comments inquired in the PDF file

(ans.) They were answered and corrected. Please find the revised PDF file.

Author Response File: Author Response.pdf

Reviewer 3 Report

Comments and Suggestions for Authors

The paper describes a CMOS Inverter-based Active-Feedback CMOS Transimpedance Amplifier.

The manuscript is well written and shows the advantage of using a inverter based with active feedback. The simulated results demonstrate the idea and the performance comparison with the state-of-the-art ADCs is very good.

The manuscript however needs some additional information.

 

1 – The simulations does not shows results with process corners. How is controlled the spread in characteristics and stability in corners. Please include that information in manuscript.

2 – How is controlled the common mode voltage and offset of the amplifier. What parameters are key in those variables. Please also show the monte carlo simulations of the system.

Author Response

Dear Reviewer 3,

Please find the attached file.

Best regards,

Sung Min Park

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

Comments and Suggestions for Authors

Authors responded to the reviewer's comments point by point enhancing the quality of the manuscript. Still some design values, critical to the design, are not discussed: specifically, the values of RF1, RF2, RF3 and the approximate threshold voltage and aspect ratio of the diode-connected NMOS transistor used in the positive feedback path. Authors should provide these quantities at least when discussing the simulation results (starting from line 218).

The coma after equation (2) should be included in the equation itself (not as the first element of the new line).

Author Response

Dear Reviewer 2,

Please find the attached PDF file that includes the answers for the valuable comments.

Best regards,

Sung Min Park

Author Response File: Author Response.pdf

Reviewer 3 Report

Comments and Suggestions for Authors

The manuscript was improved with the process corners information, however is still missing the Monte Carlo simulations with a plot of the characteristics. In paragraph 316 is mentioned a spread of 11.7% but should be present the statistical and plot information.

Author Response

Dear Reviewer 3,

Please find the attached PDF file that includes the answers for the valuable comments.

Best regards,

Sung Min Park

Author Response File: Author Response.pdf

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