A Low Power Low Inrush Current LDO with Different Techniques for PSR and Stability Improvement
Round 1
Reviewer 1 Report
Authors presented a work on "A Low Power Low Inrush Current LDO With Different Techniques for PSR and Stability Improvement" and few points to be addressed.
1. Technology (nm) previous work is also same as proposed work, which parameters are enhanced by using this technique? need to be addressed clearly.
2. LDO gives better stability for wide range of current, there is any mathematical proof? justify
3. In table 1 , what will happen if you add more number of compensation ? is it scalable?
4. Authors need to add some more recent publish work in survey
5. Rearrange the article in technical form
Need to check grammatical errors
Author Response
Comments and Suggestions for Authors
Authors presented a work on "A Low Power Low Inrush Current LDO With Different Techniques for PSR and Stability Improvement" and few points to be addressed.
- Technology (nm) previous work is also same as proposed work, which parameters are enhanced by using this technique? need to be addressed clearly.
This work provides different techniques that can be used for any technology for improving multiple parameters such as PSR, load range, area, and current consumption. This is stated in the table of comparison in the FoM parameter to be compared with other work in literature.
- LDO gives better stability for wide range of current, there is any mathematical proof? justify
Yes. For capped LDOs, the dominant pole is at the LDO output so the stability get worse for higher load current due to lower rout. The work improves the high load current range stability as shown in equations 9 and 13,
|
ωz,cc ⍺ gm,N1 |
(9) |
|
Zout.HF = gm,MPT * rout,MPT * rout,HPT ⫽ RL ⫽ ( RFB1 + RFB2 ) |
(13) |
To avoid the dominant pole frequency increase at high load current and small rout, Equation (13) shows that the design increases the effective rout using the cascaded pass device in the 2nd technique. Also, equation (9) shows that the zero created by the capacitor Cc in the first technique is function in gm,N1 which increases when load current increases. Thus, it keeps increasing beyond the dominant pole to keep the loop stability.
- In table 1 , what will happen if you add more number of compensation ? is it scalable?
It is not a must because if another compensation technique filters the noise at same frequency range compensated in this work, it will not add much improvement. Also, additional circuits add extra power and area consumption which can degrade the high FoM numbers in our comparison.
- Authors need to add some more recent publish work in survey
Done. 5 recent published works (in the last 3 years) are added in the survey as references [8], [9], [10], [11]. And [12].
- Rearrange the article in technical form
The MDPI template was used, and the English was revised
Comments on the Quality of English Language
Need to check grammatical errors
English and grammar have been revised
Reviewer 2 Report
In this manuscript, the author proposed a low drop out voltage regulator with the characteristics such as low power low inrush current, and PSR and stability improvement across different frequencies. Generally speaking, the manuscript is well organized and comprehensively demonstrated. However, I still have several concerns before publication.
1) The introduction of the manuscript didn't include enough background information or state-of-the-art work regarding low drop out voltage regulator. Please revise it accordingly. Ref example:
[1] J. -H. Jang, H. -D. Gwon, T. -H. Kong, J. -H. Yang and B. -D. Choi, "A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 57, no. 8, pp. 2462-2473, Aug. 2022, doi: 10.1109/JSSC.2022.3144437.
[2] S. -Y. Peng, L. -H. Liu, P. -K. Chang, T. -Y. Wang and H. -Y. Li, "A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1318-1327, June 2017, doi: 10.1109/TCSI.2016.2561638.
2) The grey color used in the Figure is not clear enough to be seen. For example, Figure 2 and Figure 4. Also, the length and width ratio of Figure 5 makes the font hard to see. Please improve the resolution of the figures.
3) Some abbreviations should be clarified. For example, page 1, line 43 "the pass transistor MPT, the feedback network resistor divider RFB1 and RFB2, the LDO error, amplifier and a capacitor CFB".
Some sentences are hard to understand and can be refined. For example, page 2, line 49, "However, at higher frequencies and at heavy load currents, the PSR degrades due to the limited LDO loop bandwidth after which rout of the pass devices (MPT) and the loop gain decrease providing low PSR".
Author Response
Comments and Suggestions for Authors
In this manuscript, the author proposed a low drop out voltage regulator with the characteristics such as low power low inrush current, and PSR and stability improvement across different frequencies. Generally speaking, the manuscript is well organized and comprehensively demonstrated. However, I still have several concerns before publication.
1) The introduction of the manuscript didn't include enough background information or state-of-the-art work regarding low drop out voltage regulator. Please revise it accordingly. Ref example:
[1] J. -H. Jang, H. -D. Gwon, T. -H. Kong, J. -H. Yang and B. -D. Choi, "A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 57, no. 8, pp. 2462-2473, Aug. 2022, doi: 10.1109/JSSC.2022.3144437.
[2] S. -Y. Peng, L. -H. Liu, P. -K. Chang, T. -Y. Wang and H. -Y. Li, "A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1318-1327, June 2017, doi: 10.1109/TCSI.2016.2561638.
Done. More details are added in the introduction with extra more 5 recent published works for comparison with the literature.
2) The grey color used in the Figure is not clear enough to be seen. For example, Figure 2 and Figure 4. Also, the length and width ratio of Figure 5 makes the font hard to see. Please improve the resolution of the figures.
Done.
3) Some abbreviations should be clarified. For example, page 1, line 43 "the pass transistor MPT, the feedback network resistor divider RFB1 and RFB2, the LDO error, amplifier and a capacitor CFB".
Done. The devices are just named with its job. MPT refers to main pass transistor, RFB1 and RFB2 refer to feedback resistors 1 and 2 in order, and CFB refers to feedback capacitance.
Comments on the Quality of English Language
English has been revised
Some sentences are hard to understand and can be refined. For example, page 2, line 49, "However, at higher frequencies and at heavy load currents, the PSR degrades due to the limited LDO loop bandwidth after which rout of the pass devices (MPT) and the loop gain decrease providing low PSR".
English and sentences were revised
Reviewer 3 Report
The authors have chosen a CMOS based power low inrush current LDO design, which is becoming increasingly popular in low power CMOS VLSI circuits. Several of the comments are listed below for your consideration.
1. In the introductory sections, please underline all contributions.
2. Make a distinct section for the literature review.
3. Try to lengthen the introductory portion, which is now quite short.
4. Acronyms should be highlighted in the table since numerous terms are not fully defined, as seen in Tables 1–8.
5. What is the function of the cc and cp capacitors in Figure 2?
6. In Figure 4, mention all transistor aspect ratios.
7. The arrangement of Figure 5 is unclear, thus either the figure's resolution should be raised or the modules should be shown separately.
8. Please make this conclusion section to be longer.
I have found that the article's organization is extremely poor. English language is not upto the mark.
Author Response
Comments and Suggestions for Authors
The authors have chosen a CMOS based power low inrush current LDO design, which is becoming increasingly popular in low power CMOS VLSI circuits. Several of the comments are listed below for your consideration.
- In the introductory sections, please underline all contributions.
Done. I underlined the contribution of this work and the work in literature clarifying what is improved for each.
- Make a distinct section for the literature review.
The work in literature (line 62 to 86) is clarified and separated. It is always included in the introduction part in all similar papers. Thus, it’s clarified now it’s standalone section in the introduction part.
- Try to lengthen the introductory portion, which is now quite short.
Done. More details are added in the introduction with extra more 5 recent published works for comparison with the literature.
- Acronyms should be highlighted in the table since numerous terms are not fully defined, as seen in Tables 1–8.
Fixed.
- What is the function of the cc and cp capacitors in Figure 2?
As stated in lines 150 to 160 , CP is added to isolate the added feedforward circuit at DC as it behaves as open circuit. While at high frequency where the feed-forward path is needed to improve the high frequency PSR, CP becomes effective connecting the path without affecting the DC loop gain or the DC operating point. Also, a capacitor CC is added between the source of the device MN1 which is a low impedance node and the LDO output to generate a zero at high frequency ωz,cc. This zero improves the PSR at MHz frequency range and improves the stability across different load currents.
- In Figure 4, mention all transistor aspect ratios.
Done.
- The arrangement of Figure 5 is unclear, thus either the figure's resolution should be raised or the modules should be shown separately.
Done.
- Please make this conclusion section to be longer.
Done.
Comments on the Quality of English Language I have found that the article's organization is extremely poor. English language is not upto the mark.
English has been revised and writing enhanced
Round 2
Reviewer 1 Report
Authors implemented all the points in the revised manuscript
Author Response
Thank you so much
Reviewer 2 Report
In this revised manuscript, the author has resolved all my concerns and questions. The current version is well organized and demonstration is comprehensive. Therefore, I do recommend this to be published.
Author Response
Thank you so much
Reviewer 3 Report
All comments have been modified by the authors. One last comment: taking into account the high standards of this journal, the number of references in your paper is quite low. Please add more references in the revised manuscript. Most of the good quality article has references 20 to 40. We are also suggested some references to add and improve the quality of literature review.
10.1109/TPEL.2018.2826922
https://doi.org/10.1007/s00034-021-01921-4
https://doi.org/10.1016/j.aeue.2022.154355
10.22034/IJND.2023.1986547.2222
Author Response
We added another 10 recent papers to meet the recommended number of references range.
