1. Introduction
For a long time, many types of sensors have been elaborated; these sensors have been developed by the means of various methods and techniques [
1,
2,
3,
4]. Compared to the other sensors, surface acoustic wave detectors (SAWs) have a lot of characteristics that make them more favorable. Among their numerous features we can mention reusability, higher sensitivity, reliability, multifunctionality and noninvasiveness.
SAW device principle is based on the conversion of an interrogative electromagnetic wave into an acoustic one by means of interdigital transducers (IDTs) fabricated over a piezoelectric crystal (
Figure 1). During acoustic wave propagation over the piezo substrate, its velocity changes while the surrounding environment conditions change, the modified acoustic wave is transduced back into an electromagnetic signal that is transmitted for processing (determination of frequency shift or time delay according to the sensor type). The propagation properties (like wavelength and resonance frequency) of acoustic waves in piezoelectric media depend on the substrate material, the crystal cut and the structure of electrodes [
5,
6].
A typical SAW device in sensor applications consists in a transmitting IDT and a receiving one separated by few wavelengths, which constitutes the delay line configuration. IDTs with reflectors (called Bragg reflectors) form the resonator model and are mainly used in telecommunication circuits; they also can be used as sensors [
7].
In this work, a SAW temperature sensor was designed using Silvaco TCAD Tools, Silvaco TCAD refers to technology computer-aided design. TCAD modules required for SAW simulation are Athena and Atlas [
8]. The sensor was simulated using a specific fabrication process that is the CMOS 1 µm technology; this process was adopted because it is the process acquired by our fab. The necessary process steps needed for sensor realization were identified and simulated using Athena module, details about the realization steps inside the cleanroom were described. Characterizations using Atlas module were achieved to determine distribution of dopants, electrical potential and electric field under IDTs. The mask needed for IDTs realization, with different SAWs configurations and dimensions, was designed.
After that, a complementary study, following on from a previous one and performed in the Comsol multiphysics environment, was achieved on two sensors (2 µm and 3 µm IDTs width). The mechanical displacement field at the center frequency of the 3 µm IDTs structure was highlighted and (S11) the variation of the reflection coefficient with temperature ranging from −25 °C to 200 °C was investigated for both structures; their sensitivities were evaluated and the adequate design for sensor realization was adopted.
4. The 1 µm CMOS Process Steps for SAW Sensor Realization
The fabrication of circuits on silicon wafers is done with various layers, each with its own pattern, deposited on the surface by a specific order and over precise areas that are defined by the technological process. The several patterns used while depositing layers on the substrate (or during other realization steps such as doping or etching) are shaped by a process called lithography [
9]. Some technological steps necessary to realize a surface acoustic wave sensor are described in
Figure 2,
Figure 3,
Figure 4 and
Figure 5 resulting from Silvaco simulations (obviously during realization, all these processes take place inside the clean room). We have chosen 1 µm as the IDT length because the aim of this study is to list and understand the SAW realization steps and to have a representative idea of the behavior of the sensor after each one. The final IDT length will be adopted after Comsol characterizations achieved in
Section 6.
The process flow steps needed for SAW sensor realization are:
Substrate initialization (definition), it is a silicon substrate-doped boron for which resistivity is 10 Ohm·cm (concentration 10
15 e
−/cm
3) and orientation is (100). In the fab, the wafer is first cleaned using acetone and ethanol baths, agitated by ultrasound to eliminate most of the surface pollutions (grease, dust, etc. …) [
10]. The ethanol being extremely volatile, its use facilitates the drying of the substrate under dry nitrogen flow, which is done after a rinse with deionized water. It should be noted that the silicon substrates (100) undergo, before this standard cleaning, a hydrofluoric acid bath (HF at 5%) in order to eliminate the native SiO
2 layer present on their surface.
AlN piezoelectric layer deposition (
Figure 2), its thickness is 1.5 µm; AlN thickness was deduced from a previous study which objective was the optimization of SAW technological parameters [
11]. AlN was chosen as the piezoelectric layer because of its several properties and its compatibility with CMOS process [
10]. In fact, in the cleanroom, AlN is deposited using a PVD process (physical vapor deposition) with a specific recipe [
12] inside a PVD cluster tool called the MRC Star Eclipse. Sputtering is the technique used for AlN deposition. It is a relatively simple and industrialized technique, allowing the deposition of thin films on various substrates at relatively low temperatures (<400 °C) and therefore CMOS compatible. Thus, for the realization of the sensor’s piezoelectric layer an aluminum target is placed in an atmosphere constituted of an inert gas (Argon Ar) and a reactive gas (Nitrogen N
2). The nitrogen molecules are split and the nitrogen atoms (N) react with the aluminum target to form AlN. Argon is then sprayed onto the AlN created on the surface of the target to form the thin film on the substrate that is attached to the anode [
12].
First metal layer deposition (
Figure 3), the first metal layer is titanium that is 0.115 nm thick (100 nm TiN + 15 nm Ti). Ti, TiN layer is a barrier used to prevent metal diffusion into Si and to improve its adhesion This Ti layer has the characteristic of being very adhesive to Si and SiO2. In the cleanroom, it is a PVD deposition using MRC Star Eclipse tool.
Second metal layer deposition, it is Al that is 500 nm-thick (
Figure 3). Aluminum is the metal used in the 1 µm CMOS process (deposited by PVD technique in the cleanroom on the whole substrate surface).
The following step is
metal etch for SAW sensor IDTs formation. Such a process is done in two steps: first, the lithography step where we deposit a protection layer called photoresist and, second, etching step where only the open areas of the metal are etched. During simulations, the photolithographic step consists in photoresist deposition; its thickness in our process is 1.2 µm (
Figure 4a), and the photoresist etch opens the areas of the metal to be etched (
Figure 4b).
Inside the cleanroom, these two steps are completed as follows: a layer of photoresist (PR) material is first spin-coated on the surface of the wafer using SVG 8800 tool. The resist layer is then selectively exposed to radiation such as ultraviolet light, with the exposed areas defined by the exposure tool mask which is UV i-line Stepper GCA, i.e., we use ultraviolet light to form patterns on the photoresist through printing. After exposure, the PR layer is subjected to development, which destroys unwanted areas of the PR layer, and allows exposing the corresponding underlying layer (the unwanted areas in the PR are dissolved by the developer SVG 8800 tool).
After that,
aluminum and titanium are dry etched to get read of them between the covered IDTs (
Figure 5). In the cleanroom, metal dry etch is achieved in the LAM 9600 tool, which is a reactive ion etching reactor (RIE) that allows, added to metal etch, in situ resist etching and metal rinsing and drying to avoid the metal corrosion phenomenon. This tool uses chlorine (Cl
2) and argon (Ar) plasma to achieve the metal etch, oxygen (O
2) to etch the photoresist inside the tool and azote (N
2) to dry the wafer. The accuracy of the metal etch is very important, because IDTs pitch etch accuracy influences the response signal and helps reducing the noise [
13,
14].
The remaining
photoresist is etched later (
Figure 6). In the fab, photoresist for metal patterning is etched inside the LAM 9600 metal etcher but the photoresist used for other technological steps is etched in the Tepla 300 tool, which is a microwave, high-frequency reactor that uses oxygen plasma. The photoresist can also be etched through the wet etch process. In this case, liquid solutions (like HF) are used to remove the photoresist and other chemicals to clean the wafer, the chemicals used depend on the required etch selectivity. Many tools are employed, such as the Spray Cleaner Semitool. The wet etch process is also used in some technological steps where the anisotropy (etch directionality) is not a critical criterion.
Inside the cleanroom and for metal passivation, an oxide layer, namely silicon nitride (SiON) is deposited. Its thickness is 1.5 µm and it is later etched to open the bond pad.
The simulated sensor is a one-port resonator with number of IDT pairs
Np = 16; it is represented in
Figure 6 next to the N and P transistors resulting from the 1 µm CMOS process flow simulation. The sensor was simulated using the 1 µm process steps that overlap with those necessary for its realization, i.e., within the 1 µm process flow; which gives a sensor on the same substrate (in the same die) with the N and P transistors.
5. CMOS Process and Devices Validation
To validate our process simulation results, characterizations of the resulting PMOS and NMOS transistors were achieved in the Atlas tool to evaluate their IDS = f (VDS) curves. The latter were compared to curves issued from experimental characterizations performed on devices realized by 1 µm CMOS technology in ISIT fab (Experimental ISIT structures). The results are represented in
Figure 7a,b, and they show a good agreement between experimental curves and those issued from simulations, for both N and PMOS structures.
Electrical characterizations in terms of dopant concentrations, electric potential and electric field distribution under IDT electrodes (
Figure 8a–c) are achieved on the obtained SAW sensor using Atlas module. From
Figure 8a, we deduce that the highest concentration is under the source and drain electrodes added to the poly-gate of the N and P transistors. It is around 10
21 e
−/cm
3. In
Figure 8b, we can see the electrical potential distribution under IDT electrodes after the application of 5V voltage. This electrical potential induces an electric field (
Figure 8c) that launches, by reverse piezoelectric effect (Equation (3) [
15]), a surface acoustic wave propagating over the AlN piezoelectric layer.
7. Multiphysics Simulation of the Designed SAW Sensor
A 2D finite element method (FEM) simulation using Comsol software was used to evaluate the physical and electrical behaviors of two SAW sensors. The sensors are one-port resonator type, they differ in the length of IDTs “
a” and each of them has
Np = 16. The ongoing study follows on from a previous one [
11] which the objective was the optimization of SAW geometrical parameters. The perspectives of the cited work were the investigation of 2 µm and 3 µm structures (corresponding to 8 µm and 12 µm wavelengths respectively) and the results presented in the current study concern their sensitivities, since the other characteristics (like velocity and reflectivity) have already been studied and were interesting [
11].
When simulating SAW devices in Comsol, boundary conditions are imposed to the structure: the acoustic displacements and stresses are assumed continuous at the AlN-silicon interface and both top and bottom sides of the structure are assumed to be stress free surfaces. In order to avoid the slowness of the calculations, silicon depth is fixed at
3λ and a perfectly matched layer (
PML) approximation is used to simulate the endless edges of the structure. Its thickness is 1.5
λ [
11].
The mechanical displacement field, of the 3 µm IDT length structure, is represented in
Figure 10a; one can notice that this mechanical field is located in the interface between the Al and AlN layer, which is a characteristic of the Rayleigh mode surface acoustic wave.
8. Conclusions
In the past, researchers depended on experiments to design and develop SAW devices but, nowadays, the design of SAW devices is enhanced by the use of modeling techniques such as TCAD and FEM, which helps the study of all their characteristics. In this paper, SAW temperature sensors were designed and simulated using Silvaco TCAD tools and Comsol Multiphysics software. The simulated SAW temperature sensors consist in a silicon substrate on which an AlN piezoelectric layer has been deposited; AlN was chosen for its compatibility with the 1 µm CMOS process available in our cleanroom. The electrodes are made of aluminum. The process steps for SAW realization are described by indicating their course inside the cleanroom; electrical properties like potential and electric field distribution were extracted using Atlas Silvaco module.
We performed FEM analysis of acoustic waves propagating on two SAW devices (8 µm and 12 µm wavelengths working at 600 and 400 MHz frequency respectively). Mechanical characterizations in terms of mechanical displacement field and electrical characterizations in terms of electrical power reflection coefficient (S11) were performed while temperature was varied. S11 variation with temperature showed a shift toward low frequencies when temperature increased whereas its magnitude rose. The sensor-calculated sensitivities were S = 19.10 ppm/°C and S = 23.53 ppm/°C for 600 MHz and 400 MHz devices respectively. Knowing that this sensitivity was evaluated at S = 8.53 ppm/°C for the structure of 1 µm IDTs (f0 = 1.16 GHz, previous work), we deduce that the structure with 3 µm IDTs length gives the best sensitivity added to acceptable other characteristics, which makes it a good candidate for the manufacture of our SAW temperature sensor.