Assembly and Bilayer Liftoff of Periodic Nanostructures with Sub-20 nm Resolution Using Thermal Scanning Probe Lithography

Abstract

The demands for high resolution fabrication processes are ever-increasing, with new and optimized methodologies being highly relevant across several scientific fields. We systematically investigated thermal scanning probe lithography process and detailed how tuning temperature and probe contact time on the sample can optimize patterning and achieve 10 nm resolution. Additionally, we propose a novel fabrication methodology that integrates thermal scanning probe lithography and bilayer liftoff, achieving sub-20 nm resolution of the final metallized structures. Each step of the process, from sample preparation to the final liftoff, is described in detail. We also present a quantitative analysis comparing the accuracy of the lithography process to that of the bilayer liftoff. Finally, we show the feasibility of using thermal scanning probe lithography for the fabrication of photonic devices by validating our work with promising dipole geometries for this field.

1. Introduction

Silicon photonics currently dominates the advances in communication systems. By uniquely providing high-density, long-distance transmissions and satisfactory integration with past and ongoing CMOS industries, research in silicon photonics is key to boosting not only the communication industry but several others that are derived, including materials and sensing. Yet, with silicon photonics technology, new claims come along; among several, we emphasize the development of silicon compatible photonic devices [1].

The studies on plasmonics are sound approaches to developing those compatible devices, such as resonators, antennas, optical switches, and many others, all at a sub-wavelength scale [2]. Due to the strong confinement of electrical field and overcoming the diffraction limit, these metallic sub-wavelength structures can be widely exploited. Manipulating phase [3], converting radiation [4], sensing [5], and lasers [6] are just a few recent examples of their applicability. Common to all of those is the challenge to fabricate these nanostructures with high resolution and flexibility of design.

So far, the fabrication of nanostructures has been dominated by electron beam lithography (EBL) and focused ion beam lithography (FIB) [7]. With EBL, it is possible to achieve sub-10 nm resolution; however, the process is expensive and time-consuming. Moreover, it is a complex process, and, although there is a satisfactory resolution, proximity effects and the density of patterns are disadvantages that limit the fabrication [8]. As for FIB, the process is also time-consuming, and it is not high throughput [9].

Nanoimprint lithography (NIL) has been considered an alternative to both EBL and FIB. Resolution is comparable to the former techniques and there is high throughput. NIL is based on pressing a hard mold onto a flexible and malleable resist; further, the mold is etched with the desired nanopatterns and, when heat and pressure are applied, the patterns are transferred to the resist [10].

Though NIL has solved the scalability issue, the prior fabrication of the mold is mandatory. The mold needs to be etched with high resolution, typically using EBL [11]. Hence, NIL is an advantageous fabrication method, but it should be combined with others to achieve high resolution, in the nanometric scale.

Scanning probe lithography methods can be an alternative to directly achieve high resolution without proximity effects. These methods are based on a nanometric sharp tip that scans the sample and carve patterns [12]. Among them, we can cite oxidation-scanning probe lithography (O-SPL) [13], dip-pen scanning probe lithography fabrication (D-SPL) [14], and mechanical scanning probe lithography (M-SPL) [15].

All these techniques modify the surface of the sample by transferring specific patterns in the nanoscale. However, O-SPL requires oxidized samples, and its control for patterning large areas is challenging [12]. D-SPL has been successfully applied to microfluidic processes [16], but it is limited by the size of the inks and the inhomogeneities of the structures [17]. On the other hand, M-SPL exhibits precise movement control resulting in reliable structures [18], though the process is not efficient due to excessive probe deterioration [12].

Thermal scanning probe lithography (t-SPL) combines the features of a direct, maskless, top–down lithography technique. Furthermore, it does not require any level of oxidation, has a wide material compatibility and the lifetime of the probe is advantageous. In t-SPL, patterns, at the nanometric scale, are written on thermally structurable resists. The probe is a sharp n-doped silicon tip that can be heated up to 1100 °C, allowing for fast sublimation of the resist. Once the heated tip is in contact with the resist, patterns are created with comparable resolution to other fabrication methods [19].

The necessary tools for a t-SPL are as compact as a small glove box. The process does not require high-standard clean rooms, and the components are more cost beneficial than the ones for EBL and FIB [20]. It is also possible to evaluate the quality of the lithography simultaneously with patterning, as there is coupled atomic force microscopy (AFM) imaging to the system. t-SPL is still mainly used in academia when typical writing speeds are in the order of 50 μs⁻¹; however, researchers [21] have found that it is possible to maintain 10 nm-resolution for up to 20 mm · s⁻¹ speeds, at 500 kHz.

Although sub-10 nm resolutions using t-SPL have already been reported [21,22,23], little has been found on how to tune t-SPL parameters to achieve such resolutions. Moreover, these fine-resolution results refer to patterning only. To efficiently fabricate nanodevices without the use of masks, it is essential to perform liftoff and maintain a fine resolution throughout all processes.

Here, we investigate the fabrication of nanostructures using t-SPL and a bilayer liftoff process that enables a sub-20 nm resolution in the final pattern. We detail how the probe temperature and contact time affect lithography. Additionally, we integrate this lithography technique with metallization and a bilayer liftoff process, maintaining sub-20 nm resolution even after the liftoff steps.

Inspired by the demands in photonics [24,25], we validate our work with the fabrication of metallic dipole nanoantennas. These can be understood as high-conductivity nanoparticles with unique properties to control light and exhibit a strong, confined electrical field. Therefore, achieving the high-resolution and robust fabrication of such nanoantennas allows the precise control of electromagnetic properties and enables remarkable advances in the field.

2. Materials and Methods

The resolution capabilities of scanning probe lithography have stood out among other lithography techniques for decades. However, its implementation has been limited by the throughput of tens of micrometers per second [26]. With t-SPL, on the other hand, the patterning speed is, on average, 1 mm · s⁻¹. The thermal properties of the top polymeric layer in a bilayer configuration significantly contribute to this improvement [20].

The top polymeric resist is polyphthaldehyde polymer (PPA). Commercially available in powder (AR-P 8100 series-Phoenix 81-AllResist), it can be prepared in an anisole solution and then spin-coated into thin and stable films. In short, mass spectroscopy and attenuated total reflection fourier transform infrared spectroscopy (ATR-FTIR) analysis [27] showed that, under heat application of approximately 215 °C, PPA sublimates and therefore can be removed from the substrate, leaving minimal residues.

As a consequence of its thermal response, PPA does not contaminate the lithography probe, and its sharp conical geometry is maintained during lithography, resulting in a fine patterning resolution.

Literature and technical manuals from t-SPL equipment manufacturers [28,29] suggest using additional silicon hard masks during the process, to achieve higher resolution.

However, the use of a silicon hard mask requires complementary coating processes and increases fabrication costs. The masks are specified once the films are just a few nanometers thick, and they require fine reactive ion etching using polymerizing gases like CHF₃.

Therefore, proposing a fabrication methodology that achieves sub-20 nm resolution without the use of additional materials such as silicon hard masks is attractive for both academic and industry purposes.

We propose, here, a simple and high-resolution nanofabrication using t-SPL, where the patterning depth is approximately the thickness of the PPA. By being able to finely tune the patterning depth, we can perform facile bilayer liftoff of the patterns.

The methodology suggested in this work is depicted in Figure 1. In our case, a silicon wafer is used as a substrate. Radio Corporation of America (RCA) and oxygen plasma cleaning processes are used to remove any contaminants from the substrates.

The substrate is spin-coated at 4000 rpm for 30 s, with a 1:3 solution of polymethyl (methacrylate-co-methacrylic acid) (PMMA) (AR-P 617.06-AllResist, Strausberg, Germany), the liftoff resist. Then, a $2.5\%$ solution of PPA, at 6000 rpm for 30 s is spin-coated on top of the PMMA supporting layer. Soft baking is performed at the end of each coating process for PMMA at 180 °C for 90 s, and for PPA, at 110 °C for 120 s. At these rates, the thickness of the PMMA film is, approximately, 30 nm, and the PPA film is 20 nm. PMMA presents better adhesion to the Si substrate than PPA besides acting as a protective layer to the probe, hence its application as the liftoff resist.

Once the silicon wafer is coated with both top and bottom resists, the sample undergoes t-SPL. The equipment used in this work is NanoFrazor by Heidelberg Instruments (Heidelberg, Germany). The thermal cantilevers are NanoFrazor Monopede, from Heidelberg Instruments (series 2019-11), Heidelberg, Germany. The first step is to upload the desired geometry in .gds format, so lithography can be performed accordingly. Thus, this process does not require a mask imprinted with the pattern, allowing great flexibility of the designs, as layouts can be fabricated with a simple .gds upload.

Before patterning begins, the probe maps the sample to set the leveling parameters and the probe’s approach and retract distances (Figure 1a). The patterning temperature and the contact time between the probe and sample are manually set and must be optimized. The investigation of these parameters is quantified in the following section.

After all parameters are set, the probe is heated and displaced according to the uploaded layout. The PPA sublimates in the regions where the hot probe approaches the resist-coated surface (Figure 1b), and the patterns are created. It is possible to evaluate the lithography while patterning takes place. The probe has a dedicated reading sensor that enables in situ AFM imaging.

As our objective is to entirely remove the PPA film according to the pattern, even a few nanometers of remaining PPA could compromise the fabrication of the devices. Therefore, an essential fabrication step is to submit the sample to a downstream descumming oxygen plasma cleaning to ensure that no PPA residues are left during lithography (Figure 1c). Both resists used are quite sensitive to plasma etching and only a few seconds of direct plasma processing can entirely remove the films. For this reason, the downstream oxygen plasma is used, as it is more gentle. Both PMMA and PPA present similar plasma etching rates. Approximately, for a downstream oxygen plasma at 75 W with a 10 sccm flow, 6 nm of resist is removed per minute. Thus, to avoid the complete removal of the PPA layer of the sample but ensure that a few remaining nanometers of the patterned regions are removed, the plasma process is carried out for 30 $\mathrm{s}$.

Hence, we are certain that the PMMA film is exposed in the patterned areas. A wet etch with pure ethanol is performed to selectively remove the PMMA (Figure 1d). The PPA film is resistant to ethanol, so it protects the unpatterned areas of the sample. A 40 s immersion of the sample into an ethanol bath is enough to clear the 30 nm of PMMA film. A gentle circular motion during etching can be helpful. Then, the samples are rinsed with isopropyl alcohol and dried with N₂ air flow at the end of the process.

At this point, the above-mentioned concern still applies. It is necessary to guarantee that etching has cleared all resists. Consequently, another remote oxygen plasma process is performed (Figure 1e). The plasma etching rates for PPA and PMMA are approximately the same, so the same plasma conditions are repeated.

It is worth noting that wet etching presents a partially anisotropic profile whilst for the remote plasma, etching is mostly isotropic. So besides ensuring etching until the substrate, the plasma processes can enhance occasional defects caused by etching with the ethanol immersion.

Keeping in mind the validation of the methodology with photonic-inspired nanostructures, the samples are ready for metal deposition.

Using electron beam evaporation (AJA-International, Hingham, MA, USA), 30 nm of gold is deposited. To promote better adhesion on the substrate, a 5 nm layer of Ti is earlier evaporated (Figure 1f). The evaporation processes take place at a high pressure of approximately $1·{10}^{-7}$ torr and at electrical currents of 117 m$\mathrm{A}$ for gold deposition and $57.5$ m$\mathrm{A}$ for the bottom layer Ti deposition.

After metal deposition, the samples are ready for a straightforward bilayer liftoff. The samples, coated with gold, are immersed in acetone. The PMMA film immediately detaches from the substrate, and then only the gold patterns remain. The samples are rinsed with isopropyl alcohol and dried with N₂ air flow (Figure 1g).

Finally, the device is ready for applications, and the bilayer liftoff methodology using t-SPL is validated. The following sections of this work describe the fabrication parameters and quantify the achieved resolution at each step.

Optical microscopy (Olympus upright, UC 50 CCD, Tokyo, Japan) and scanning electron microscopy (SEM) (Hitachi S-3400N, Pleasanton, CA, USA) are used to analyze the results obtained, in addition to AFM, which is coupled to the NanoFrazor apparatus.

3. Results

3.1. Periodic Nanostructures

Based on promising photonic devices that require high-resolution fabrication, gold dipole nanostructures are chosen for fabrication in this work [24,30].

The unit cell of the dipole pattern, exhibited in (Figure 2), consists of two identical nanoellipses with main horizontal and vertical axes labeled as $\Delta x$ and $\Delta y$, and the distance between each nanoellipse is referred as the gap. For this pattern, three different designs (Designs 1, 2, and 3) with distinct dimensions are considered.

Table 1. Dimensions of proposed nanostructures.

Design	Horizontal Axis [nm]	Vertical Axis [nm]	Gap [nm]
1	960	480	120
2	480	240	80
3	220	110	20

details the dimensions for each design to be fabricated using t-SPL on silicon.

3.2. Fabrication Parameters Optimization

The t-SPL technique is a promising lithography method that has yielded successful results [31]. However, achieving high-resolution patterning requires the precise optimization of several fabrication parameters. One of the critical parameters is the force pulse, which is maintained at 5 μs as recommended by previous studies [20]. In addition to the force pulse, the temperature of the tip and the duration for which the tip remains on each pixel (referred to as ‘pixel time’) are also significant factors influencing patterning. In this work, we demonstrate how these parameters can be fine-tuned to optimize lithography.

As the objective is to fabricate the structures earlier presented, a unit cell of the dipole geometry is used to show the influence of the temperature and pixel time. It is important to notice that the size of the pixel is also a fundamental feature to be analyzed; however, in order to finely pattern nanostructures, it is acceptable that the spatial size of the pixel be as small as possible, in our case, 2 nm × 2 nm. Therefore, the pixel size will be constant at this value throughout this research.

Initially, the pixel time is kept at 35 μs, and temperature values are swept from 660 °C to 770 °C. To ensure that the depth matches the PPA thickness, the target depth of the patterning is set at 21 nm. Figure 3a shows that the patterned depth and temperature do not follow a linear relation. The black markers, in the graph, represent the patterning depths obtained through AFM; the solid red line is the target depth 21 nm. From this result, we find that the temperature should be set within the range from 690 °C to 710 °C so that the depth approaches the target.

The depth from 660 °C until 700 °C increases faster than for the other range, from 700 °C to 770 °C. This fact indicates that there is a saturation regime, where increasing the temperature is less significant for the depth. We should also take into account that, once the PPA is completely removed, in the patterned region, by the thermal probe, the PMMA layer is then exposed. PMMA exhibits different thermal properties from PPA. Its ablation temperature is greater than 250 °C, which means once the probe encounters the PMMA layer, the rate of resist removal slows down. Therefore, for the thickness of the PPA film of approximately 20 nm, the temperature is set at 710 °C to properly pattern the top layer according to the desired geometry.

Thus, once the temperature range is optimized, lithography should be performed in intermediate values to preserve the resolution. To ensure that the PPA is completely removed, fast and remote O₂ plasma processes must be carried out as proposed earlier.

As temperature optimization may result in relatively short ranges, the pixel time parameter comes out as a complementary adjustment of depth. By keeping the temperature constant at 680 °C and varying the pixel time from 20 μs to 50 μs, we find a significant and direct effect on the patterned depth. Experimental results are shown in Figure 3b. For the same temperature, the depth varies 7 nm in the analyzed pixel time range.

Hence, both the temperature and pixel time parameters can be adjusted so that the patterning depth approaches the PPA thickness. If lithography is performed at a temperature well above the appropriate range, the contact with the PMMA may contaminate the probe.

The quality of the scanning probe is another crucial point for high-quality lithography. Its conical shape is a limiting factor on the dimensions that can be acquired. As the width of the tip is, approximately, 10 nm at the apex, it can impair structures at this order of magnitude. Considering shallow nanostructures (≤100 nm), a model is reported to account for the tip influence [32].

As an evaluation of the probe quality, an automatic calibration is performed at the initialization of the lithography, generating a parameter called adhesion length. The adhesion length is the height difference of when the probe approaches the sample until contact is made and when the probe is lifted, losing such contact. Sharp new probes exhibit low nanometric values for the adhesion length, and it can be monitored during the t-SPL process [32].

If the adhesion length is greater than 35 nm, we have an indication that this probe is no longer optimized for patterning shallow or two-dimensional structures. However, it can still be used for three-dimensional patterning. In this work, the adhesion length is monitored during the t-SPL processes and only probes exhibiting adhesion lengths lower than 5 nm are used.

Probe contamination can occur due to several events, among which include the adherence of polymer onto the probe and even dust on the sample; these residues may be dragged during lithography and cause defects on the structure. They could also directly defect the probe leading to its partially or completely break. All these issues result in poor patterning and significant loss in resolution. Examples of a brand new t-SPL tip and damaged ones are exhibited in Figure 4. In Figure 4a, we show a sharp probe with an adhesion length of $3.77$ nm, and in Figure 4b, the approach and retract calibration fail, and the adhesion length is even computed. Yet, in Figure 4c, a value of $113.68$ nm is retrieved from calibration, indicating an enlargement of the tip and loss in resolution.

3.3. Analysis of Periodic Nanostructures Fabricated Using t-SPL

The fabrication of nanoantennas arrays has been a challenge due to the nanometric dimensions of each unit cell. Therefore, in this work, we show how t-SPL with optimized temperature and contact time parameters can be used to fabricate arrays of gold nanoantennas. Moreover, we demonstrate how this technique can be integrated with metallization and simple bilayer liftoff processes.

Keeping these objectives in mind, designs 1 and 2, from Table 1, are fully fabricated. They are specifically chosen for exhibiting resonances at, approximately, 633 nm [30].

With the NanoFrazor apparatus, AFM readings are obtained in situ during patterning. The probe cantilever is equipped with a dedicated sensor for writing and another for AFM acquisition. In Figure 5a,c, we exhibit AFM images acquired during the lithography of fabricated designs 1 and 2, with some typical defects. A three-dimensional perspective is also shown in Figure 5b,d. In those, it is possible to notice the voids that are created by resist sublimation according to the proposed patterns Figure 2.

To better illustrate the nanopatterning that can be achieved with t-SPL, after parameter optimization, design 3, with a gap of only 20 nm is patterned with this methodology. The unit cell can be seen in Figure 5e,f. However, its dimensions yield to resonances out of the visible spectrum and are out of the scope for the applications proposed in this work. So, liftoff is not performed with design 3.

The fabricated periodic nanostructures are evaluated in two different moments. The first analysis is carried out with AFM simultaneously with t-SPL, so the patterns can be readily investigated during the lithography process. The second moment is an SEM inspection of the array, after liftoff has been performed. The former examination leads to final conclusions about the efficiency of the proposed method with t-SPL, as, at this point, the array is ready for applications in photonics.

Considering the first design detailed in Table 1, four parameters are analyzed in a $4\times 5$ array. They are the horizontal and vertical axes, respectively labeled $\Delta x$ and $\Delta y$, the gap between each nanoantenna, and the patterning depth. Experimental results can be found in Figure 6.

In the graphs shown in Figure 6, the red solid lines indicate the aimed dimensions. The measurement for the horizontal axis is targeted at 960 nm and for the vertical axis at 480 nm. As the unit cell is composed of two nanostructures, the analysis is carried out for each one individually. In Figure 6a,b, their measurements are distinguished by the blue markers for the structure on the right side of the unit cell, and the black markers for the structure on the left side of the unit cell.

A statistical analysis is performed for each of the analyzed dimensions. The bars on each marker exhibit the corresponding errors. We find that the standard deviations due to lithography errors in the horizontal and vertical axes are, respectively, 7 nm and 6 nm. The proximity of these results indicates that both axes are patterned with similarly high resolution. Any discrepancies in those could indicate deformities in the probe or a misplacement in the cantilever.

As for the gap between structures in the unit cell, the standard deviation is slightly lower, at 4 nm. To create the gap, the probe should skip that region without applying any heat. With reduced temperature conditions, the resolution becomes even finer, as the primary source of error is limited to the probe size. Using a new, sharp probe with a nominal radius of less than 5 nm, we find the high patterning resolution to be solid and reproducible.

The effect of the temperature and the probe contact time on the depth of patterns is elaborated in Figure 3. Achieving the correct depth of the patterning resist PPA is key for a successful liftoff. For patterning this array of nanostructures, the temperature is set in 700 °C and the contact time is set at 30 μs. The objective is to etch the 20 nm of spin-coated PPA; the target, however, is set at 21 nm. Even so, from the results in Figure 6d, we find that, on average, 18 nm of PPA is etched with the scanning probe, with a 4 nm standard deviation.

Although negligible at first sight, the 3 nm difference between the etched and target depth can cause the remaining fabrication of the periodic nanostructures to fail. For a standard bilayer liftoff, at this step, the sample should be ready for wet etching PMMA and metal deposition. However, as a nanometric residue of PPA may linger on the patterns, wet etching would not remove PMMA, as PPA is resistant to PMMA solvents.

In Figure 6d, two specific data points are enclosed in a dashed black ellipse. These nanostructures are shallower than the others, although the patterning conditions are the same. This might have occurred due to inhomogeneities while spin-coating the resists. If any of the spin-coated films present regions where the variation in roughness is not negligible compared to their thicknesses, impairments during the fabrication process are expected.

The fabrication methodology is followed as aforementioned and finalized with the acetone liftoff after gold deposition. The final array, post-liftoff, can be seen in Figure 7.

We immediately notice faults in the array. Two cells are missing in the top row as shown in Figure 7a. After careful analysis, we identify those cells as samples 3 and 4, in Figure 6d. As expected, due to irregularities in resist coating, those nanostructures are patterned too shallowly, and as a result, the substrate is not exposed, and the metal does not adhere properly.

We analyze the dimensions of each cell in the array to compare them with the uploaded layout. The results are compiled in Figure 8.

Considering the horizontal axis (Figure 8a), we see an outlier data point at sample 2 for the nanostructure on the left side of the cell. As the depth patterning and the overall lithography are satisfactory for this unit cell, we conclude that experimental errors during PMMA etching or during liftoff occur. As this type of error does not take place in any of the other samples, we conclude that it is a single event with small possibility of repeating. Thus, disregarding this outlier value and considering all other measurements from the left side of each cell, the standard deviation found is 15 nm. As for the dimensions measured, in the horizontal axis, for the nanostructures on the right side of the cell, the standard deviation agrees, and the value found is also 15 nm.

By having the same standard deviation for both structures on the cells, we determine that the post-lithography processes (etching and bilayer liftoff) are homogeneous.

From Figure 8c data, we conclude that the error associated to the gap between nanostructures is 12 nm.

In Figure 9, we present both AFM and post-liftoff SEM images of the unit cells for design 2, which presents half of the dimensions of design 1. Although each unit size is significantly decreased compared to design 1, the accuracy results for the lithography and for the final periodic array, post-liftoff, are $7.6$ nm and $14.4$ nm, which are quite close to the accuracy results for design 1. This shows that the fabrication using t-SPL and the bilayer liftoff are sound and can be scalable to the resolution limit.

Equivalent analyses are carried out for design 2. Periodic arrays are fabricated using t-SPL, and their dimensions on the horizontal and vertical axes are measured, along with the distance between structures in the unit cell. The accuracy results for each analyzed design, post-t-SPL and post-bilayer, are summarized in

Table 2. Average accuracy analysis for t-SPL and bilayer liftoff.

Design	Lithography Accuracy [nm]	Post Bilayer Liftoff Accuracy [nm]
1	5.8	13.5
2	7.6	14.4

.

Overall, considering the designs of interest and the analysis of the influence of the probe temperature and the period of time that the probe lasts in each pixel, a temperature of 700 °C and pixel time of 30 μs, while maintaining the force pulse at 5 μs, result in a sub-10 nm patterning resolution. When combining the optimized t-SPL with etching, metallization, and the proposed bilayer liftoff, the resolution of the final devices is sub-20 nm as shown in Table 2.

Due to the simplicity of the post-lithography processes and the elimination of the need for additional mask coatings, we consider the presented fabrication of the nanostructures to be successful. Tuning both the temperature and pixel time during patterning enables a bilayer liftoff, and the use of remote oxygen plasma etching ensures that the liftoff is fully implemented.

4. Conclusions

Significant advancements in nanofabrication are investigated in this work by integrating a bilayer liftoff process with thermal scanning lithography. Although patterning by t-SPL is an established technique, little has been found on the influence and optimization of the probe temperature and the exposure time of each pixel. In addition, the suggestion to achieve sub-10 nm patterning resolution is based on the use of complementary hard masks [29].

In this study, we detail how temperature and exposure time affect lithography. By understanding and tuning these parameters, we refine the lithography and precisely control the patterning depth. We determine the optimal values to achieve sub-10 nm resolution for patterning photonics-inspired nanostructures of varying sizes. We also show that it is possible to obtain these features without using additional hard masks. By eliminating the need for hard masks for sub-10 nm features, the entire nanofabrication methodology becomes less complex while maintaining high resolution.

Although several studies have achieved similar patterning resolutions, they have not resulted in a final, functioning device. Our approach enables the integration of metallization and bilayer liftoff processes for the patterned samples, thereby completing the nanofabrication and producing a device that is ready for applications.

The bilayer liftoff process involves etching a liftoff resist, in our case PMMA, until the silicon substrate is exposed in the patterned regions. This etching step combines downstream O₂ plasma with wet etching in ethyl alcohol. The sample is then coated with evaporated gold and a prior thin 5 nm layer of titanium for adhesion purposes. Finally, liftoff is performed in acetone. These steps are essential for fabricating a functional device. However, these additional processes introduce errors in the final metallic nanostructures. Therefore, we quantitatively evaluate how much the resolution is impaired in completing the fabrication process.

With the processes proposed and described, we are able to maintain a sub-20 nm resolution post-metallization and post-liftoff processes for gold nanoellipse arrays.

The information presented in this study contributes to various applications that require the nanofabrication of devices, among them, nano- and microelectronics, photonics, biotechnology and sensing. The combination of the advantages of t-SPL with the sub-20 nm final resolution methodology offers robust and validated results that can be explored in any of these fields.