Design and Application of 3D Semiconductor Devices

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Semiconductor Devices".

Deadline for manuscript submissions: 15 January 2025 | Viewed by 70

Special Issue Editors


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Guest Editor
Materials Science and Engineering, University of California San Diego, La Jolla, CA 92093, USA
Interests: 2D materials; 1D materials; nanofabrication; atomic layer deposition; chemical vapor deposition; physical vapor deposition; logic application; carbon nanotube transistor; etch; surface science; surface treatment; flowable chemical vapor deposition

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Guest Editor
Department of Mechanical Engineering, University of California, San Diego, La Jolla, CA 92093, USA
Interests: application of materials in micro-/nano-electro-mechanical systems (MEMS/NEMS); biomolecular sensors

Special Issue Information

Dear Colleagues,

I am Zichen Zhang, a UCSD PhD graduate specializing in carbon nanotube field-effect transistors. My research centers on defect-free ultra-thin gate oxide for low-dimensional materials like carbon nanotubes (1D), MoS2, and WeSe (2D). I specialize in electrostatic doping and employ conventional nano-fabrication techniques such as ALD/CVD/PVD, ICP/CCP etching, and photolithography. Published in IEDM, EDL, ACS AMI, ACS Nano, and Nature Electronics, I now work as a process integration engineer at Applied Materials, focusing on CFET and BPD programs, developing test vehicles for advanced node validation. My research interests span advanced node logic integration processes, low-dimensional semiconductor devices, conventional nano-fabrication methods, and electronic materials.

The demand for modern semiconductor technology is unprecedented, driven by the insatiable thirst for faster, more powerful electronic devices across various industries. From smartphones to supercomputers, the relentless pursuit of smaller, faster, and more energy-efficient devices necessitates breakthroughs in semiconductor technology. However, this pursuit is accompanied by formidable challenges, particularly in power delivery and transistor design. One significant challenge lies in optimizing power delivery, especially through innovative approaches like backside power delivery (BPD). Enhancing power delivery efficiency not only improves device performance but also reduces energy consumption and heat dissipation. Moreover, the evolution of smaller and more efficient devices hinges on advancements in transistor technology, particularly, complementary field-effect transistors (cFETs). These transistors offer superior performance and energy efficiency, which are critical for meeting the demands of modern electronics. Additionally, leveraging low-dimensional channel materials presents a promising avenue for enhancing transistor performance. By harnessing the unique properties of these materials, such as graphene or carbon nanotubes, researchers aim to overcome current limitations and unlock new possibilities for semiconductor technology.

In this Special Issue, we explore the challenges facing modern semiconductor technology. We emphasize the significance of innovations in process pathfinding and present potential solutions offered by new materials research as promising pathways toward meeting the demands of the future electronic landscape.

Dr. Zichen Zhang
Prof. Dr. Prabhakar R. Bandaru
Guest Editors

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Keywords

  • materials science
  • nano fabrication
  • atomic layer deposition
  • low-dimensional channel materials
  • complementary field-effect transistor
  • backside power delivery
  • semiconductor devices

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