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Sensors and Sensor Interface Integrated Circuit Design: Research and Applications

A special issue of Sensors (ISSN 1424-8220). This special issue belongs to the section "Physical Sensors".

Deadline for manuscript submissions: closed (20 November 2023) | Viewed by 8353

Special Issue Editors


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Guest Editor
Electronics Laboratory, Department of Physics, Aristotle University of Thessaloniki, 541 24 Thessaloniki, Greece
Interests: mixed signal integrated circuits; CMOS; analog/RF circuits; application specific integrated circuits; transconductance; filters; signal and power integrity; modeling and simulation; design system development

E-Mail Website
Guest Editor
Electronics Laboratory, Department of Physics, Aristotle University of Thessaloniki, 541 24 Thessaloniki, Greece
Interests: analog integrated circuit design; mixed built-in signal structures; current mode integrated circuit design; sensor interfacing integrated circuits; low energy FPGA design for embedded systems; design of signal processing circuits and low voltage analog integrated circuits

Special Issue Information

Dear Colleagues,

A variety of environmental parameters are today monitored with integrated systems. These systems contain advanced integrated sensors together with associated electronics to be able to process suitably each sensor signal. The target is the implementation of as many functions as possible. The respective high volume monolithic circuits production on the same die with the sensors enables low-cost implementation for a wide applications space. These system-on-chip products include a huge variety of functions such as typical signal amplification, signal shaping and filtering, conversion of signals from analog to digital and vice versa, mixing, to more exotic and advanced neural networks and IoT-associated processing for advanced features and pattern identification. This Special Issue covers, but is not limited to:

  • Sensors readout front ends;
  • High and low temperature sensors interface electronics;
  • Nuclear and space spectroscopy and pixel detectors electronics;
  • Photodetectors, image sensors and associated circuitry;
  • Neural networks and AI-IoT sensor and interface electronics design;
  • Power management electronics and sensors;
  • Power automotive and industrial system on chip;
  • Intelligent circuits for sensors;
  • Microfluidic chips for sensors integration;
  • Smart sensors and associated circuitries.

Dr. Thomas Noulis
Prof. Dr. Stylianos Siskos
Guest Editors

Manuscript Submission Information

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Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Sensors is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Published Papers (3 papers)

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Research

17 pages, 10776 KiB  
Article
An Area-Efficient up/down Double-Sampling Circuit for a LOFIC CMOS Image Sensor
by Ai Otani, Hiroaki Ogawa, Ken Miyauchi, Sangman Han, Hideki Owada, Isao Takayanagi and Shunsuke Okura
Sensors 2023, 23(9), 4478; https://doi.org/10.3390/s23094478 - 4 May 2023
Cited by 2 | Viewed by 2844
Abstract
A lateral overflow integration capacitor (LOFIC) complementary metal oxide semiconductor (CMOS) image sensor can realize high-dynamic-range (HDR) imaging with combination of a low-conversion-gain (LCG) signal for large maximum signal electrons and a high-conversion-gain (HCG) signal for electron-referred noise floor. However, LOFIC-CMOS image sensor [...] Read more.
A lateral overflow integration capacitor (LOFIC) complementary metal oxide semiconductor (CMOS) image sensor can realize high-dynamic-range (HDR) imaging with combination of a low-conversion-gain (LCG) signal for large maximum signal electrons and a high-conversion-gain (HCG) signal for electron-referred noise floor. However, LOFIC-CMOS image sensor requires a two-channel read-out chain for LCG and HCG signals whose polarities are inverted. In order to provide an area-efficient LOFIC-CMOS image sensor, a one-channel read-out chain that can process both HCG and LCG signals is presented in this paper. An up/down double-sampling circuit composed of an inverting amplifier for HCG signals and a non-inverting attenuator for LCG signals can reduce the area of the read-out chain by half compared to the conventional two-channel read-out chain. A test chip is fabricated in a 0.18 μm CMOS process with a metal–insulator–metal (MIM) capacitor, achieving a readout noise of 130 μVrms for the HCG signal and 1.19 V for the LCG input window. The performance is equivalent to 103 dB of the dynamic range with our previous LOFIC pixel in which HCG and LCG conversion gains are, respectively, 160 μV/e and 10 μV/e. Full article
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32 pages, 10218 KiB  
Article
Integrated Filter Design for Analog Field Mill Sensor Interface
by Zoi Agorastou, Anastasios Michailidis, Aikaterini Lemonou, Rafaela Themeli, Thomas Noulis and Stylianos Siskos
Sensors 2023, 23(7), 3688; https://doi.org/10.3390/s23073688 - 2 Apr 2023
Cited by 4 | Viewed by 1740
Abstract
The design process of an integrated bandpass filter targeted for the noise filtering stage of the synchronous demodulation unit of an electric field mill sensor interface is presented. The purpose of this study of filter integration techniques is to avoid the challenging and, [...] Read more.
The design process of an integrated bandpass filter targeted for the noise filtering stage of the synchronous demodulation unit of an electric field mill sensor interface is presented. The purpose of this study of filter integration techniques is to avoid the challenging and, in some cases, impossible passive element integration process and to incorporate the final filter design in an entirely integrated field mill sensing system with superior performance and an optimized silicon-to-cost ratio. Four different CMOS filter implementations in the 0.18 μm process of XFAB, using OTA (Operational Transconductance Amplifier)-based configurations for passive element replacement in cascaded filter topologies and leapfrog techniques, are compared in terms of noise performance, total harmonic distortion, dynamic range, and power consumption, as well as in terms of integrability, silicon area, and performance degradation at process corners/mismatches. The optimum filter design performance-wise and process-wise is included in the final design of the integrated analog readout of a field mill sensor, and post-layout simulation results of the total circuit are presented. Full article
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20 pages, 2731 KiB  
Article
A Fully Differential Analog Front-End for Signal Processing from EMG Sensor in 28 nm FDSOI Technology
by Vilem Kledrowetz, Roman Prokop, Lukas Fujcik and Jiri Haze
Sensors 2023, 23(7), 3422; https://doi.org/10.3390/s23073422 - 24 Mar 2023
Viewed by 2611
Abstract
This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such a low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit [...] Read more.
This paper presents a novel analog front-end for EMG sensor signal processing powered by 1 V. Such a low supply voltage requires specific design steps enabled using the 28 nm fully depleted silicon on insulator (FDSOI) technology from STMicroelectronics. An active ground circuit is implemented to keep the input common-mode voltage close to the analog ground and to minimize external interference. The amplifier circuit comprises an input instrumentation amplifier (INA) and a programmable-gain amplifier (PGA). Both are implemented in a fully differential topology. The actual performance of the circuit is analyzed using the corner and Monte Carlo analyses that comprise fifth-hundred samples for the global and local process variations. The proposed circuit achieves a high common-mode rejection ratio (CMRR) of 105.5 dB and a high input impedance of 11 GΩ with a chip area of 0.09 mm2. Full article
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