This study illustrates a type of novel device. Integrating fin field-effect transistors (FinFETs) with current silicon-on-insulator (SOI) wafers provides an excellent platform to fabricate advanced specific devices. An SOI FinFET device consists of t...
The temperature dependent carrier transport characteristics of n-type gate-all-around nanowire field effect transistors (GAA NW-FET) on bulk silicon are experimentally compared to bulk fin field effect transistors (FinFET) over a wide range of temper...
This research presents the optimization and proposal of P- and N-type 3-stacked Si0.8Ge0.2/Si strained super-lattice FinFETs (SL FinFET) using Low-Pressure Chemical Vapor Deposition (LPCVD) epitaxy. Three device structures, Si FinFET, Si0.8Ge0.2 FinF...
As transistor dimensions continue to scale below 10 nm, traditional MOSFET architectures face increasing limitations from short-channel effects, gate leakage, and variability. FinFETs, especially junctionless FinFETs on silicon-on-insulator (SOI) sub...
In this study, we analyzed the total ionizing dose (TID) effect characteristics of p-type FinFET and Nanowire FET (NW-FET) according to the structural aspect through comparison of the two devices. Similar to n-type devices, p-type NW-FETs are less af...
The surge in demand for 3D MOSFETs, such as FinFETs, driven by recent technological advances, is explored in this review. FinFETs, positioned as promising alternatives to bulk CMOS, exhibit favorable electrostatic characteristics and offer power/perf...
Planar devices and FinFET devices exhibit significant differences in single-event upset (SEU) response and charge collection. However, the charge collection process during SEU in FinFET devices has not been thoroughly investigated. This article addre...
A complete comparison for 14 nm FinFET and NWFET with stacked nanowires was carried out. The electrical and thermal performances in two device structures were analyzed based on TCAD simulation results. The electro-thermal TCAD models were calibrated...
In this paper, to solve the epitaxial thickness limit and the high interface trap density of SiGe channel Fin field effect transistor (FinFET), a four-period vertically stacked SiGe/Si channel FinFET is presented. A high crystal quality of four-perio...
Analysis of the radiation effects in a device is of great importance. The gate all around (GAA) structure that contributes to device scaling not only solves the short channel effects (SCE) problem but also makes the device more resistant in radiation...
In this paper, we proposed a novel saddle type FinFET (S-FinFET) to effectively solve problems occurring under the capacitor node of a dynamic random-access memory (DRAM) cell and showed how its structure was superior to conventional S-FinFETs in ter...
FinFET devices and Silicon-On-Insulator (SOI) devices are two mainstream technical routes after the planar MOSFET reached the limit for scaling. The SOI FinFET devices combine the benefits of FinFET and SOI devices, which can be further boosted by Si...
Most of the latest generation of integrated circuits use FinFET transistors for their performance, but what about their reliability? Does the architectural evolution from planar MOSFET to FinFET transistor have any effect on the integrated circuit re...
In this paper, we analyze the variability of III-V homojunction tunnel FET (TFET) and FinFET devices and 32-bit carry-lookahead adder (CLA) circuit operating in near-threshold region. The impacts of the most severe intrinsic device variations includ...
As semiconductor technology and process nodes advance, three-dimensional devices like FinFET and NSFET are increasingly becoming the primary choice, replacing planar MOSFETs. However, the complex manufacturing processes and high process sensitivity o...
Miniaturization and portable devices have reshaped the electronic device landscape, emphasizing the importance of high performance while maintaining energy efficiency to ensure long battery life. FinFET and Tunnel-FET technologies have emerged as att...
Among multi-gate field effect transistor (FET) structures, FinFET has better short channel control and ease of manufacturability when compared to other conventional bulk devices. The radio frequency (RF) performance of FinFET is affected by gate-cont...
With the continuous scaling of CMOS technology, stress engineering has become increasingly critical at advanced technology nodes, especially in tall and narrow FinFET structures. Asymmetric layout environments (such as dual-Fin structures or poly cut...
This work investigates the effects of radiation on FinFET-based full adders, which are crucial components of arithmetic units, particularly in aerospace and space applications. While FinFETs offer significant advantages, they remain susceptible to si...
In this study, we developed a facilitated ferroelectric high-k/metal-gate n-type FinFET based on Hf0.5Zr0.5O2. We investigated the impact of the hysteresis effect on device characteristics of various fin-widths and the degradation induced by stress o...
We identify correlation between the drain currents in pristine n-channel FinFET transistors and changes in time-0 currents induced by hot-carrier stress. To achieve this goal, we employ our statistical simulation model for hot-carrier degradation (HC...
In this paper, a deep learning-based device modeling framework for design-technology co-optimization (DTCO) is proposed. A ResNet surrogate model is utilized as an alternative to traditional compact models, demonstrating high accuracy in both single-...
Here, we developed a procedure for mitigating thermal hazards in packaged FinFET devices. A monitoring system was installed into devices, based on self-heating impact analysis in the system and device levels, to allow for the observation and alerting...
This paper focuses on FinFET transistors. The degradation characteristics of FinFET devices after total ionizing dose (TID) radiation in low-temperature environments were investigated by means of a combination of experiments and TCAD simulations. By...
In this paper, different physical models of single trap defects are considered, which are localized in the oxide layer or at the oxide–semiconductor interface of field effect transistors. The influence of these defects with different sizes and...
The working environment of electronic devices in the aerospace field is harsh. In order to ensure the reliable application of the SOI FinFET, the total ionizing dose (TID) and hot carrier injecting (HCI) reliability of an SOI FinFET were investigated...
A new silicon-controlled rectifier embedded diode (SCR-D) for 7 nm bulk FinFET process electrostatic discharge (ESD) protection applications is proposed. The transmission line pulse (TLP) results show that the proposed device has a low turn-on voltag...
Impacts of source/drain (S/D) recess engineering on the device performance of both the gate-all-around (GAA) nanosheet (NS) field-effect transistor (FET) and FinFET have been comprehensively studied at 5 nm node technology. TCAD simulation results sh...
Today, many electronic circuits are required to be able to work effectively, even in environments exposed to ionizing radiation. This work examines the effects of ionizing radiation on shift registers realized in a bulk 16 nm FinFET technology, focus...
The fin field-effect transistor (FinFET) has been the mainstream technology on the VLSI platform since the 22 nm node. The silicon-on-insulator (SOI) FinFET, featuring low power consumption, superior computational power and high single-event effect (...
A threshold voltage (Vth) controllable multigate FinFET on a 10-nm-thick ultrathin BOX (UTB) SOI substrate have been investigated. It is revealed that the Vth of the FinFET on the UTB SOI substrate is effectively modulated thanks to the improved coup...
Stochastic computing (SC) is widely known for its high error tolerance and efficient computing ability of complex functions with remarkably simple logic gates. The noise of electronic devices is widely used to be the entropy source due to its randomn...
The gate resistance is a parasitic element in transistors for RF and millimeter-wave circuits that can negatively impact power gain and noise figure. To develop accurate device models, a reliable measurement methodology is crucial. This article revie...
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This paper presents a cross-layer framework in order to design and optimize energy-efficient cache memories made of deeply-scaled FinFET devices. The proposed design framework spans device, circuit and architecture levels and considers both super- an...
Despite the advantages of fin field-effect transistors (FinFETs), there are hidden issues such as electric field enhancement and exacerbated self-heating effects, which will intensify device aging effects. Due to the escalating costs associated with...
In this work, we present a novel pH sensor using efficient laterally coupled structure enabled by Complementary Metal-Oxide Semiconductor (CMOS) Fin Field-Effect Transistor (FinFET) processes. This new sensor features adjustable sensitivity, wide sen...
The FinFET architecture has attracted growing attention over the last two decades since its invention, owing to the good control of the gate electrode over the conductive channel leading to a high immunity from short-channel effects (SCEs). In order...
At the 90-nm node, the rate of transistor miniaturization slows down due to challenges in overcoming the increased leakage current (Ioff). The invention of high-k/metal gate technology at the 45-nm technology node was an enormous step forward in exte...
Since its invention in the 1960s, one of the most significant evolutions of metal-oxide semiconductor field effect transistors (MOSFETs) would be the 3D version that makes the semiconducting channel vertically wrapped by conformal gate electrodes, al...
Three dimensional (3-D) FinFET devices with an ultra-high Si-fin aspect ratio have been developed after integrating a 14Å nitrided gate oxide upon the silicon on insulator (SOI) wafers through an advanced CMOS logic platform. Under the lower gate vol...
In this paper, a novel enhancement-mode β-Ga2O3-based FinFET structure with a gate formed by the NiO/β-Ga2O3 heterojunction named HJ-FinFET has been proposed, and the excellent performance of the device has also been demonstrated. The prima...
Three-dimensional bulk fin-type field-effect transistors (FinFETs) have been the dominant devices since the sub-22 nm technology node. Electrical characteristics of scaled devices suffer from different process variation effects. Owing to the trapping...
In this manuscript, the integration of a strained Ge channel with Si-based FinFETs was investigated. The main focus was the preparation of high-aspect-ratio (AR) fin structures, appropriate etching topography and the growth of germanium (Ge) as a cha...
Ferroelectric fin field-effect transistors with a trench structure (trench Fe-FinFETs) were fabricated and characterized. The inclusion of the trench structures improved the electrical characteristics of the Fe-FinFETs. Moreover, short channel effect...
We investigate the effect of random dopant fluctuation (RDF)-induced variability in n-type junctionless (JL) dual-metal gate (DMG) fin field-effect transistors (FinFETs) using a 3D computer-aided design simulation. We show that the drain voltage (VDS...
Maintaining power consumption has become a critical hurdle in the manufacturing process as CMOS technologies continue to be downscaled. The longevity of portable gadgets is reduced as power usage increases. As a result, less-cost, high-density, less-...
AlGaN/GaN metal-insulator-semiconductor field-effect transistors with fin structures (AlGaN/GaN MIS-FinFETs) were fabricated and characterized by changing fin width and using different dielectric layers. The FinFET with 20 nm-thick SiO2 dielectric la...
The increasing demand for high-performance and low-power hardware in artificial intelligence (AI) applications—such as speech recognition, facial recognition, and object detection—has driven the exploration of advanced memory designs. Con...
Artificial intelligence (AI) has revolutionized present-day life through automation and independent decision-making capabilities. For AI hardware implementations, the 6T-SRAM cell is a suitable candidate due to its performance edge over its counterpa...
Electronic devices are now ubiquitous across both professional and personal domains, often containing sensitive information that should remain undisclosed to untrustworthy third parties. Consequently, there is an increased demand for effective securi...
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