Search Results (549)

This study proposes an optimized genetic algorithm-based wavelet image fusion technique for printed circuit board (PCB) detection, incorporating an improved Genetic Algorithm (GA) with the Elite Strategy and integrating it with discrete wavelet transform (DWT). The proposed method aims to enhance both the accuracy and efficiency of image fusion, which is crucial for defect detection in PCB inspection. A DWT is utilized to decompose images into multiple frequency components, where the low-frequency band preserves the structural integrity of the image, and the high-frequency band retains essential fine details such as edges and textures, which are critical for identifying defects. An improved genetic algorithm is applied to optimize the fusion process, incorporating the Elite Strategy to retain the best solutions in each evolutionary iteration. This strategy prevents the loss of optimal wavelet decomposition weights, and ensures steady convergence towards the global optimum. By maintaining superior solutions throughout the evolutionary process, the algorithm effectively enhances the fusion quality and computational efficiency. Experimental evaluations validate the effectiveness of the proposed approach, demonstrating superior performance over conventional fusion methods. The enhanced algorithm achieves significant improvements in key performance metrics, including relative standard deviation (RSD), peak signal-to-noise ratio (PSNR), image clarity, and processing efficiency. The team developed a prototype system and conducted simulations in a relatively realistic environment to validate the proposed method’s potential for high-precision PCB detection. The results demonstrate that the approach offers a robust solution for automated defect detection and quality assessment. Full article

A new radio frequency (RF) probe using pogo pin tips for integrated chip (IC) measurement up to 50 GHz is proposed. It offers high durability due to the pogo pins and meets three key design criteria for general IC measurement: (1) a 45° tilted shape with a 70 μm tip protrusion for easy microscope inspection, (2) linear pogo pin alignment for commercial chip pad contact, and (3) a 250 μm pitch compatible with standard IC pad pitches. This design is distinct from traditional pogo pin probe cards which place pogo pins in vertical form, in a diagonal arrangement, and at wide intervals. The probe exhibits a low insertion loss of 1.6 dB at 45 GHz. A printed circuit board (PCB)-based calibration standard for the calibration of the designed probe is constructed, which is adjusted to inductance and capacitance values using a simulation to form the Vector Network Analyzer (VNA) calibration set. The measurements of a commercial amplifier IC using this probe show a nearly identical performance to commercial RF probes, confirming its accuracy and reliability. Full article

The rapid advancement of technology has increased our reliance on axial flux permanent magnet machines (AFPMMs), making Printed Circuit Boards (PCBs) essential for modern, lightweight designs. This study reviews PCB roles in AFPMMs for low- and high-power applications by examining research from 2019 to 2024. Using the PRISMA methodology, 38 articles from IEEE Xplore and Web of Science were analyzed. This review focuses on advancements in PCB manufacturing, defect mitigation, winding topologies, software tools, and optimization methods. A structured Boolean search strategy (“Printed Circuit Board” OR “PCB” AND “axial flux permanent magnet machine” OR “AFPM”) guided the literature retrieval process. Articles were meticulously screened using the Rayyan software for titles, abstracts, and content, with duplicate removal performed via the Mendeley software V2.120.0. Findings show significant progress in lightweight AFPMMs with PCBs, improving power quality and performance. Research activity over the 6 years showed inconsistent growth, with concentrated trapezoidal winding emerging as the dominant configuration, followed by distributed winding designs. These configurations were particularly applied in single stator double rotor (SSDR) coreless AFPM machines, characterized by minimal defects, minimal losses, and optimized single-layer winding designs utilizing tools such as ANSYS and COMSOL. Growing interest in double stator single rotor (DSSR) and multi-disk configurations highlights opportunities for innovative designs and advanced optimization techniques. Full article

Reducing distortion of spectral simulation signals in infrared detection systems is essential to improve the precision of detecting fine spectra in space-based carbon monitoring satellites. The rigid-flex printed circuit board (PCB), a vital interconnection structure between detectors and signal conditioning circuits, exhibits signal quality variations due to impedance fluctuations and parasitic capacitance changes induced by its meshed return plane geometry. This periodically varying structure necessitates full-wave field solutions to include longitudinal discontinuity. Although full-wave simulations provide accurate characterization, they demand substantial computational resources and time. To address these challenges, we propose an innovative approach to effectively determine optimal meshed return plane designs across various transmission rates. The method integrates a convolutional neural network (CNN) with improved particle swarm optimization (IPSO). First, a CNN model is employed efficiently to predict scattering parameters (S-parameters) for different design configurations, thereby overcoming the inefficiencies associated with iterative full-wave simulation optimization. Then, an IPSO algorithm has been implemented to address the optimization challenge of crosstalk and inter-symbol interference (ISI) in signal transmission. Furthermore, to increase the optimization speed and evaluate the system performance under extreme conditions, we propose a fitness function construction method based on double-edge responses (DER) to rapidly generate a worst-case peak distortion analysis (PDA) eye diagram within the IPSO algorithm. The proposed methodology reduces computational complexity by two orders of magnitude relative to the full-wave simulation. Quantitative analysis conducted at a transmission rate of 5 Gbps demonstrates substantial signal quality improvements compared to empirical PCB design: the eye height increased by 49.7%, and the eye width expanded by 35.7%. The effectiveness of these improvements has been verified through commercial simulation software, proving that the method can provide design support for infrared detection systems. Full article

Phase shifters are essential components of phased array systems, which are crucial to radar and wireless communication systems. New-generation telecommunication and radar systems often require strict phase shifter performance metrics, such as phase resolution and bandwidth, to perform fine beam scanning, which helps increase pointing accuracy. Meanwhile, practical vector modulator phase shifters, which employ quadrature signal operation, typically have digital control below 7 bits. In this regard, a vector modulator phase shifter based on non-quadrature signal operation and covering the lower S-band and upper C-band is proposed and implemented in this work. The proof-of-concept printed circuit board (PCB) prototype exhibits more than 360° continuous phase shift with more than 50% fractional bandwidth. In addition, it achieves a median gain of 0.8 dB and a size of 0.9 ${{\lambda }_g}^2$ with the inclusion of an output gain-block amplifier. The relatively wider bandwidth, smaller size, and fine resolution of the proposed phase shifter approach make it a potential candidate for new-generation ultrawideband communication and radar systems. Full article

Soldering of printed circuit board (PCB)-based surface-mounted assemblies is a critical process, and to enhance the accuracy of detecting their multi-targeted soldering defects, we propose an automated sample generation method that combines ControlNet and a Stable Diffusion Model. This method can expand the dataset by quickly obtaining sample images with high quality containing both defects and normal detection targets. Meanwhile, we propose the Cascade Mask R-CNN model with ConvNeXt as the backbone, which performs well in dealing with multi-target defect detection tasks. Unlike previous detection methods that can only detect a single component, it can detect all components in the region. The results of the experiment demonstrate that the detection accuracy of our proposed approach is significantly enhanced over the previous convolutional neural network model, with an increase of more than 10.5% in the mean accuracy precision (mAP) and 9.5% in the average recall (AR). Full article

The deployment of wireless devices has increased exponentially in recent years, not only for mobile applications but also for IoT. Typically, these IoT devices exchange data with other devices by means of wireless connections, where battery consumption depends on the antenna system’s efficiency. In applications where long battery life and reliable transmission are essential, improving the efficiency of the antenna is crucial. This study aims to investigate how shaping the ground plane of a wireless device can enhance bandwidth and antenna efficiency, specifically in low-frequency bands of 824–960 MHz, a common frequency band used in IoT where transmitting a small amount of data provides long battery life. Specifically, this work shows that by adding a slot in the ground plane, the current distribution is enlarged, which enables the excitation of its fundamental mode and, consequently, enhances the bandwidth and antenna efficiency by 2 dB. This approach is assessed using three different printed circuit boards (PCBs) that aim to characterise different form factors of IoT devices. A physical prototype is built to validate the results obtained in simulations. Full article

Tackling the widespread problems of inaccuracies, slow detection speed, and poor adaptability in small object defect detection on PCB circuits, this study suggests a lightweight printed circuit board surface defect identification algorithm, building upon an improved YOLOv8-PCB. This algorithm first introduces the C2f_SHSA attention mechanism in the backbone network, which unites the merits of channel attention and spatial attention, facilitating an efficient fusion of local and global features in a lightweight manner, thereby enhancing the model’s identification preciseness for small defects. Subsequently, in the neck network, the C2f_IdentityFormer structure, which combines the C2f structure with the IdentityFormer structure, supplants the initial C2f structure. This enhancement improves the model’s sensitivity to subtle features and further optimizes the effect of feature fusion. Eventually, the PIoU is presented to enhance the model’s adaptability to small, complex PCB defects with varying sizes and shapes, while also accelerating the mode’s convergence speed. Experimental outcomes reveal that the improved YOLOv8-PCB algorithm displays remarkable performance in the PCB dataset, with a Recall rate of 94.0%, a mean Average Precision (mAP) of 96.1%, and an F1 score of 94.35%. Moreover, the model’s weight size is only 5.2 MB. Compared to the YOLOv8n baseline model, the Recall rate has a 3.6% improvement, the mAP is raised by 1.8%, and the F1 score is enhanced by 1.9%, while the model’s weight is reduced by 17.46%. The enhancements in performance metrics confirm that the improved algorithm not only fulfills the requirements for efficient and real-time detection in PCB surface defect identification tasks but is also better suited for deployment and operation on edge devices. Full article

Large language models (LLMs), such as GPT-4.0 and Gemini, have achieved excellent performance on natural-language tasks, and they also show high expectations for logical reasoning. In the realm of print circuit board (PCB) routing, complex routing scenarios still rely on manual routing performed by seasoned engineers, which consumes significant human resources and time. This paper proposes an approach using few-shot and chain-of-thought training LLMs to tackle this issue, enabling LLMs to assist engineers in design tasks with a small number of samples. We tested the performance of LLMs in different routing scenarios with a few examples, validating the applicability of this method. Furthermore, we explored fine-tuning techniques to enhance the effectiveness of the few-shot learning approach, to overcome the limitation of scarce real-world PCB cases, and we employed code synthetic cases to fine-tune the model in place of actual PCB scenarios, ultimately improving the LLMs’ capability to manage intricate routing tasks. The results validate the feasibility and effectiveness of this method, offering a promising avenue for reducing the manual burden in PCB design. Full article

Tin, although not considered a critical material in all world regions, is a key material for modern technologies. The projected scarcity of tin in the coming decades emphasizes the need for efficient recycling methods to maintain uninterrupted supply chains. This review article focuses on the recovery of tin from low-grade secondary sources, specifically obsolete printed circuit boards (PCBs) and liquid crystal displays (LCDs). In both types of waste, tin occurs in various concentrations and in different chemical forms—a few percent as metal or alloy in PCBs and several hundred ppm as tin(IV) oxide in LCDs. This article presents pretreatment methods to preconcentrate tin and enhance subsequent leaching. It discusses not only conventional acid and alkaline leaching techniques but also the use of complexing agents and the challenges associated with bioleaching. Due to the dilution of the resulting leachates, advanced methods for tin ion separation and preconcentration before final product recovery are shown. Solvometallurgical methods employing deep eutectic solvents or ionic liquids, are also discussed; although promising, they still remain under development. Full article

The ever-growing volume of global electronic waste (e-waste) poses significant environmental and health challenges. Printed circuit boards (PCBs), which form the core of most electronic devices, contain valuable metals as well as hazardous materials. The efficient disassembly and recycling of e-waste is critical for both economic and environmental sustainability. The traditional manual disassembly methods are time-consuming, labor-intensive, and often hazardous. The integration of edge computing and the Internet of Things (IoT) provides a novel approach to automating the disassembly process, potentially transforming the way e-waste is managed. Automated disassembly of WPCBs involves the use of advanced technologies, specifically edge computing and the IoT, to streamline the recycling process. This strategy aims to improve the efficiency and sustainability of e-waste management by leveraging real-time data analytics and intelligent decision-making at the edge of the network. This paper explores the application of edge computing and the IoT in the automated disassembly of WPCBs, discussing the technological framework, benefits, challenges, and future prospects. The experimental results show that the YOLOv10 model achieves 99.9% average precision (AP), enabling accurate real-time detection of electronic components, which greatly facilitates the automated disassembly process. Full article

Accurately recognizing tiny defects on printed circuit boards (PCBs) remains a significant challenge due to the abundance of small targets and complex background textures. To tackle this issue, this article proposes a novel YOLO-SPD-SimAM-WIoU (YOLO-SSW) network, based on an improved YOLOv8 algorithm, to detect tiny PCB defects with greater accuracy and efficiency. Firstly, a high-resolution feature layer (P2) is incorporated into the feature fusion part to preserve detailed spatial information of small targets. Secondly, a Non-strided Convolution with Space-to-Depth (Conv-SPD) module is incorporated to retain fine-grained information by replacing traditional strided convolutions, which helps maintain spatial resolution. Thirdly, the Simple Parameter-Free Attention Module (SimAM) is integrated into the backbone to enhance feature extraction and noise resistance, focusing the model’s attention on small targets in relevant areas. Finally, the Wise-IoU (WIoU) loss function is adopted to dynamically adjust gradient gains, reducing the impact of low-quality examples, thereby enhancing localization accuracy. Comprehensive evaluations on publicly available PCB defect datasets have demonstrated that the proposed YOLO-SSW model significantly outperforms several state-of-the-art models, achieving a mean average precision (mAP) of 98.4%. Notably, compared to YOLOv8s, YOLO-SSW improved the mAP, precision, and recall by 0.8%, 0.6%, and 0.8%, respectively, confirming its accuracy and effectiveness. Full article

Technological advances in the production of printed circuit boards (PCBs) are increasing the number of components inserted on the surface. This has led the electronics industry to seek improvements in their inspection processes, often making it necessary to increase the level of automation on the production line. The use of machine vision for quality inspection within manufacturing processes has increasingly supported decision making in the approval or rejection of products outside of the established quality standards. This study proposes a hybrid smart-vision inspection system with a machine vision concept and vision sensor equipment to verify 24 components and eight screw threads. The goal of this study is to increase automated inspection reliability and reduce non-conformity rates in the manufacturing process on the assembly line of automotive products using machine vision. The system uses a camera to collect real-time images of the assembly fixtures, which are connected to a CMOS color vision sensor. The method is highly accurate in complex industry environments and exhibits specific feasibility and effectiveness. The results indicate high performance in the failure mode defined during this study, obtaining the best inspection performance through a strategy using Vision Builder for automated inspection. This approach reduced the action priority by improving the failure mode and effect analysis (FMEA) method. Full article

This study investigates the humidity-sensing properties of two semiconductor metal oxide (SMO)-reduced graphene oxide (RGO) nanocomposites: TiO₂/RGO and α-Fe₂O₃/RGO, at room temperature. Both nanocomposites are synthesized via hydrothermal methods and coated onto printed circuit board (PCB) interdigital electrodes to construct humidity sensors. The surface morphology and crystallographic structure of the materials are characterized using field emission scanning electron microscopy (FESEM) and X-ray diffraction (XRD). The sensors are tested across a humidity range of 11%RH to 97%RH, and the impedance is measured over a frequency range of 1 Hz to 1 MHz. The results show that both TiO₂/RGO and α-Fe₂O₃/RGO exhibit favorable humidity-sensing performance at room temperature. The sensitivity and humidity hysteresis of TiO₂/RGO are 12.2 MΩ/%RH and 3.811%RH, respectively, while those of α-Fe₂O₃/RGO are 0.826 MΩ/%RH and 8.229%RH. The response and recovery times of TiO₂/RGO are 72 s and 99 s, respectively, while those of α-Fe₂O₃/RGO are 48 s and 54 s. Both sensors demonstrate good repeatability and stability. These findings suggest that SMO/RGO nanocomposites are promising materials for the development of low-cost, high-sensitivity, and stable humidity sensors. Full article

This paper proposes a design for a platform-based Multi-phase Interleaved Synchronous Buck Converter (MISBC). A custom platform was developed to compare the theoretical performance of a MISBC circuit simulated with Multisim to a prototype that was built at Western Sydney University. The work disclosed in this manuscript describes some steps adopted during the selection of each component and technical considerations taken during the design of the Printed Circuit Board (PCB). The platform designed has a maximum power output of 260 Watts, with a buck reduction of the nominal voltage from 97 Volts to 24 Volts at a maximum switching frequency of 50 kHz. This switching frequency is achieved with an open-loop circuit configuration coupled with synchronized signal generators, used to validate the dead band required between the activation of each set of transistors implemented in a half-bridge configuration. A summary of the results based on the duty cycle required to achieve the buck voltage desired highlights the advantages of each operating mode of the MISBC circuit. Here the theoretical performance is compared against the data acquired during functional evaluations of the prototype, making possible future interpretations of the ideal control algorithm required to maximize the performance output of MISBC circuits. Full article