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Article

Control of a Charger/Discharger DC/DC Converter with Improved Disturbance Rejection for Bus Regulation

by
Sergio Ignacio Serna-Garcés
1,*,
Daniel González Montoya
1 and
Carlos Andrés Ramos-Paja
2
1
Departamento de Electrónica y Telecomunicaciones, Instituto Tecnológico Metropolitano, Carrera 31 No. 54-10, Medellín 050013, Colombia
2
Departamento de Energía Eléctrica y Automática, Universidad Nacional de Colombia, Carrera 80 No. 65-223, Facultad de Minas, Medellín 050041, Colombia
*
Author to whom correspondence should be addressed.
Energies 2018, 11(3), 594; https://doi.org/10.3390/en11030594
Submission received: 29 January 2018 / Revised: 8 February 2018 / Accepted: 21 February 2018 / Published: 8 March 2018

Abstract

:
Stand-alone power systems based on renewable energy sources are widely used for energy generation in remote locations and for distributed generation in urban environments. The DC bus is an essential component of these systems since it enables power transmission between the sources, loads and batteries. The batteries are interfaced with the bus using a charger/discharger DC/DC converter, which is controlled to regulate the DC bus voltage under any operating conditions. This is an important task because unsafe over-voltages and under-voltages in the bus could damage the sources, loads and power converters. This paper proposes a sliding-mode controller for a charger/discharger DC/DC converter with improved disturbance rejection to provide a tight bus voltage regulation for safe operation. The main novelty of this solution is the inclusion of the bus current in the sliding surface, which accelerates the controller response. Moreover, a formal proof of the system global stability is provided, and a detailed process is developed to calculate the controller and implementation parameters. Finally, the proposed solution is validated through simulations and experiments.

1. Introduction

The market for energy storage systems is dynamic and experiencing accelerated growth [1]. This is because several power systems require, for their correct operation, energy storage devices either as a primary source or backup source, e.g., SLI systems (starting, lighting, ignition), electrical systems in the automotive industry, portable electronic devices, micro-grids, systems in the marine sector, medical devices, seismic devices, uninterruptible power supply (UPS), forklift equipment, and telecommunication equipment, among others. Therefore, finding cost-effective methods to store energy is of importance. There are currently many technologies for storing energy, including electro-chemical, mechanical, thermal, hydraulic and pneumatic technologies [2,3,4,5,6,7]. Among the electro-chemical technologies, the most well-known solutions are ultracapacitors, lithium ion batteries (Li-ion), lead-acid batteries and flow batteries [2,8,9,10].
Batteries have some advantages with respect to other storage systems, namely, higher charge efficiency, responsiveness and simplicity of installation. For example, Li-ion batteries exhibit high charge efficiency, near 99%, and high energy efficiency, between 86% and 99%, depending on the charge and discharge C-rate [11]. Conversely, other power sources, such as fuel cells, have lower efficiencies near 60% [12]. Moreover, a battery is always ready to deliver power without warm-up, whereas a fuel cell requires some minutes before producing power. Due to the diversity of applications that require batteries, the market is very dynamic, e.g., lead-acid batteries are by far the most important market, near 90%, mainly in SLI, telecommunications, transport vehicles and UPS. However, Li-ion batteries have the highest growth and major part of industry investments, taking markets such as cellular phones, notebooks, automobiles, camcorders, e-bikes, and so forth [1].
The forecasts for 2010–2025 show that the compound annual growth rate (CAGR) of the battery market will be 10%, being dominated by lead-acid batteries, but with a growth near 150% in the market of Li-ion batteries due mainly to electric vehicles (EVs) [1]. However, there are new applications for Li-ion batteries, such as UPS, telecommunications, forklifts, medical devices, residential ESS (energy storage system), and grid ESS with a CAGR estimate of 15% [1].
Another important application in which batteries are extensively used is the construction of stand-alone renewable power systems, which are common solutions for remote energy generation and urban/distributed energy systems for pollution reduction [13,14]. A common structure of such power systems based on renewable generators and batteries is presented in Figure 1 [15,16,17,18,19,20,21,22]. Such an architecture has a renewable energy source as the main energy generator, e.g., photovoltaic modules or fuel cell, interacting with a unidirectional DC/DC converter that is responsible for optimizing the source operating conditions. The output of the DC/DC converter is connected to a DC bus that is regulated by a charger/discharger power converter, which also interfaces the battery with the DC bus. The charger/discharger converter is controlled to regulate the DC bus voltage within safe limits and simultaneously impose a given energy flow between the battery and the DC bus. Due to safety implications for the source and load, there are many research papers focused on regulating the DC bus voltage using charger/discharger converters: some of them are based on linear control [16,23,24,25,26], others are based on intelligent control [13,27,28,29,30,31,32], and others are based on non-linear control strategies [15,17,18,19,20,21,22].
In particular, sliding-mode controllers (SMCs) have been widely used for this application to ensure global stability, robustness to parameter tolerances, higher bandwidth compared with classical linear controllers [17,22,33], and reduced implementation cost and complexity compared with intelligent controllers [31,34]. For example, the work reported in [15] proposed an SMC for the charger/discharger converter of the stand-alone power system described in Figure 1. The sliding-surface is formed by the battery current and a PI structure processing the DC bus voltage error. In this solution, the design equations and existence conditions of the sliding mode depend on the converter duty cycle; hence, the parameters of the sliding surface must be adjusted on-line. Such adaptiveness guarantees the global stability of the system, which is an important advantage over classical solutions based on linear control. However, the rejection of bus current perturbations must be improved by introducing additional terms into the surface, as will be discussed in Section 2 and Section 3.
Another solution based on SMC was reported in [21]. That work was aimed at controlling a buck-boost charger/discharger converter with a cascade structure: an outer voltage loop based on a PI structure defines the reference of an inner current loop based on an SMC, in which the sliding surface is formed by the inductor current error. This solution is applied in electric vehicles.
Similarly, the work reported in [18] proposed a cascade control of a DC/DC converter based on a half-bridge bidirectional topology. In this case, the current control is designed with a fixed-frequency SMC to reduce electromagnetic interferences (EMI). In [20], a cascade control for a battery charger of an electric vehicle was proposed, but in this case, the converter is a unidirectional implementation. In that work, the inner inductor current control is designed with a discrete-time SMC, while the outer control loop calculates the current reference such that a power factor correction (PFC) stage regulates the DC-link voltage, and simultaneously, the current reference of buck-type cells is determined depending on the state of charge (SOC) of the battery. Another SMC for controlling a bidirectional DC/DC converter used to interface a parallel-connected hybrid energy storage system was proposed in [22]. This system is formed by a vanadium redox battery, a supercapacitor and a renewable power source. Moreover, in that work, the sliding-surface is similar to the one introduced in [15], but without any adaptability to compensate for the duty cycle variation.
In [16], the problem of a multi-source power sharing strategy within electric vehicles was addressed using an upper-level control (control objectives) based on a robust linear parameter-varying (LPV) controller [35] and a lower-level control based on a classical PI current control. In this solution, the DC bus voltage regulation is part of the control objectives, which enables calculating the PI current control of a bidirectional DC/DC power converter driving the battery; hence, the hardware structure is similar to that shown in Figure 1. Meanwhile, the battery charger circuits proposed in [17,19] use unidirectional DC/DC converters, regulated with non-linear controllers, to interface the PV panels and the batteries.
The solution proposed in this paper is aimed at providing a tight regulation of the DC bus voltage in a stand-alone power system based on renewable energy sources to ensure a safe operation. This objective is fulfilled by designing a sliding-mode controller for the battery charger/discharger to regulate the bus voltage under any power flow condition; however, in contrast to the solutions previously discussed [15,16,22,26], this new solution proposes including the DC bus current in the sliding surface to improve the disturbance rejection. Moreover, the proposed solution does not use a cascade control structure; hence, a single controller defines the MOSFET state based on the measurements of the battery current and bus voltage and current. This characteristic simplifies the controller implementation and reduces the cost.
The remainder of this paper is organized as follows. In Section 2, the background of the proposed solution is presented. Section 3 describes the design of the proposed sliding-mode controller and the analysis of the transversality, reachability and equivalent control conditions. Section 4 addresses the design of the sliding-mode dynamics to ensure a tight regulation of the DC bus voltage. Then, Section 5 presents the implementation of the control law and the synthesis of the switching surface. Section 6 and Section 7 present a design example and the simulation and experimental results. Finally, the conclusions close the work.

2. Background of the Proposed Solution

The classical solution to control a battery charger/discharger is based on an inner current loop and an outer voltage or power loop. The current loop has two main purposes: reduce the order of the system to simplify the controller design and reject fast current perturbations generated in the DC bus, for example, compensate changes in the power produced by the generator (e.g., sunlight increase/decrease in a PV system) or in the power requested by the load. The use of this structure is reported in the battery charger/discharger applications recently published in [36,37].
A widely used battery charger/discharger DC/DC converter is presented in Figure 2, which is based on a bidirectional boost (buck) converter [38]. Moreover, this figure also illustrates a classical cascade current-voltage control structure, in which the current controller acts on the MOSFET signal u directly (e.g., sliding-mode, peak current, valley current controllers) or using a PWM (e.g., average current control). This structure is used to avoid the non-minimum phase condition exhibited by the transfer function between the DC bus voltage and the converter duty cycle. This is achieved by controlling the inductor current, i.e., the battery current, which exhibits a minimum phase transfer function with respect to the duty cycle. Then, the inductor is modeled as a current source to provide a minimum-phase first-order transfer function between the DC bus voltage and the current reference; hence, a linear controller can be used to regulate the bus voltage. However, this strategy requires a narrow bandwidth in the voltage loop to ensure the validity of the current source approximation. This is the main drawback of the cascade structure: the bandwidth of the voltage controller is between 5 and 10 times smaller than the current loop [39,40,41]. Hence, the controller speed is constrained, which reduces its ability to compensate fast perturbations.
The cascade structure has also been used to control the power flow between the battery and the DC bus. This case was reported in [38], which uses an inner control loop to regulate the battery current and an outer control loop to regulate the DC bus energy. Note that the circuit presented in Figure 2 has an equivalent behavior: in a power system with a regulated DC bus, similar to the one presented in Figure 1, the difference between the load power and power provided by the main generator is stored/supplied in the DC bus capacitor. Therefore, the battery charger/discharger must be controlled to regulate the DC bus voltage, which forces transferring that power difference from the DC bus capacitor into the battery. In this case, if the DC bus voltage is increased by a positive power difference between the generator and load power profiles, then the charger/discharger transfers that energy from the DC bus to the battery; similarly, if the DC bus voltage is decreased by a negative power difference between the generator and load power profiles, then the charger/discharger extracts that energy from the battery to supply the DC bus.
To avoid the bandwidth constraint imposed by the cascade solution, the work reported in [15] uses a unified sliding-mode controller for the charger/discharger, as illustrated in Figure 3. Since this solution does not require any model approximation, the voltage control can be designed with the highest bandwidth possible, which provides a faster response compared with the cascade solution. Therefore, the unified controller has higher speed, which improves its ability to compensate perturbations. Moreover, since the SMC is designed using the non-linear model of the DC/DC converter, it ensures the system stability and desired performance in any operating conditions, which provides a safe operation in the entire operation range.
The SMC designed in [15] is based on the sliding function Ψ S M and sliding surface Φ S M presented in (1) and (2), respectively. In these expressions, i b represents the battery current, which is equal to the inductor current as observed in Figure 2 and Figure 3; v d c represents the DC bus voltage; and v R represents the desired bus voltage, i.e., the reference value. Moreover, k p and k i are parameters designed to impose a desired dynamic response on the DC bus voltage.
Ψ S M = i b + k p · v R v d c + k i · v R v d c d t
Φ S M = Ψ S M = 0
However, both the cascade and unified control solutions have a main disadvantage: the controller is not able to instantaneously identify a perturbation in the bus current; therefore, the controller reacts to the perturbation in the bus voltage, which causes large voltage disturbances. For example, in the cascade solution, the current controller acts on the battery current only when the voltage (or power) controller detects a perturbation in the bus voltage (or power); hence, the compensation provided by the current controller is delayed, which in turn delays the voltage (or power) compensation. The same behavior is observed in the results of the unified SMC reported in [15].
Figure 4 presents the simulation of the unified SMC reported in [15], which was designed to provide a bus voltage equal to 48 V. The controller must provide a maximum voltage deviation of 2 V for current transients in the bus up to 1 A. The simulation shows a correct behavior up to 20 ms, when a 3 A current transient occurs in the DC bus, causing a voltage drop to almost 45 V (3 V).
The magnified area of the simulation (from 19.8 ms to 21.0 ms) also reveals the reason for the large voltage deviation caused by current transients: the change in the bus current must be compensated by the battery current, which due to power balance corresponds to a theoretical battery current of i b , t h = i d c · v d c / v b . However, as observed in the magnified region of the figure, the battery current imposed by the controller is considerably slower than the theoretical battery current; hence, the current difference must be provided by the bus capacitor, producing a voltage drop. This behavior is unavoidable in the structure of Figure 3 because, as observed in the magnified region of Figure 4, the battery current is defined by the error between the bus voltage and the reference. Therefore, the battery current changes only when a deviation in the bus voltage occurs.
This undesired behavior can be removed by introducing the measurement of the bus current into the control scheme, which will enable the controller to impose a faster change in the battery current. The next section proposes a new sliding-mode controller based on this concept.

3. Proposed Sliding-Mode Controller

With the aim of improving the current disturbance rejection for the charger/discharger, the control structure proposed in Figure 5 considers the measurement of the bus current. Moreover, the controller must be designed to take advantage of this new information. In addition, since the charger/discharger must be controlled in both positive and negative power flows by the same controller and because the bandwidth of the system must be set as high as possible, i.e., no linearization processes involved, the proposed controller is based on sliding-mode theory.
The proposed SMC is based on the sliding function Ψ and surface Φ presented in (3) and (4), respectively. This new surface includes the bus current i d c , a new parameter k b weighting the battery current i b , the error between the bus voltage v d c and the reference value v R weighted by the parameter k p , and the integral of the error between v d c and v R weighted by the parameter k i . Then, the parameters k b , k p and k i must be designed to impose a desired dynamic response on the bus voltage.
Ψ = k b · i b i d c + k p · v R v d c + k i · v R v d c d t
Φ = Ψ = 0
The viability of implementing an SMC based on the surface Φ presented in (4) depends on three conditions [42]: transversality, reachability and equivalent control. These conditions are analyzed in the following subsections.

3.1. Converter Model and Sliding Function Expressions

The first step in evaluating the viability of the sliding-mode controller is to provide an explicit expression for the sliding function derivative, which also requires a switched model for the DC/DC converter [43].
The converter dynamic behavior is described in terms of the switched differential equations presented in (5) and (6), where L, C and u represent the inductance, capacitance and MOSFET control signal, respectively.
d i b d t = 1 L · v b v d c · 1 u
d v d c d t = 1 C · i b · 1 u i d c
From the charge and flux balances in the capacitor and inductor, respectively [44], the steady-state battery and bus voltages are related by (7), where d represents the converter duty cycle. Similarly, the steady-state battery and bus currents are related by (8).
v b = v d c · 1 d
i d c = i b · 1 d
The derivative of the sliding function (3) is presented in (9), which considers the reference value to be constant, i.e., d v R d t = 0 . This assumption is valid since a DC bus is commonly controlled to provide a constant voltage [15,26]. In fact, the objective of the proposed controller is to keep the bus voltage constant even under transients of the load current (or power). Finally, the explicit expression (10) for the sliding function derivative is obtained by substituting (5) and (6) into (9).
d Ψ d t = k b · d i b d t d i d c d t k p · d v d c d t + k i · v R v d c
d Ψ d t = k b L · v b v d c · 1 u d i d c d t k p C · i b · 1 u i d c + k i · v R v d c

3.2. Transversality Condition

The transversality condition analyzes the ability to act on the sliding function to reach the sliding surface. This condition is formalized in (11), which ensures that the converter control signal u is present in the sliding function derivative [45]. If the transversality condition (11) is fulfilled, then the SMC is able to modify the sliding function trajectory by changing its derivative to reach the surface. Otherwise, the SMC output has no effect on the sliding function trajectory, and the bus voltage will not be controllable.
d d u d Ψ d t 0
By substituting (10) into (11), the transversality expression is obtained, as presented in (12). This expression can be equal to zero since the battery current is negative in the charging stage. Therefore, such an expression must be analyzed to define the constraints that ensure the fulfillment of the transversality condition (11).
d d u d Ψ d t = k b · v d c L + k p · i b C
Another important implication of the transversality value is the definition of the reachability conditions, which are imposed by the transversality sign [42], as will be discussed in the following subsection. In addition, these reachability conditions impose the control law of the MOSFETs. Therefore, to ensure a consistent implementation circuitry for the sliding-mode controller, the transversality must exhibit the same sign in any condition. This is addressed by forcing expression (12) to exhibit a positive sign in the charging ( i b < 0 ), stand-by ( i b = 0 ) and discharging ( i b > 0 ) stages. A positive sign is selected rather than a negative sign to simplify the implementation.
The constraints that ensure a positive sign for the transversality in the three possible stages of the charger/discharger are as follows:
  • Stand-by stage ( i b = 0 ): since L and v d c are positive quantities, the parameter k b must be set as a positive quantity, as reported in (13).
    d d u d Ψ d t = k b · v d c L > 0 , i b = 0 k b > 0
  • Charging stage ( i b < 0 ): since L, C, v d c and k b are positive quantities, the parameter k p must be set as a negative quantity, as reported in (14).
    d d u d Ψ d t = k b · v d c L + k p · i b C > 0 , i b < 0 k b > 0 k p < 0
  • Discharging stage ( i b > 0 ): since L, C, v d c and k b are positive quantities, the parameter k p must fulfill the constraint presented in (15) to ensure the positive sign of the transversality.
    d d u d Ψ d t > 0 , i b > 0 k b > 0 k p > C L · v b i b
In conclusion, the constraints reported in (16) must be fulfilled to ensure that the transversality condition (11) is satisfied and to simultaneously impose a positive sign of (12) for any operating conditions.
k b > 0 C L · v b i b < k p < 0 d d u d Ψ d t > 0

3.3. Reachability Conditions

The reachability conditions analyze the ability of the system to reach the desired surface Φ = Ψ = 0 . This concept is illustrated in Figure 6: when the system operates under the surface, which means a negative value of the sliding function ( Ψ < 0 ) , the derivative of the sliding function must be positive to enable the system to reach the surface Ψ = 0 . Similarly, when the system operates over the surface, which means a positive value of the sliding function ( Ψ > 0 ) , the derivative of the sliding function must be negative to enable the system to reach Ψ = 0 . Then, the continuous switching between positive and negative derivatives of Ψ around Ψ = 0 creates the sliding mode [42].
However, the sign of the derivative of Ψ depends on the transversality sign: d d u d Ψ d t > 0 implies that a positive value of u ( u = 1 ) causes a positive change in d Ψ d t . Similarly, d d u d Ψ d t < 0 implies that u = 1 causes a negative change in d Ψ d t . Therefore, since this work has imposed a positive sign of the transversality in (16), the following conditions must be fulfilled to ensure the reachability of the surface:
lim Ψ 0 d Ψ d t u = 1 > 0
lim Ψ 0 + d Ψ d t u = 0 < 0
Substituting the expression of d Ψ d t presented in (10), evaluated for u = 1 , into (17) leads to (19). This inequality enables establishing a restriction that must be fulfilled to ensure the surface reachability.
lim Ψ 0 d Ψ d t u = 1 = k b · v b L d i d c d t + k p · i d c C + k i · v R v d c > 0
By using the charge and flux balance principles presented in (7) and (8), expression (19) is rewritten as constraint (20), which defines the relation between the maximum derivative of i d c and the parameter k i that ensures the existence of the sliding mode. In this expression, the terms ( 1 d ) and k b · v d c L + k p · i b C are positive, where the latter one is the transversality (12). However, the term v R v d c could be positive or negative; hence, the worst case (lower value) to be evaluated corresponds to the condition in which v R v d c has an opposite sign to k i .
d i d c d t < ( 1 d ) · k b · v d c L + k p · i b C + k i · v R v d c
A particular case for (20) occurs for a step perturbation in the DC bus current, which is the fastest (and strongest) perturbation possible: in this case, restriction (20) is not fulfilled in the very short time t s t e p 0 in which the step occurs because d i d c d t , but after that short time, the current is almost constant, i.e., d i d c d t 0 . Considering that Section 4 will demonstrate that k i must be negative (36) for stability reasons, expression (20) is modified to define the maximum magnitude of k i that ensures the reachability of the surface, presented in (21), which corresponds to the most restrictive case: v R v d c with opposite sign to k i , i.e., v R v d c > 0 v d c < v R .
k i < ( 1 d ) · k b · v d c L + k p · i b C v R v d c , v d c < v R
The other case v R v d c 0 v d c v R produces the inequality provided in (22), which is always fulfilled.
k i · v d c v R > ( 1 d ) · k b · v d c L + k p · i b C , v d c v R
To summarize, constraint (21) provides the maximum magnitude of k i to ensure reachability when the bus voltage is lower than the reference, i.e., v d c < v R .
The second reachability condition (18) is also analyzed by evaluating the expression of d Ψ d t provided in (10) for u = 0 :
lim Ψ 0 + d Ψ d t u = 0 = k b L · v b v d c d i d c d t k p C · i b i d c + k i · v R v d c < 0
Using the charge and flux balance principles presented in (7) and (8), expression (23) is rewritten as constraint (24), which defines the relation between the minimum derivative of i d c and the parameter k i that ensures the existence of the sliding mode. In this expression, the term ( d ) is negative, and the term k b · v d c L + k p · i b C is positive. However, the term v R v d c could be positive or negative; hence, the worst case (higher value) to be evaluated corresponds to the condition in which v R v d c has the same sign as k i .
d i d c d t > ( d ) · k b · v d c L + k p · i b C + k i · v R v d c
In the particular case for (24) with a step perturbation in the bus current, the restriction is not fulfilled in the very short time t s t e p 0 in which the step occurs because d i d c d t , but after that short time, the current is almost constant, i.e., d i d c d t 0 . Considering that k i is negative, expression (24) is modified to define the maximum magnitude of k i that ensures the reachability of the surface, presented in (25), which corresponds to the most restrictive case: v R v d c with the same sign as k i , i.e., v R v d c < 0 v d c > v R .
k i < ( d ) · k b · v d c L + k p · i b C v d c v R , v d c > v R
The other case v R v d c 0 v d c v R produces the inequality in (26), which is always fulfilled.
k i · v R v d c > ( d ) · k b · v d c L + k p · i b C , v d c v R
To summarize, constraint (25) provides the maximum magnitude of k i to ensure reachability when the bus voltage is greater than the reference, i.e., v d c > v R .
In conclusion, the system is able to reach the surface Ψ = 0 when the restrictions presented in (20), (21), (24) and (25) are fulfilled.

3.4. Equivalent Control

The equivalent control condition analyzes the saturation of the control signal to ensure that the system is always in a closed-loop state. The equivalent control corresponds to the average value u e q of the binary control signal u within the switching period T s w , which is reported in (27). Then, the equivalent control condition imposes that u e q must be constrained within the possible values of u [42,45], which in DC/DC converters are u = 0 and u = 1 . The equivalent control condition is formalized in (28).
u e q = 1 T s w · 0 T s w u d t
0 < u e q < 1
It is evident that the equivalent control (27) is equal to the converter duty cycle, i.e., u e q = d . Therefore, fulfilling the equivalent control condition (28) prevents saturation of the duty cycle, which ensures that the controller is continuously acting on the system to compensate perturbations. Otherwise, if the duty cycle is saturated, then the converter will operate without any control.
The equivalent control condition assumes the existence of the sliding mode, which ensures that the sliding function is in the sliding surface and its trajectory is parallel to the surface [42]. These conditions are formalized as follows:
Ψ = 0
d Ψ d t = 0
The expression for u e q is obtained using the following procedure: first, the switched differential Equations (5) and (6) are averaged within the switching period; then, the expression for d Ψ d t in (9) is recalculated based on these averaged expressions, changing u by the equivalent control u e q . Finally, u e q is obtained by evaluating (30) with the averaged version of d Ψ d t . The expression of u e q for the proposed SMC is presented in (31).
u e q = 1 k b · v d c L + k p · i b C · k b · v b v d c L + d i d c d t + k p · i b i d c C k i · v R v d c
Finally, evaluating the equivalent control condition (28) considering the expression for u e q presented in (31) leads to the same restrictions provided in (20), (21), (24) and (25). This result is expected since in [42], it was demonstrated that any SMC for DC/DC converters that fulfills the reachability conditions also fulfills the equivalent control condition. In any case, this subsection is devoted to demonstrating that the proposed sliding-mode controller avoids duty-cycle saturation.

3.5. Summary

The proposed sliding-mode controller based on the sliding function (3) and sliding surface (4) must fulfill the constraints reported in (16), (20), (21), (24) and (25) to ensure the sliding function controllability, surface reachability and non-saturation of the duty cycle. Moreover, the existence of the sliding mode guarantees operation of the system within the sliding surface (29) and forces its trajectory to be parallel to the surface (30). These conditions ensure global stability of the system [46].

4. Design of the Sliding-Mode Dynamics

The sliding-mode dynamics are imposed with the parameters k b , k p and k i . From the sliding function (3), it is observed that selecting parameter k b equal to the complement of the converter duty cycle, as provided in (32), forces the term k b · i b i d c to become equal to the average current in the bus capacitor i C , T s w = C · d v d c d t (within the switching period T s w ), which only disregards the switching ripple. This value for k b fulfills the restriction imposed in (16) and simultaneously enables combining both i b and i d c measurements into a single current value to simplify the mathematical analysis.
k b = 1 d = v b v d c > 0
The sliding-mode controller imposes the closed-loop dynamics (29) and (30), which are both linear for the selected sliding function. By using the k b value presented in (32), condition (29) becomes the expression in (33). Since this equation is also linear, the equivalent dynamics are expressed in the Laplace domain as reported in (34). Finally, the closed-loop transfer function G d c ( s ) between the DC bus voltage and the reference value is provided in (35).
C · d v d c d t + k p · v R v d c + k i · v R v d c d t = 0
C · s · V d c ( s ) + k p + k i s · V R ( s ) V d c ( s ) = 0
G d c ( s ) = V d c ( s ) V R ( s ) = k p C · s k i C s 2 k p C · s k i C
Considering that k p is negative (16), transfer function (35) indicates that a negative k i value is required to ensure stable sliding-mode dynamics, i.e., negative closed-loop poles. This condition is formalized in (36).
k i < 0
The following subsections address the design of G d c ( s ) to obtain a desired dynamic response in the DC bus voltage.

4.1. Selection of the Type of Dynamic Response

The two poles of the transfer function G d c ( s ) can be designed in three different ways depending on the damping ratio ρ : complex-conjugate ( ρ < 1 ), real and equal ( ρ = 1 ), or real and different ( ρ > 1 ). To study the dynamic behavior of the closed-loop system depending on the type of damping ratio, G d c ( s ) is rewritten as shown in (37), where ω n represents the natural frequency of the system. To exclusively analyze the effect of the damping ratio, the transfer function is normalized in terms of the natural frequency using the normalized Laplace variable s N = s ω n as in (38).
G d c ( s ) = 2 · ρ · ω n · s + ω n 2 s 2 + 2 · ρ · ω n · s + ω n 2
G d c , N ( s ) = 2 · ρ · s N + 1 s N 2 + 2 · ρ · s N + 1
Figure 7 shows the normalized dynamic response of G d c ( s ) to a step perturbation for different damping ratios: the higher the damping ratio is, the lower is the maximum overshoot. However, also note that ρ = 1 produces an overshoot equal to 13.5%, and even ρ = 1.5 produces an overshoot equal to 7.6%. Therefore, to ensure a low overshoot, it is necessary to design G d c ( s ) with ρ > 1 , which requires the design of two real and different poles.
The results presented in Figure 7 are valid for any natural frequency; hence, it is a general analysis. Finally, in the following subsections, the two real poles are designed to impose a given maximum overshoot and settling time, both defined by the load requirements.

4.2. Design of the Maximum Overshoot

It is important to limit the maximum (and minimum) DC bus voltage caused by perturbations in the bus current. These constraints depend on the voltage levels required by the load for normal operation. Therefore, a maximum overshoot must be imposed on G d c ( s ) .
The overshoot is designed in terms of the poles of G d c ( s ) and considering a step perturbation, which is the strongest (and fastest) perturbation possible. For this analysis, G d c ( s ) is expressed in terms of the two real poles s 1 = P 1 and s 2 = P 2 of the characteristic equation presented in (39). The objective of this subsection is to find an expression for P 1 and P 2 that limits the overshoot Δ v d c under a given maximum value.
G d c ( s ) = P 1 + P 2 · s + P 1 · P 2 s 2 + P 1 + P 2 · s + P 1 · P 2
The step response Y ( s ) in the Laplace domain is calculated in (40), and the time response to a unitary step is presented in (41). This time-domain waveform will be used to design P 1 and P 2 .
Y ( s ) = P 1 + P 2 · s + P 1 · P 2 s 2 + P 1 + P 2 · s + P 1 · P 2 · 1 s
y ( t ) = 1 + P 1 P 2 P 1 · e P 1 · t P 2 P 2 P 1 · e P 2 · t
To normalize the design of the maximum overshoot, the relation between the poles P 1 and P 2 is defined as the m value presented in (42). Then, the time response of the closed-loop system is rewritten as shown in (43).
m = P 2 P 1
y ( t ) = 1 + 1 m 1 · e P 1 · t m m 1 · e m · P 1 · t
The maximum overshoot occurs at t = t Δ when the derivative of (43) is equal to zero:
d y ( t ) d t = P 1 m 1 · e P 1 · t Δ + m 2 · P 1 m 1 · e m · P 1 · t Δ = 0
The solution of (44) is reported in (45). Then, the condition for imposing a given maximum overshoot Δ v d c is reported in (46): the value of the bus voltage described by (43) at t = t Δ must be equal to 1 + Δ v d c . Substituting (43) into (46) leads to (47), which is a non-linear equation that enables calculating the value of m required to impose the desired maximum overshoot Δ v d c . This equation must be solved using numerical methods, e.g., by using fsolve from MATLAB.
t Δ = 2 · ln m P 1 · m 1
y ( t Δ ) = 1 + Δ v d c
Δ v d c = m m + 1 m 1
Note that (47) does not depend on the specific value of P 1 ; rather, it depends on the relation m between P 2 and P 1 . To illustrate this condition, several values of P 1 (and the associated values of P 2 ) were used to simulate the step response (43) for a specific value of m. The adopted value of m = 0.0765 was obtained by solving Equation (47) for a maximum overshoot Δ v d c = 5%. Then, four values for P 1 = 2000 , 3000 , 4000 , 5000 rad/s were tested, calculating the values of P 2 = 153.0 , 229.5 , 306.0 , 382.5 rad/s using Equation (42). The simulation results are presented in Figure 8, where it is verified that the time response of G d c ( s ) exhibits a maximum overshoot Δ v d c = 5% for all the P 1 conditions tested, which confirms the correctness of (47). Moreover, Figure 8 also shows that it is possible to design the settling time of G d c ( s ) using the value of P 1 ; the procedure is presented in the next subsection.
Expression (47) has two limits. The first limit Δ v d c = 0% occurs for m 0 and m , which according to (42) corresponds to G d c ( s ) with a pole in infinity, i.e., a first-order transfer function. The second limit Δ v d c = 13.5335% occurs for m 1 , which according to (42) corresponds to G d c ( s ) with two real and equal poles. Therefore, the system response can be designed to have a maximum overshoot within 0 % < Δ v d c < 13.5335%. Moreover, Equation (47) always has two equivalent solutions, as reported in Figure 9, where Δ v d c = 5% is obtained for m = 0.0765 and m = 13.0719 . For example, considering P 1 = 5000 rad/s and m = 0.0765 results in P 2 = 382.5 rad/s, while considering P 1 = 382.5 rad/s and m = 13.0719 results in P 2 = 5000 rad/s. Therefore, solving (47) has two possible (and equivalent) domains for m: 0 < m < 1 and 1 < m < .
Figure 9 also indicates that Δ v d c < 5% requires poles with a very large difference in magnitude, e.g., Δ v d c = 3% requires P 2 / P 1 = 25.6 , which could be difficult to implement.

4.3. Design of the Settling Time

The other performance criterion commonly used to specify the behavior of a DC bus corresponds to the settling t s of the voltage after perturbations. The value of t s is selected from the time that the load is able to operate in a condition different from the nominal voltage.
In this work, G d c is designed to provide a desired settling t s measured at a given settling time band ϵ , where the most classical band is ϵ = 2 % = 0.02 [47]. Figure 8 shows that the settling time t s occurs when the time response of the system (43) is y ( t s ) = 1 + ϵ . However, there are two crosses with 1 + ϵ : one before the maximum overshoot and another one after the maximum overshoot. Therefore, the settling time fulfills t s > t Δ , where t Δ corresponds to the time (45) in which the maximum overshoot occurs.
On the basis of the previous analysis, the system response (43) is rewritten as shown in (48) to calculate the value of P 1 that provides the desired settling time t s for the band ϵ , which includes the value of m calculated in the previous section to impose the maximum overshoot. This equation must be solved using numerical methods, e.g., by using fsolve from MATLAB.
ϵ = 1 m 1 · e P 1 · t s m m 1 · e m · P 1 · t s , t s > t Δ
To test the correctness of (48), four instances of G d c ( s ) were designed to guarantee a settling time of t s = 3 ms for a band ϵ = 2 % considering different maximum overshoots. Figure 10 shows the simulation of these designs, which confirms that parameterizing the dynamic response using (48) ensures that the desired settling time is fulfilled for any feasible value of m. Table 1 presents the maximum overshoots, the values of m and the poles calculated using (42), (47) and (48) depicted in Figure 10.

4.4. Calculation of Parameters k p and k i

The sliding function (3) and sliding surface are parameterized in terms of k p and k i . Therefore, the design of the sliding-mode dynamics in terms of the poles P 1 and P 2 must be translated to k p and k i values.
Contrasting the coefficients of G d c ( s ) in both (35) and (39) leads to the following expressions for k p and k i :
k p = C · P 1 + P 2
k i = C · P 1 · P 2
These values of k p and k i must fulfill the constraints reported in (16), (20), (21), (24) and (25) to ensure the global stability of the sliding-mode controller.

4.5. Summary

The design of the sliding-mode dynamics must be performed using the following steps:
  • Based on the load voltage requirements, define the maximum overshoot Δ v d c and settling time t s (also specify the settling time band ϵ ).
  • The parameter k b must be adapted continuously based on (32).
  • Calculate the parameter m by solving (47) to limit the maximum overshoot to Δ v d c , which occurs at t = t Δ presented in (45).
  • Calculate the pole P 1 by solving (48) to provide the desired settling time t s for the band ϵ .
  • Calculate the pole P 2 from m and P 1 values by using (42).
  • Calculate k p and k i using (49) and (50), respectively.
  • Evaluate the constraints reported in (16), (20), (21), (24) and (25). If some of these constraints are not fulfilled, then change the design requirements ( Δ v d c , t s , ϵ ) and/or the converter capacitor C and repeat from Step 3.

5. Implementation and Operation Analysis

The implementation of the sliding-mode controller involves two main parts: the switching circuit implementing the control law and the circuit to synthesize the sliding function (3). The following subsections discuss these circuits.
Moreover, this section also analyzes the response of the closed-loop charger/discharger to step perturbations in the DC bus current, which enables identifying the dynamic restrictions imposed by the passive elements of the DC/DC converter in the compensation of fast current transients.

5.1. Control Law and Switching Circuit

The implementation of the sliding-mode controller requires a hysteresis band to limit the switching frequency [46,48]. The insertion of a hysteresis band H , + H changes the control law imposed by the reachability conditions (17) and (18) as follows:
if Ψ H SET u = 1 ( MOSFET ON ) if Ψ + H SET u = 0 ( MOSFET OFF )
The implementation of the control law in (51) is performed using two comparators and a flip-flop S-R, as presented in Figure 11, in which the signal u defines the MOSFET state.
The value H of the hysteresis band can be set in the previous circuit using operational amplifiers, Zener diodes or independent voltage sources. Moreover, the circuit in Figure 11 can be implemented using integrated circuits such as the TS555 from STMicroelectronics [49].
The calculation of H depends on the desired steady-state switching frequency F s w and on the passive elements of the converter. Under steady-state conditions, the average value of the bus voltage is equal to the reference, i.e., v d c = v R , and the average value of the battery current i b is equal to i d c d , as reported in (8), where d = 1 d . Moreover, the steady-state battery current waveform i b , S S has two components: an average value i b and a triangular current ripple δ i b ( t ) , as reported in (52). Similarly, the steady-state bus voltage waveform v d c , S S has two components: an average value v d c and a triangular current ripple δ v d c ( t ) , as reported in (53). Finally, the parameter k b was previously designed as k b = 1 d = d in (32).
i b , S S = i b + δ i b ( t )
v d c , S S = v d c + δ v d c ( t )
Therefore, under steady-state conditions, the sliding surface (4) becomes the function Ψ S S = 0 reported in (54). Replacing the steady-state values v d c and i b in (54) and considering that the integral of the voltage ripple is equal to zero due to the charge balance principle [44], the ripples of the battery current and bus voltage are related by (55).
Ψ S S = d · i b + δ i b ( t ) i d c + k p · v R v d c + δ v d c ( t ) + k i · v R v d c + δ v d c ( t ) d t = 0
d · δ i b ( t ) k p · δ v d c ( t ) = 0
The hysteresis band H , + H of the control law (51) implements (55), as given in (56); hence, the maximum value of (56) is equal to H.
H d · δ i b ( t ) k p · δ v d c ( t ) + H
The maximum value δ i b , p k of the battery current ripple δ i b is obtained from (5), as given in (57), and the minimum value is symmetrical. Similarly, the maximum value δ v d c , p k of the bus voltage ripple δ v d c is obtained from (6), as given in (58), and the minimum value is also symmetrical.
δ i b , p k = v b · d 2 · L · F s w
δ v d c , p k = i d c · d 2 · C · F s w
Moreover, from (5) and (6), note that the battery current and bus voltage waveforms have opposite derivatives. This means that the maximum value of the battery current ripple max δ i b ( t ) = δ i b , p k occurs when the bus voltage ripple is minimum, i.e., min δ v d c ( t ) = δ v d c , p k . In addition, since k p is a negative quantity (16), it is represented as k p = k p , where k p is the parameter magnitude. Based on the previous analyses, expression (56) is rewritten as follows:
d · δ i b , p k k p · δ v d c , p k = H
Finally, the value of H in (60) is obtained by replacing the values of δ i b , p k and δ v d c , p k , given in (57) and (58), in expression (59).
H = d 2 · F s w · v b · d L k p · i d c C
Expression (60) enables designing the value of H to impose the desired switching frequency F s w to the switching circuit and MOSFETs. It is important to design H for the worst case, i.e., the higher frequency condition. For a fixed value of H, the value of F s w in (60) increases when the bus current decreases; hence, the maximum switching frequency occurs when the battery is being charged with the maximum current (most negative current). This means that H must be designed in that condition to ensure a lower switching frequency in other operating conditions.

5.2. Synthesis of the Sliding Function

The calculation of the sliding function Ψ (3) requires the measurement of the DC bus voltage, DC bus current, battery voltage and battery current. Using the battery and DC bus voltages, the controller calculates the complementary duty cycle to parameterize k b = d (32). Similarly, the DC bus voltage and the reference value are used to calculate the voltage error E v d c = v R v d c , which is simultaneously multiplied by k p and integrated and multiplied by k i , and these two terms are added to d · i b i d c . Figure 12 presents the block diagram of both the charger/discharger and the sliding-mode controller implementing Ψ . This figure also shows the hysteresis comparator with band H , + H .
Finally, the controller block diagram presented in Figure 12 can be implemented with analog circuitry using operational amplifiers and an analog multiplier, using a digital microprocessor with analog-to-digital converters (ADCs), or with a mixed analog/digital circuit, as will be described in Section 7.

5.3. Speed Limitation under Perturbations

The proposed controller was designed to detect the current changes in the DC bus to improve the rejection of perturbations. However, note that changes in the battery current are limited by the maximum slope achievable by the inductor current, which depends on the inductor L and battery voltage. This limitation constrains the speed of the controller.
To illustrate this speed limitation, Figure 13 shows the simulation of the proposed controller with a step perturbation in the DC bus current. It is observed that the theoretical battery current i b , t h = i d c · v d c / v b needed to compensate the perturbation has a step waveform with an infinite slope. However, from (5), it is observed that the maximum slope achievable by the battery (inductor) current is v b / L ; hence, the battery current takes some time to reach the required theoretical value i b , t h . Moreover, the controller must set the signal u = 1 to increase the battery current, which disconnects the inductor from the DC bus. Therefore, during the time in which the battery current is increased, the bus current must be extracted from the bus capacitor, producing an unavoidable voltage drop.
The time τ required by the battery current to reach the theoretical value i b , t h is calculated from (5), considering u = 1 , as given in (61). This expression considers a bus current perturbation with magnitude Δ i d c .
τ = Δ i d c · L v b · d
Note that (61) depends on the duty cycle; therefore, it is difficult to provide a precise value of the voltage drop since v d c and d depend on each other simultaneously. However, the voltage drop v d r o p can be approximated by integrating the bus current perturbation during the time τ in which u = 1 :
v d r o p Δ i d c 2 · L v b · d · C
Expression (62) is useful for designing L and C such that a maximum voltage drop is ensured for the maximum current perturbation expected Δ i d c .
Note that the speed limitation described in this subsection is inherent to the DC/DC converter construction; hence, it does not depend on the controller performance. In fact, expressions (61) and (62) depend on the size of the passive elements L and C and not on the controller parameters. Moreover, the proposed sliding-mode controller forces the change in the battery current with the highest derivative possible, i.e., providing the fastest response possible. Therefore, the voltage drop in (62) is the smallest one achievable with any controller.

6. Design Example and Simulation Results

This section presents a design example of the proposed controller for the charger/discharger circuit illustrated in Figure 5. The DC/DC converter has the following passive elements: L = 50 μ H and C = 100 μ F. Moreover, the battery has a nominal voltage v b = 12 V, and the DC bus voltage v d c must be regulated to v R = 48 V. The controller design is performed by following the steps summarized in Section 4.5.
This example considers a desired settling time t s = 3 ms for a band ϵ = 1 % and a maximum overshoot Δ v d c = 5 %. Moreover, the parameter k b is adapted continuously based on (32), as reported in Figure 12, dividing v b by v d c . Then, m = 13.0719 is calculated from (47), and the pole P 1 = 704.7945 rad/s is calculated from (48). The pole P 2 = 9213 rad/s is calculated by using (42), and k p = 0.9918 A/V and k i = 649.3272 A/(V · s) are calculated using (49) and (50), respectively.
Considering a maximum supported battery current of i b , m a x = 20 A and evaluating constraint (16) results in 1.2 < k p = 0.9918 < 0 , which fulfills the transversality condition. Moreover, evaluating (21) reveals that k i = 649.3272 fulfills the reachability conditions for v d c v R < 16.0336 V; hence, v d c < 64.0336 V. Similarly, evaluating (25) indicates that such a k i value fulfills the reachability conditions for v d c v R > 47.9721 V; hence, v d c > 0.0279 V. Therefore, the calculated values for k p and k i ensure global stability for the bus voltage v d c = 48 V.
The hysteresis band parameter H = 1 / 4 A was designed using (60) to provide a steady-state switching frequency F s w = 90 kHz in stand-by mode ( i d c = 0 A). This value of H imposes steady-state switching frequencies equal to 104.88 kHz and 75.12 kHz for DC bus currents of 1 A (charge stage with i b = 4 A) and 1 A (discharge stage with i b = 4 A), respectively.
Figure 14 presents the circuit scheme implemented in the electrical simulator PSIM, in which the switching circuit and the synthesis of the sliding function are observed. This scheme uses a PI block and an adder from PSIM to implement the terms k p · v R v d c + k i · v R v d c d t of Ψ ; the transfer function of the PI block from PSIM is presented in (63), where the PI block parameters k p s i m = 0.9918 and T p s i m = 0.0015 s were calculated using the expressions presented in (64).
G P I = k p s i m · 1 + s · T p s i m s · T p s i m
k p s i m = k p T p s i m = k p k i
Figure 15 shows the simulation of the proposed sliding-mode controller with a step change of 1 V in the reference value. This simulation shows that the controller forces a fast change in the battery current to accelerate the bus voltage response. However, as described in Section 5.3, this action requires u = 1 during the time in which the battery current is increased, forcing the bus capacitor to provide the bus current, which produces a small voltage drop v d r o p = 0.25 V. Therefore, the effective reference change faced by the controller is 1.25 V; this means that the maximum overshoot must be Δ v d c = 0.05 · 1.25 V = 62.5 mV, and the band ϵ = 1 % corresponds to 0.01 · 1.25 V = 12.5 mV. The magnified plots at the bottom of Figure 15 confirm the correct behavior of the controller, where the maximum overshoot and settling time are measured with the average signal of v d c to remove the switching ripple.
The simulation also shows that the fast change in the reference value forces the sliding function to leave the surface during a very short time, but the fulfillment of the reachability conditions drives the system to return to the surface. This behavior demonstrates the global stability provided by the proposed solution. In conclusion, the controller performance presented in Figure 15 verifies the correctness and accuracy of the analyses and design process proposed in the previous sections.
Figure 16 presents the simulation of the proposed SMC with perturbations in the DC bus current for all the operating conditions: stand-by stage ( i d c = 0 A), charge stage ( i d c < 0 A) and discharge stage ( i d c > 0 A). The simulation considers step perturbations in the bus current with a magnitude equal to 2 A, which is 100% higher than the magnitude of the perturbations used to test the controller reported in [15]. The simulation results demonstrate the satisfactory performance of the controller in compensating the bus current perturbations. Similarly, the simulation shows a fast and accurate tracking of the sliding surface in all the operating conditions. Note that the perturbations produce different deviations in the bus voltage: in the discharge stage, the battery current i b increases with the slope v b / L ( u = 1 ) and decreases with the slope v b v d c / L ( u = 0 ), which has a higher magnitude. Therefore, the transition from stand by to discharge is slower than the transition from discharge to stand by; hence, a larger voltage deviation occurs in the former transition. This comparison is presented in the magnified region at the bottom of Figure 16.
In contrast, the transition from stand by to charge occurs with the slope v b v d c / L ( u = 0 ); hence, it produces a lower voltage deviation compared with the transition from stand by to discharge. Finally, the transition from charge to stand by occurs with the slope v b / L ( u = 1 ), but due to the small voltage ripple in the stand-by condition, the voltage deviation is negligible.
Figure 17 presents an additional simulation that contrasts the performances of the proposed controller and the SMC without measuring i d c reported in [15]. The results demonstrate the improved disturbance rejection provided by the proposed solution:
  • Bus current step from 0 A to 1 A (5 ms): the bus voltage deviation produced under the control of the new solution is only 16 % of the deviation produced under the control of the solution in [15].
  • Bus current step from 1 A to 0 A (10 ms): the bus voltage deviation produced under the control of the new solution is only 6 % of the deviation produced under the control of the solution in [15].
  • Bus current step from 0 A to 1 A (15 ms): the bus voltage deviation produced under the control of the new solution is only 5 % of the deviation produced under the control of the solution in [15].
  • Bus current step from 1 A to 2 A (20 ms): the bus voltage deviation produced under the control of the new solution is only 33 % of the deviation produced under the control of the solution in [15].
This improved disturbance rejection is due to the faster battery current response provided by the proposed SMC. Such a condition is observed in the magnified region at the bottom of Figure 17, where the battery current imposed by the proposed SMC increases faster to compensate the bus current in a shorter time. This behavior results in a lower current extraction from the bus capacitor to provide a lower voltage deviation of the bus voltage.
It must be noted that step-like current perturbations, similar to ones considered in the previous analyses and simulations, could be triggered by sudden connections and disconnections of loads and generators to/from the DC bus. However, some real loads require a charge produce, e.g., electrical machines, which produces a relaxed waveform with a limited frequency content. Therefore, since the control system developed in this paper considers the worst-case scenario (step-like perturbations), this solution will provide shorter settling times and overshoots in presence of relaxed waveforms. Figure 18 shows the performance of the proposed SMC for both step-like and relaxed current perturbations in the DC bus: assuming a current transient with frequencies limited to 14 kHz (relaxed waveform), the maximum voltage overshoot is reduced 5 times and the settling time is reduced to the half, both in comparison with a step-like current transient (step waveform). Therefore, the solution proposed in this paper guarantees voltage overshoots and settling times smaller or equal to the limits defined in the design process.

7. Experimental Validation

To provide an experimental proof-of-concept, the battery charger/discharger and the proposed SMC were implemented as reported in Figure 19. In particular, Figure 19a shows the schematic diagram of the experimental platform. The prototype consists of a MT12330HR sealed lead-acid battery from MTEK [50], a BOP 50-20GL four-quadrant source/load from Kepco [51] to emulate the DC bus, the bidirectional power converter reported in Figure 5, and digital and analog circuits implementing the sliding-mode controller.
The implementation of the sliding surface includes two current-sensing circuits based on the AD8210 [52]: one of them measuring the DC bus current and the another measuring the battery current. Moreover, the DC bus voltage and battery voltage are scaled using voltage dividers. With this information, the adaptive surface of the SMC is calculated in a TMS320F28335 Delfino Microcontroller from Texas Instruments [53].
The hysteresis comparator was implemented with the timer TS555 [49] according to Figure 11, whose reference voltage is imposed by the TMS320F28335 through a MCP4822 digital-to-analog converter (DAC) [54], and according to Section 6, the hysteresis band was established as 0.25 A. However, this value was eventually scaled to a reference voltage within 2.50 V ± 0.83 V since the TS555 has a fixed H = 0.83 V. The TS555 output, i.e., the control signal u, is delivered to the HIP4081A MOSFET driver [55], which sets the states of both MOSFETs. The experimental setup is depicted in Figure 19b.
With the aim of providing a comparative analysis between the solution proposed in this paper and the SMC reported in [15], both SMCs were experimentally tested under the same conditions. Due to the physical limitations of the BOP 50-20GL four-quadrant source/load, the experiments consider relaxed current perturbations similar to the ones reported in Figure 18. Moreover, some parameters of this experimental evaluation are different from the parameters used in the simulation examples presented in the previous section: the experimental DC/DC power converter has a 44 μ F capacitor and a 22 μ H inductor. Finally, the DC bus voltage is regulated at 36 V to have a safe margin from the maximum voltage supported by the BOP 50-20GL (50 V).
For the experimental tests, the dynamic response of the system was defined with a maximum overshoot of 5%, which requires, according to Table 1, establishing the poles P 1 and P 2 at 704.76 rad/s and 9213.42 rad/s, respectively, with m = 13.0719 . Moreover, the settling time was set to 3 ms for ϵ = 1 %. Then, using Equations (49) and (50), the parameters k p = 0.4364 A/V and k i = 285.7040 A/(V·s) were calculated. These values ensure the global stability of the system by fulfilling the transversality and reachability conditions reported in Section 6.
Figure 20a presents the waveforms obtained with the SMC reported in [15]. The upper waveform shows the DC bus voltage, the middle one is the DC bus current, and the waveform at the bottom is the battery current. Similarly, Figure 20b shows, in the waveforms at the top, the comparison of the DC bus voltages generated by both the proposed SMC and the SMC reported in [15]. Moreover, the waveform in the middle is the same DC bus current, and the waveform at the bottom is the battery current generated by the proposed SMC.
To reproduce the simulations reported in Figure 17, the experimental perturbations in the DC bus current have a magnitude of 1 A in the three operating conditions: charge, discharge and stand by. Figure 20a shows the slow change in the battery current imposed by the SMC reported in [15]; in contrast, Figure 20b shows the fast change in the battery current imposed by the proposed SMC. This behavior enables the proposed SMC to provide a tighter voltage regulation. Moreover, the experiments consider a relaxed current waveform, hence the voltage overshoot and settling time must be smaller than the maximum limits imposed for the design process: 5% and 3 ms, respectively. In fact, the experimental voltage waveform reported in Figure 20b exhibits an overshoot near to 2% and a settling time near to 1 ms. Finally, both Figure 20a,b validate the analysis and simulations presented in the previous section and, simultaneously, demonstrate the correctness and implementation viability of the proposed solution.

8. Conclusions

This paper has presented a sliding-mode controller to regulate a bidirectional DC/DC converter interfacing a battery and a DC bus. The controller provides a satisfactory regulation of the DC bus voltage, improving the compensation of bus perturbations with respect to a previously reported solution. This tight bus regulation provides safe operating conditions to both the load and sources. The main feature of the new solution is the inclusion of the bus current in the sliding surface, which enables the controller to improve the compensation of bus perturbations. Moreover, the proposed design process ensures global stability in any operating condition, but at the price of the on-line calculation of one of the surface parameters, i.e., k b , which requires a fast microprocessor and ADC for the implementation.
The proposed SMC was tested under different operation conditions, achieving always the desired performance: the DC bus voltage exhibits limited voltage overshoots and settling times. In this way, the simulations reports a satisfactory match with the imposed criteria under the most extreme condition, i.e., step current perturbations. Moreover, the simulations also report smaller overshoots and settling times when the perturbations describe relaxed waveforms instead of ideal steps. Those results were confirmed by experimental measurements in a proof-of-concept platform, which ensures a safe operation of the DC bus under real conditions. Finally, both simulations and experiments were used to demonstrate the improved regulation with respect to a previously reported solution.
Another implementation challenge in power electronics is to avoid the current sensors, which are costly devices with high failure rates. For this topic, the mathematical analyses presented in this paper can be used to design an observer for the battery current. Moreover, replacing the classical boost (buck) charger/discharger with an interleaved structure will reduce the current ripple injected into the battery, which in turn will improve the battery health. These topics are currently under investigation.

Acknowledgments

This work was supported by the Automatic, Electronic and Computer Science research group of the Instituto Tecnológico Metropolitano, the Universidad Nacional de Colombia and Colciencias (Fondo Nacional de Financiamiento para la Ciencia, la Tecnología y la Innovación Francisco José de Caldas)under the projects MicroRENIZ-25439 (Code 1118-669-46197), UNAL-ITM-39823/P17211 and the doctoralscholarship 2012-567.

Author Contributions

Sergio Ignacio Serna-Garcés and Carlos Andrés Ramos-Paja conceived the idea and theoretical development. Sergio Ignacio Serna-Garcés and Daniel González Montoya designed and performed the simulations and experiments. Finally, Sergio Ignacio Serna-Garcés, Daniel González Montoya and Carlos Andrés Ramos-Paja wrote the paper.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Stand-alone power system with bus voltage regulation.
Figure 1. Stand-alone power system with bus voltage regulation.
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Figure 2. Structure of a cascade control of the charger/discharger.
Figure 2. Structure of a cascade control of the charger/discharger.
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Figure 3. Structure of a unified sliding-mode controller for the charger/discharger.
Figure 3. Structure of a unified sliding-mode controller for the charger/discharger.
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Figure 4. Simulation of the controller presented in [15].
Figure 4. Simulation of the controller presented in [15].
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Figure 5. Proposed structure of a sliding-mode controller with improved disturbance rejection for the charger/discharger.
Figure 5. Proposed structure of a sliding-mode controller with improved disturbance rejection for the charger/discharger.
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Figure 6. Concept of reachability conditions.
Figure 6. Concept of reachability conditions.
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Figure 7. Effect of damping ratio on the dynamic response of G d c ( s ) .
Figure 7. Effect of damping ratio on the dynamic response of G d c ( s ) .
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Figure 8. Simulation of G d c ( s ) for m = 0.0765 to ensure that Δ v d c = 5 % .
Figure 8. Simulation of G d c ( s ) for m = 0.0765 to ensure that Δ v d c = 5 % .
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Figure 9. Values of m to provide a desired Δ v d c .
Figure 9. Values of m to provide a desired Δ v d c .
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Figure 10. Simulation of G d c ( s ) with values of P 1 to ensure that t s = 3 ms for a settling time band ϵ = 2 % .
Figure 10. Simulation of G d c ( s ) with values of P 1 to ensure that t s = 3 ms for a settling time band ϵ = 2 % .
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Figure 11. Switching circuit implementing the control law in (51).
Figure 11. Switching circuit implementing the control law in (51).
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Figure 12. Block diagram of the charger/discharger and the sliding-mode controller (SMC).
Figure 12. Block diagram of the charger/discharger and the sliding-mode controller (SMC).
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Figure 13. Simulation of the proposed controller with a step perturbation in the DC bus current.
Figure 13. Simulation of the proposed controller with a step perturbation in the DC bus current.
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Figure 14. Circuit implemented in PSIM electrical simulator.
Figure 14. Circuit implemented in PSIM electrical simulator.
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Figure 15. Simulation of the proposed SMC with changes in the reference.
Figure 15. Simulation of the proposed SMC with changes in the reference.
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Figure 16. Simulation of the proposed SMC with perturbations in the bus current.
Figure 16. Simulation of the proposed SMC with perturbations in the bus current.
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Figure 17. Simulation of both the proposed SMC and the SMC without measuring i d c presented in [15].
Figure 17. Simulation of both the proposed SMC and the SMC without measuring i d c presented in [15].
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Figure 18. Behavior of the proposed SMC for both step and relaxed current perturbations.
Figure 18. Behavior of the proposed SMC for both step and relaxed current perturbations.
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Figure 19. Experimental platform. (a) Schematic diagram of the experimental platform; (b) Experimental devices.
Figure 19. Experimental platform. (a) Schematic diagram of the experimental platform; (b) Experimental devices.
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Figure 20. Experimental results for 1 A steps in the bus current. (a) DC bus voltage regulation with the SMC reported in [15]; (b) DC bus voltage regulation with the proposed SMC.
Figure 20. Experimental results for 1 A steps in the bus current. (a) DC bus voltage regulation with the SMC reported in [15]; (b) DC bus voltage regulation with the proposed SMC.
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Table 1. Poles for the simulation of G d c ( s ) presented in Figure 10.
Table 1. Poles for the simulation of G d c ( s ) presented in Figure 10.
Δ v dc m P 1 P 2
5 % 13.0719 473.7 rad/s 6192.2 rad/s
7 % 7.8128 664.4 rad/s 5190.8 rad/s
9 % 4.9373 847.1 rad/s 4182.4 rad/s
11 % 3.0858 1057.6 rad/s 3263.5 rad/s

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MDPI and ACS Style

Serna-Garcés, S.I.; González Montoya, D.; Ramos-Paja, C.A. Control of a Charger/Discharger DC/DC Converter with Improved Disturbance Rejection for Bus Regulation. Energies 2018, 11, 594. https://doi.org/10.3390/en11030594

AMA Style

Serna-Garcés SI, González Montoya D, Ramos-Paja CA. Control of a Charger/Discharger DC/DC Converter with Improved Disturbance Rejection for Bus Regulation. Energies. 2018; 11(3):594. https://doi.org/10.3390/en11030594

Chicago/Turabian Style

Serna-Garcés, Sergio Ignacio, Daniel González Montoya, and Carlos Andrés Ramos-Paja. 2018. "Control of a Charger/Discharger DC/DC Converter with Improved Disturbance Rejection for Bus Regulation" Energies 11, no. 3: 594. https://doi.org/10.3390/en11030594

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