Energy Efficient Design for Body Sensor Nodes
Abstract
:1. Overview of BSNs
BSN Requirements
2. Hardware Selection—Commercial off the Shelf or Custom?
3. General Strategies for Energy Efficient BSN Hardware
3.1. Supply Voltage Management
3.2. Communication versus Computation
3.3. Flexibility versus Efficiency
3.4. Data Fidelity versus Energy
- capable of being implemented on resource-constrained BSN embedded processors;
- capable of executing in low-latency and soft real-time applications;
- adjustable by key knobs to alter expected data reduction rates.
4. Case Studies
4.1. Case Study of COTS System: TEMPO
4.2. Case Study of Custom IC System
5. Conclusions
Energy per Instruction | Energy per Processed Sample | Delay per Sample | Estimate Max Achievable Data Rate | GOPS/W | |
---|---|---|---|---|---|
GPP (from [7]) | 2.62 pJ | 210 pJ | 8 μs (80 clock cycles) | 125 kHz | 4.76 |
FPGA (from [26]) | N/A | 2.22 pJ | 94.5 ns (1 clock cycle) | 10 MHz | 450 |
ASIC | N/A | 0.23pJ | 6.18 ns (1 clock cycle) | 150 MHz | 4348 |
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Zhang, Y.; Shakhsheer, Y.; Barth, A.T.; Powell Jr., H.C.; Ridenour, S.A.; Hanson, M.A.; Lach, J.; Calhoun, B.H. Energy Efficient Design for Body Sensor Nodes. J. Low Power Electron. Appl. 2011, 1, 109-130. https://doi.org/10.3390/jlpea1010109
Zhang Y, Shakhsheer Y, Barth AT, Powell Jr. HC, Ridenour SA, Hanson MA, Lach J, Calhoun BH. Energy Efficient Design for Body Sensor Nodes. Journal of Low Power Electronics and Applications. 2011; 1(1):109-130. https://doi.org/10.3390/jlpea1010109
Chicago/Turabian StyleZhang, Yanqing, Yousef Shakhsheer, Adam T. Barth, Harry C. Powell Jr., Samuel A. Ridenour, Mark A. Hanson, John Lach, and Benton H. Calhoun. 2011. "Energy Efficient Design for Body Sensor Nodes" Journal of Low Power Electronics and Applications 1, no. 1: 109-130. https://doi.org/10.3390/jlpea1010109