Next Article in Journal / Special Issue
Impact of Low-Variability SOTB Process on Ultra-Low-Voltage Operation of 1 Million Logic Gates
Previous Article in Journal
Multi-Threshold NULL Convention Logic (MTNCL): An Ultra-Low Power Asynchronous Circuit Design Methodology
Previous Article in Special Issue
Extensionless UTBB FDSOI Devices in Enhanced Dynamic Threshold Mode under Low Power Point of View
 
 
Article

Article Versions Notes

J. Low Power Electron. Appl. 2015, 5(2), 101-115; https://doi.org/10.3390/jlpea5020101
Action Date Notes Link
article pdf uploaded. 21 May 2015 15:21 CEST Version of Record https://www.mdpi.com/2079-9268/5/2/101/pdf
article html file updated 21 August 2015 12:28 CEST Original file -
article html file updated 26 March 2019 03:09 CET Update -
article html file updated 6 May 2019 19:31 CEST Update -
article html file updated 6 February 2020 18:52 CET Update https://www.mdpi.com/2079-9268/5/2/101/html
Back to TopTop