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Article

An Optimal Strategy for Submodule Capacitance Sizing of Cascaded H-Bridge-Based Active Power Filter

1
Department of Electrical Engineering, Shanghai University, Nanchen Road Nr. 333, Shanghai 200444, China
2
Key Laboratory of Control of Power Transmission and Conversion (SJTU), Ministry of Education, Shanghai Jiao Tong University, Shanghai 200025, China
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(21), 4444; https://doi.org/10.3390/electronics12214444
Submission received: 11 September 2023 / Revised: 19 October 2023 / Accepted: 25 October 2023 / Published: 29 October 2023
(This article belongs to the Section Power Electronics)

Abstract

:
This paper presents capacitor dimensioning to increase a system’s power density while the converter performance for the delta-connected cascaded H-bridge (CHB) active power filter (APF) is not impaired. After comparing aluminum electrolytic capacitors with film capacitors, this paper proposes capacitance design requirements for film capacitors. With the help of trigonometric transformation for periodic time-varying variables, including capacitor voltages and branch voltages, the capacitance design requirements can be represented as positive univariate polynomials, the coefficients of which are with regard to the capacitance value. The optimization solver SeDuMi is then applied to determine whether a capacitance value is feasible by checking the positiveness of the polynomials. This research has very appealing theoretical and practical properties: the time-domain analysis capability for periodic variables is improved, therefore, enabling a fast computation and a broad application. Both the simulations and experimental results validate the proposed strategy. Compared with the previous work, the proposed method can result in a lower capacitance value without degrading the performance, which is beneficial for a low-cost and low-volume system.

1. Introduction

Active power filters are power electronic converters used for improving the power quality by eliminating the harmonic pollution due to non-linear loads. Typical non-linear loads include diode rectifiers, high-speed railways, electric arc furnaces, etc. The delta-connected CHB multilevel converters, one of the most popular power converter topologies in the medium-voltage power systems, can be used as APFs for eliminating harmonic pollution [1,2]. Because of the modular structure of CHB, this topology has merits such as easy scalability and maintenance and elimination of the weighty and lossy line-frequency transformer in medium-voltage power systems. Traditionally, aluminum electrolytic capacitors are used for dc-link application to buffer the alternating powers. Because film capacitors have the advantages of long lifetime and high reliability, there is a trend that the aluminum electrolytic capacitors are replaced by film capacitors [3,4]. However, due to the low capacitance density of film capacitors, this will result in increased system volume, weight and cost.
According to the working principle of active power filters, there exists significant low-frequency voltage harmonics in the submodule (SM) capacitors, the main harmonic components of which are the even order ones, such as the 2nd, 4th, 6th and so on, see Figure 1. To keep the SM capacitor voltage ripple within a narrow range, the SM capacitances were designed to be very bulky. Therefore, it is beneficial to reduce the capacitance value to obtain a low-cost and low-volume system. However, most studies about various APF topologies focus on the analysis and control [5,6,7], while the dc-link capacitance design has been less studied. By integrating additional hardware or modifying the active power filter circuit to decouple the power harmonics [8,9,10,11,12], the dc-link capacitance value can be reduced considerably. However, the system becomes more complex and the cost increases. Conventional capacitance designs for shunt APFs were proposed in [13] by accepting a strongly fluctuating capacitor voltage at the 6th harmonics. However, since other harmonic components other than the 6th order in the capacitor voltages have been neglected, the analysis, as well as the capacitor dimensioning, are inaccurate and the actual required dc-link capacitance must be larger than the value calculated.
This minimal capacitance size in [14,15] is set such that the capacitors do not exceed the defined boundary for multilevel converters. In fact, these works [14,15] are more suitable for the capacitance design of aluminum electrolytic capacitors, the datasheet of which states that the permissible voltage range for continuous operation lies between the rated voltage and 0 V [16]. Unlike aluminum electrolytic capacitors, it is required to limit peak–peak voltage for film capacitors. In order to predict peak–peak variation in capacitor voltages, the capacitance sizing strategies estimate the positive and negative peaks of capacitor voltages using approximation technologies, including polynomial approximation [17] and the complete elliptic integral of the second kind [18]. However, these methods [17,18] are not accurate enough, since rough approximations were used. The converters were operated under capacitive and inductive operating modes in [19,20], in which the tangent function was used for representing the sines and cosines. Such representation is accurate; however, only the 2nd order capacitor voltage harmonic is considered and the methods are not suitable for APF application. In summary, the present papers [8,9,10,11,12,13,14,15,17,18,19,20] have one of the main shortcomings or more: (1) additional components are required so that the system complexity and cost are increased; (2) the capacitor design rules are insufficient; (3) the approximations were used so that the capacitance sizing methods are inaccurate; (4) a systematic strategy for capacitance sizing has not been developed.
This paper proposes a systematic and reliable capacitance sizing method that is able to determine the minimum required capacitance of the submodule capacitors for the CHB active power filter. The contributions are summarized as follows:
  • By comparison of aluminum electrolytic capacitors and film capacitors, the design rules specially for film capacitors are proposed.
  • With the help of trigonometric transformation, the capacitance design rules are represented as a series of positive univariate polynomials, coefficients of which are with regard to the capacitance value. This transformation is not an approximation but an equivalent representation so that the accuracy of the method is ensured.
  • The capacitance sizing strategy is formulated as an optimal problem, and the optimization solver SeDuMi is then applied to determine the minimal capacitance value that abides by the design constraints.
The rest of this paper is organized as follows. In Section 2, the analysis of capacitor voltages and branch voltages is given. In Section 3, after comparing aluminum electrolytic capacitors with film capacitors, the capacitance design rules suitable for film capacitors are proposed. The optimal problem with the minimum capacitance value as the objective function and the design rules as constraints is formulated. The optimization solver SeDuMi is then applied to calculate the minimal capacitance. In Section 4 and Section 5, simulations and experiments are performed to verify the proposed strategy. In Section 6, the merits of the proposed method are discussed. The conclusions are summarized in Section 7.

2. Generic Expression of Capacitor Voltages and Branch Voltages

The circuit configuration of the delta-connected CHB multilevel converter is shown in Figure 2. The power supply v g a , g b , g c , with associated inductor L s and resistor R s , feeds the nonlinear load. At the point of common coupling (PCC), the nonlinear load is connected in parallel to the delta-connected CHB. Each CHB branch consists of the cascaded connection of N submodules (SMs), and each SM capacitor has the same capacitance C. The branch resistor and inductor are represented by r and L, respectively. In Figure 2, u a b , b c , b c is the branch voltage generated by the series of SMs, i a b , b c , b c is the branch current, i 0 is the circulating current. Here, v s a , s b , s c is the PCC voltage.
The PCC line–line voltage v s a b , s b c , s c a is
v s a b = v s a v s b , v s b c = v s b v s c , v s c a = v s c v s a
Denoting u c a p a b , c a p b c , c a p c a SM i as the ith SM capacitor voltage in the corresponding branch, the SM capacitor sum voltage in branch- a b , b c , c a is
u c a p a b = i = 1 N u c a p a b SM i , u c a p b c = i = 1 N u c a p b c SM i , u c a p a b = i = 1 N u c a p c a SM i
Defining C s u m = C / N , the SM capacitor sum energy in branch- a b , b c , c a is
w a b = C s u m 2 u c a p a b 2 , w b c = C s u m 2 u c a p b c 2 , w c a = C s u m 2 u c a p c a 2

2.1. Generic Expression of Three-Phase Time-Varying Signals

The measurable PCC line–line voltage v s a b , s b c , s c a (or calculated from measured PCC voltages) contained in v s a b c can be either ideal or non-ideal, where the ideal voltages contain only the positive-sequence fundamental frequency component and the non-ideal voltages can be unbalanced and/or distorted. Therefore, generally speaking, variables in APF applications are periodic time-varying, containing multiple frequencies. Moreover, each frequency order in the variables is composed of the positive, negative and zero component. The nth frequency component in three-phase periodic time-varying variables can be expressed as follows:
x a b c n = x a b c + n + x a b c n + x a b c 0 n = 2 3 cos n ω t sin n ω t cos ( n ω t 2 π 3 ) sin ( n ω t 2 π 3 ) cos ( n ω t + 2 π 3 ) sin ( n ω t + 2 π 3 ) T + n x d + n x q + n x d q + n + 2 3 cos n ω t sin n ω t cos ( n ω t + 2 π 3 ) sin ( n ω t + 2 π 3 ) cos ( n ω t 2 π 3 ) sin ( n ω t 2 π 3 ) T n x d n x q n x d q n + cos n ω t sin n ω t cos n ω t sin n ω t cos n ω t sin n ω t T 0 n x d 0 n x q 0 n x d q 0 n

2.1.1. Expression of Branch Voltages

With the highest considered frequency order H and Equation (4), a general description of the three-phase branch voltages is
u a b c = u a b u b c u c a = n = 1 H u a b n u b c n u c a n = n = 1 H T + n u d q + n + T n u d q n + T 0 n u d q 0 n
Denoting u c a p d c as the dc component in the capacitor voltage u c a p i j , the nth frequency component in u a b , u b c and u c a can be rewritten as Equations (6), (7) and (8) respectively,
u a b n = 2 3 ( u d + n cos n ω t u q + n sin n ω t ) + 2 3 ( u d n cos n ω t u q n sin n ω t ) + ( u d 0 n cos n ω t u q 0 n sin n ω t ) = u c a p d c · 1 u c a p d c 2 3 u d + n + 2 3 u d n + u d 0 n a a b c n cos n ω t + u c a p d c · 1 u c a p d c 2 3 u q + n 2 3 u q n u q 0 n a a b s n sin n ω t
u b c n = 2 3 u d + n cos ( n ω t 2 π 3 ) u q + n sin ( n ω t 2 π 3 ) + 2 3 u d n cos ( n ω t + 2 π 3 ) u q n sin ( n ω t + 2 π 3 ) + ( u d 0 n cos n ω t u q 0 n sin n ω t ) = u c a p d c · 1 u c a p d c u d + n 6 + u q + n 2 u d n 6 u q n 2 + u d 0 n a b c c n cos n ω t + u c a p d c · 1 u c a p d c u d + n 2 + u q + n 6 u d n 2 + u q n 6 u q 0 n a b c s n sin n ω t
u c a n = 2 3 u d + n cos ( n ω t + 2 π 3 ) u q + n sin ( n ω t + 2 π 3 ) + 2 3 u d n cos ( n ω t 2 π 3 ) u q n sin ( n ω t 2 π 3 ) + ( u d 0 n cos n ω t u q 0 n sin n ω t ) = u c a p d c · 1 u c a p d c u d + n 6 u q + n 2 u d n 6 + u q n 2 + u d 0 n a c a c n cos n ω t + u c a p d c · 1 u c a p d c u d + 1 2 + u q + 1 6 + u d 1 2 + u q 1 6 u q 01 a c a s n sin n ω t
In Equations (6)–(8), a i j c n and a i j s n are the coefficients for the cosines and sines, which will be used afterwards. Observing the expression of u i j n , taking branch- i j ( i j = a b , b c , c a ) voltage containing the 1st and 5th order frequency components as an example, we find
u i j = u c a p d c a i j s 1 sin ( ω t ) + a i j c 1 cos ( ω t ) + a i j s 5 sin ( 5 ω t ) + a i j c 5 cos ( 5 ω t )
Sines and cosines can be expressed by tangent functions for half-cycle, such as
sin ( ω t ) = tan ( ω t ) 1 + tan 2 ( ω t ) , cos ( ω t ) = 1 1 + tan 2 ( ω t )
sin ( 5 ω t ) = tan ( ω t ) 5 10 tan 2 ( ω t ) + tan 4 ( ω t ) 1 + tan 2 ( ω t ) 2 1 + tan 2 ( ω t )
cos ( 5 ω t ) = ( 1 10 tan 2 ( ω t ) + 5 tan 4 ( ω t ) ) 1 + tan 2 ( ω t ) 2 1 + tan 2 ( ω t )
Denoting x = tan ( ω t ) , using the above functions (10)–(12), Equation (9) can be rewritten as
u i j = u c a p d c a i j s 1 sin ( ω t ) + a i j c 1 cos ( ω t ) + a i j s 5 sin ( 5 ω t ) + a i j c 5 cos ( 5 ω t ) = u c a p d c a i j s 1 x 1 + x 2 + a i j c 1 1 + x 2 + a i j s 5 x 5 10 x 2 + x 4 1 + x 2 2 1 + x 2 + a i j c 5 ( 1 10 x 2 + 5 x 4 ) 1 + x 2 2 1 + x 2

2.1.2. Expression of Capacitor Voltages

Capacitor voltages u c a p i j are composed of a dc and an ac component, denoted as u c a p d c and u ˜ c a p i j , respectively. Assuming a known u c a p d c , the quantification of u ˜ c a p i j is based on the following:
p i j = d w i j d t = C s u m u c a p i j d u c a p i j d t = C s u m u c a p i j d u ˜ c a p i j d t
where p i j resulted from the harmonic interaction of branch voltage and current,
p i j = u i j i i j
The interaction of the mth and nth frequency component results in the | m + n | th and the | m n | th harmonics. Therefore when the branch voltage [(9)] currents contain the positive-sequence 1st and negative-sequence 5th order frequency components, the powers, as in Equation (15), contain the negative-sequence 2nd, positive-sequence 4th, zero-sequence 6th, and positive-sequence 10th harmonics; please refer to the harmonic interaction analysis from the authors’ previous work [21]. Using the derivation procedure in Section 2.1.1, the squared capacitor voltages can be described by
u c a p i j = { u c a p d c 2 + 2 u c a p d c 2 C s u m ( b i j s 2 sin ( 2 ω t ) + b i j c 2 cos ( 2 ω t ) + b i j s 4 sin ( 4 ω t ) + b i j c 4 cos ( 4 ω t ) + b i j s 6 sin ( 6 ω t ) + b i j c 6 cos ( 6 ω t ) + b i j s 10 sin ( 10 ω t ) + b i j c 10 cos ( 10 ω t ) ) } 1 / 2 = { u c a p d c 2 + 2 u c a p d c 2 C s u m ( 2 b i j s 2 x 1 + x 2 + b i j c 2 ( 1 x 2 ) 1 + x 2 + 4 b i j s 4 x 1 x 2 1 + x 2 2 + b i j c 4 ( 1 6 x 2 + x 4 ) 1 + x 2 2 + b i j s 6 x 6 20 x 2 + 6 x 4 1 + x 2 3 + b i j c 6 ( 1 15 x 2 + 15 x 4 x 6 ) 1 + x 2 3 + b i j s 10 x ( 10 120 x 2 + 252 x 4 120 x 6 + 10 x 8 ) 1 + x 2 5 + b i j c 10 ( 1 45 x 2 + 210 x 4 210 x 6 + 45 x 8 x 10 ) 1 + x 2 5 ) } 1 / 2
where b i j c n and b i j s n are the coefficients for the cosines and sines.

3. Optimal Capacitance Design for Film Capacitors

In this section, aluminum electrolytic capacitors and film capacitors are compared. The optimal capacitance design for film capacitors is developed.

3.1. Aluminum Electrolytic Capacitors and Film Capacitors

For aluminum electrolytic capacitors, the permissible voltage range for continuous operation lies between the rated voltage ( V N D C ) and 0 V [16]. A superimposed alternating voltage, or ripple voltage, may be applied to aluminum electrolytic capacitors, provided that (1) the sum of the direct voltage and superimposed alternating voltage does not exceed the rated voltage, and (2) the maximum allowed ripple current is not exceeded and that no polarity reversal occurs.
For film capacitors [22], in addition to the peak voltage limitation ( V N D C ), which is dependent on the dielectric material and the film thickness, the continuous alternating voltage that film capacitors withstand should not exceed a threshold voltage, as shown in Figure 3. Because of the merits that film capacitors have lower equivalent series resistance (ESR) values and longer lifetimes than aluminum electrolytic capacitors, film capacitors are applied at the dc-link of SMs, and the capacitance design is proposed.

3.2. Constraints for Capacitance Design with Film Capacitors

Figure 4 gives schematic waveforms of the steady-state capacitor voltage and the absolute value of the branch voltage, with the branch voltage containing the 1st and 5th as an example. The datasheets of the film capacitor define the permissible peak and peak–peak voltage for continuous operation, denoted as V N D C and V N A C . Usually V N A C = ε V N D C and ε denote the capacitor voltage fluctuation ratio. Denoting the positive and negative peak value of the capacitor voltage as u c a p i j , m a x and u c a p i j , m i n , respectively, the following constraints are proposed to ensure the power quality and safety operation of the CHB system.
  • In the whole period, | u i j | < u c a p i j so that the power quality can be guaranteed.
  • The positive peak value of capacitor voltage shall not exceed the permissible peak voltage, u c a p i j < V N D C .
  • The peak–peak ripple voltage u p p shall not be greater than the permissible peak–peak voltage, u c a p i j , m a x u c a p i j , m i n < V N A C .

3.2.1. Overmodulation Avoidance

It is required that the absolute value of the branch voltage is less than the capacitor voltage,
u c a p i j > u i j , ( i j = a b , b c , c a )
We still take branch- a b as an example. Putting the branch voltage of Equation (13) and the capacitor voltage of Equation (16) into Equation (17), the following inequality can be obtained,
{ u c a p d c 2 + 2 u c a p d c 2 C s u m ( 2 b a b s 2 x 1 + x 2 + b a b c 2 ( 1 x 2 ) 1 + x 2 + 4 b a b s 4 x 1 x 2 1 + x 2 2 + b a b c 4 ( 1 6 x 2 + x 4 ) 1 + x 2 2 + b a b s 6 x 6 20 x 2 + 6 x 4 1 + x 2 3 + b a b c 6 ( 1 15 x 2 + 15 x 4 x 6 ) 1 + x 2 3 + b a b s 10 x ( 10 120 x 2 + 252 x 4 120 x 6 + 10 x 8 ) 1 + x 2 5 + b a b c 10 ( 1 45 x 2 + 210 x 4 210 x 6 + 45 x 8 x 10 ) 1 + x 2 5 ) } 1 / 2 > u c a p d c a a b s 1 x 1 + x 2 + a a b c 1 1 + x 2 + a a b s 5 x 5 10 x 2 + x 4 1 + x 2 2 1 + x 2 + a a b c 5 ( 1 10 x 2 + 5 x 4 ) 1 + x 2 2 1 + x 2
Square both side of the above equation, yielding the following polynomial
p 1 ( x ) = γ 1 , 1 ( C s u m ) x 10 + γ 1 , 2 ( C s u m ) x 9 + + γ 1 , 10 ( C s u m ) x + γ 1 , 11 ( C s u m ) > 0
where
γ 1 , 1 ( C s u m ) = ( 1 a a b s 1 2 a a b s 5 2 + 2 a a b s 1 a a b s 5 ) C s u m 2 b a b c 10 2 b a b c 2 + 2 b a b c 4 2 b a b c 6
γ 1 , 2 ( C s u m ) = ( 2 a a b c 1 a a b s 1 10 a a b c 5 a a b s 1 2 a a b c 1 a a b s 5 10 a a b c 5 a a b s 5 ) C s u m + 20 b a b s 10 + 4 b a b s 2 8 b a b s 4 + 12 b a b s 6
γ 1 , 10 ( C s u m ) = ( 2 a a b c 1 a a b s 1 2 a a b c 5 a a b s 1 10 a a b c 1 a a b s 5 10 a a b c 5 a a b s 5 ) C s u m + 20 b a b s 10 + 4 b a b s 2 + 8 b a b s 4 + 12 b a b s 6
γ 1 , 11 ( C s u m ) = ( 1 a a b c 1 2 2 a a b c 1 a a b c 5 a a b c 5 2 ) C s u m + 2 b a b c 10 + 2 b a b c 2 + 2 b a b c 4 + 2 b a b c 6
The coefficients γ m , n ( C s u m )   ( m = 1 , n = 1 , 2 , , 11 ) are decided by C s u m , since a a b c n , a a b s n , b a b c n and b a b s n are known parameters.

3.2.2. Peak Permissible Voltage

The positive peak capacitor voltage for continuous operation must not exceed the rated DC voltage, depending on the film thickness, the property of the dielectric material and the operating temperature. It should be recognized that any significant operation period at voltages above the rated one would reduce overall lifetime [22]. Denoting V N D C as the rated DC voltage, there is
u c a p i j < V N D C , ( i j = a b , b c , c a )
Put the branch- a b capacitor voltage of Equation (16) into Equation (24), square both sides, and reorganize the inequality, resulting in the following polynomial constraint
p 2 ( x ) = γ 2 , 1 ( C s u m ) x 10 + γ 2 , 2 ( C s u m ) x 9 + + γ 2 , 10 ( C s u m ) x + γ 2 , 11 ( C s u m ) > 0
Similarly with Equations (20)–(23), the coefficients γ m , n ( C s u m )   ( m = 2 , n = 1 , 2 , , 11 ) are related with C s u m .

3.2.3. Peak–Peak Permissible Voltage

The ability that a film capacitor has to withstand a continuous ac voltage is a function of frequency. As shown in Figure 3, below a certain frequency limit, the applied ac voltage should not exceed the threshold voltage. Otherwise, the corona discharge that degrades the film metallization and occasionally endangers its dielectric strength would start to occur [22]. Therefore, for the peak–peak alternating component of a unidirectional capacitor voltage, the following relation must be taken into consideration:
u c a p i j , m a x u c a p i j , m i n < ε V N D C
Equation (26) is rewritten as the following
u c a p i j < ε 2 V N D C + u c a p d c
ε 2 V N D C + u c a p d c < u c a p i j
which can be reorganized as the following inequalities. respectively, if Equation (16) is applied.
p 3 ( x ) = γ 3 , 1 ( C s u m ) x 10 + γ 3 , 2 ( C s u m ) x 9 + + γ 3 , 10 ( C s u m ) x + γ 3 , 11 ( C s u m ) > 0
p 4 ( x ) = γ 4 , 1 ( C s u m ) x 10 + γ 4 , 2 ( C s u m ) x 9 + + γ 4 , 10 ( C s u m ) x + γ 4 , 11 ( C s u m ) > 0
Furthermore, the coefficients γ m , n ( C s u m )   ( m = 3 , 4 , n = 1 , 2 , , 11 ) are with regard to C s u m .

3.3. Optimal Problem Formulation and Its Solution

From Equations (19), (25), (29) and (30), it can be observed that when the highest harmonic order in branch voltages/currents is 5 ( H = 5 ) , the constraints, which are represented by polynomials, are of degree 10 ( 2 H = 10 ) . If the branch voltages/currents contain only the fundamental frequency component ( H = 1 ) , in other words, the CHB is operated under the capacitive/inductive operating mode, the polynomial constraints are of degree two ( 2 H = 2 ) . Therefore, for the general case of reactive power and harmonic compensation ( H 1 , H is integer), the capacitance constraints can be described by polynomials as follows:
p m ( x ) = n = 0 2 H γ m , n ( C s u m ) · x n > 0 , for m = 1 , 2 , 3 , 4
where γ m , n ( C s u m ) represents the polynomial coefficients, which are either known or associated with the capacitance value C s u m . Equation (31) implies that feasible C s u m defines all the polynomials p m ( x ) positive. Consequently, denoting u = 1 x x H , we can transform the constraints (31) to
p m ( u ) = u Q m ( C s u m ) u > 0 , for m = 1 , 2 , 3 , 4
If the selected capacitance value C s u m is feasible, it guarantees the matrices Q m ( C s u m ) are positive-definite. In practice, low capacitance is beneficial to the system volume, weight and cost. Therefore, the optimal C s u m is the minimum of the feasible capacitance values. The optimal problem to design the capacitance value is formulated as
min C s u m subject to Q 1 ( C s u m ) > 0 , Q 2 ( C s u m ) > 0 , Q 3 ( C s u m ) > 0 , Q 4 ( C s u m ) > 0
The minimum value can be obtained with the help of the optimization solvers such as SeDuMi [23]. SeDuMi is for solving convex optimization problems involving linear equations and inequalities, second-order cone constraints and semidefinite constraints. The algorithm for selecting the optimal capacitance value is shown in Figure 5. An initial capacitance value (this value can be selected by using a simple estimation to make the voltage ripple very narrow) is chosen to check the positive-definiteness of Q m ( C s u m ) . Iteratively reducing the capacitance and checking the positive-definiteness of the matrices, if any one of Q m ( C s u m ) is negative definite, the algorithm is terminated. Tens to hundreds of milliseconds of cpu time is required for each iteration in the algorithm; therefore, the algorithm consumes a couple of seconds in total.

4. Simulations

In order to validate the capacitance value, simulations are conducted on practical CHB installations in medium-voltage distribution power systems. The load currents (in A) in Equation (34) and the PCC voltages (in V) in Equation (35) contain the positive-sequence 1st and the negative-sequence 5th frequency orders. It can be seen that the PCC voltages are distorted, and the total harmonic distortion is approximately 11 % . The powers contain the 2 nd, + 4 th, 06th, and + 10 th harmonics. The source currents after compensation are in phase with the positive-sequence fundamental frequency component in the PCC voltages [24].
i L a = 2000 sin ( ω t + π 18 ) + 400 sin ( 5 ω t + π 18 ) i L b = 2000 sin ( ω t 11 π 18 ) + 400 sin ( ω t + 13 π 18 ) i L c = 2000 sin ( ω t + 13 π 18 ) + 400 sin ( ω t 11 π 18 )
v s a = 11 2 × 1000 sin ( ω t ) + 3 × 1000 sin ( 5 ω t ) v s b = 11 2 × 1000 sin ( ω t 2 π 3 ) + 3 × 1000 sin ( 5 ω t + 2 π 3 ) v s c = 11 2 × 1000 sin ( ω t + 2 π 3 ) + 3 × 1000 sin ( 5 ω t 2 π 3 )
The branch inductor is L = 40 mH. Each branch contains 22 H-bridge submodules. We set the rated DC voltage as V N D C = 52.4 kV. The dc component of capacitor sum voltage is set as u c a p d c = 42.9 kV. The capacitor voltage fluctuation ratio ε = 0.28 [22]. The simulations with the minimal capacitance values subject to five constraint sets are conducted: (1) all the four polynomials p 1 ( x ) , p 2 ( x ) , p 3 ( x ) and p 4 ( x ) [Constraints (19), (25), (29) and (30)] are positive, resulting in the optimal capacitance C s u m , m i n ; (2) p 1 ( x ) , p 2 ( x ) and p 4 ( x ) [(19), (25) and (30)] are satisfied by omitting p 3 ( x ) [(29)], resulting in C s u m 1 ; (3) p 1 ( x ) , p 2 ( x ) and p 3 ( x ) [(19), (25) and (29)] are satisfied by omitting p 4 ( x ) [(30)], resulting in C s u m 2 ; (4) p 1 ( x ) and p 2 ( x ) [(19) and (25)] are satisfied by omitting p 3 ( x ) and p 4 ( x ) [(29) and (30)], resulting in C s u m 3 ; (5) p 1 ( x ) [(19)] is satisfied by omitting p 2 ( x ) , p 3 ( x ) and p 4 ( x ) [(25), (29) and (30)], resulting in C s u m 4 . The resulting capacitance values are listed in Table 1.
Figure 6 shows the simulation results with the capacitance values as C s u m , m i n (0.02 s–0.06 s), C s u m 1 (0.06 s–0.1 s), C s u m 2 (0.1 s–0.14 s), C s u m 3 (0.14 s–0.18 s) and C s u m 4 (0.18 s–0.22 s). The converter is injected at t = 0.02 s. From top to bottom are PCC line–line voltages, source currents, branch currents, the sum of SM capacitor voltages of each branch. It can be seen that the PCC voltages are distorted. Before the CHB is injected, the source currents are distorted. The steady-state source currents contain the positive-sequence fundamental frequency component after the CHB is inserted. More detailed information about the positive and negative values of the capacitor voltages are listed in Table 1. From the table, it can be seen that the optimal capacitance assures all the constraints are satisfied.
Figure 7 gives the simulated waveforms of capacitor voltages and branch voltages with C s u m , m i n at the steady state. The left and right subplot shows the time-domain waveforms and the spectra at some frequencies. The negative peak of u c a p c a is 37.3 kV, 10.7 % smaller than u c a p d c , and the positive peak value is 50.1 kV, which is 13.7 % greater than u c a p d c . It also shows that the 2nd, 4th, 6th and 10th orders are contained in the capacitor voltages. In addition to these harmonic frequency orders, the capacitor voltage contains the 8th harmonic and so on. The spectra components of “ u c a with PSPWM” with u c a show that the low frequency components are not impacted by the process of modulation.

5. Experimental Verification

A down-scaled prototype for single-phase CHB, as in Figure 8, is built for experimental verification. In the experiment, the voltages and currents are 0.001 and 0.01 of those in the simulations, resulting in an experimental capacitance of 10 times the simulations. The branch inductor L = 4 mH. Each branch consists of 2 H-bridge submodules. As shown in Figure 9, the controller is implemented by FPGA and DSP. The capacitor voltages and branch currents are measured with sensors LV25-P and LAH-25P, the measured voltages/currents are then sent to FPGA and DSP using analog-to-digital chip. FPGA sends the switching signals to IGBTs via optical fibers. The online diagram of the whole system is shown in Figure 9. The experiments with C s u m , m i n , C s u m 1 and C s u m 3 are given, see Figure 10, Figure 11 and Figure 12. Moreover, the experimental results are summarized in Table 2.
In Figure 10, the current i a b contains the 1st and 5th harmonics. The capacitor voltage u c a p a b contains multiple harmonics. The maximum and minimum value of u c a p a b are approximately 50.1 V and 37.3 V. All constraints are satisfied. The experimental result agrees with the simulation very well, validating the proposed sizing method. More detailed information about the positive and negative values of the capacitors voltages are listed in Table 2.
In order to validate the proposed strategy further, we evaluate the experiment results when C s u m 1 = 210 µF and C s u m 3 = 200 µF, see Figure 11 and Figure 12, respectively. When C s u m 1 = 210 µF [see Figure 11], only p 1 ( x ) , p 2 ( x ) and p 4 ( x ) are satisfied. u c a p i j , m a x u c a p d c V N D C = 16.2 % is larger than the boundary value 14 % . For C s u m 3 = 200 µF [see Figure 12], the peak voltage limitation is satisfied and the peak-peak voltage requirement is not satisfied, see Table 2.

6. Discussion

Most of the previous work about the CHB sizing is for reactive power compensation, where the branch voltage/current contains only the fundamental frequency component. The capacitance sizing for the delta-connected CHB-based active power filter is rarely studied. Nevertheless, there are some pieces of work for the capacitance sizing of an active power filter based on other power converter topologies. Here, the calculation for the capacitance value in [25] is compared with the proposed calculation, indicating the high accuracy of the proposed method. Using our introduced symbols, the expression of dc-link capacitance value, as presented in [25], is described as
C s u m t r T · i i j , m a x u c a p d c
where T is the fundamental frequency period, and i i j , m a x is the amplitude of the branch current. Based on the the data from the simulations in Section 4, T = 0.02 s and i i j , m a x = 400 A, which can be put into the above equation, the minimal capacitance in [25] can be obtained:
C s u m , m i n t r = 0.02 × 400 42.9 × 10 3 = 180 μ F
From the above analysis, the capacitance value should be C s u m , m i n t r = 180 μ F , while in the proposed calculation, the capacitance value is C s u m , m i n = 26 μ F [see Table 1]. The comparison of C s u m , m i n t r = 180 μ F and C s u m , m i n = 26 μ F indicates that the proposed method can result in a much lower capacitance value. Furthermore, this low capacitance can not only guarantee the power quality but also the safety performance. Because of the systematic nature of the proposed method, it can be easily generalized to capacitance sizing for other APF systems or CHB-based APF that needs to compensate for higher harmonic orders.

7. Conclusions

This paper has proposed the minimization of capacitance for delta-connected CHB-based APF, satisfying the constraints for power quality and system safety. As opposed to aluminum electrolytic capacitors, film capacitors have additional safety requirement for the peak–peak permissible voltage. This article takes the design rules concerning power quality and safety for film capacitors into consideration. Using the trigonometric function, the constraints are transformed into positive polynomials. The optimal problem with the minimum capacitance value as the objective function is subject to constraints. Using the optimal solver SeDuMi, an optimal capacitance value can be obtained. The simulations and experiments for reactive power and harmonic compensation under harmonic grid conditions validate that the obtained capacitance satisfies all the constraints.
It is well known that the capacitance value influences the converter cost and volume; therefore, the method is beneficial to a low-cost low-volume APF design if the allowable minimum capacitance is selected. The presented method can also be used in other power-electronic-based systems, especially for the applications where the low-frequency capacitor voltage harmonics should be an important consideration.

Author Contributions

Conceptualization, H.W.; methodology, H.W.; validation, H.W.; writing—original draft preparation, H.W.; writing—review and editing, H.W. and F.G.; project administration, H.W.; funding acquisition, H.W. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Key Laboratory of Control of Power Transmission and Conversion (SJTU), Ministry of Education under Grant 2021AC02 and grants from the Delta Power Electronics Science and Education Development Program of the Delta Group.

Data Availability Statement

The data can be provided if required.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. An active power filter with film capacitors applied at dc-link. (a) An APF connected in parallel with the loads. (b) Reduced Capacitance.
Figure 1. An active power filter with film capacitors applied at dc-link. (a) An APF connected in parallel with the loads. (b) Reduced Capacitance.
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Figure 2. Delta-connected CHB-based active power filter connected to the grid.
Figure 2. Delta-connected CHB-based active power filter connected to the grid.
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Figure 3. Alternating voltage limit for film capacitors [22].
Figure 3. Alternating voltage limit for film capacitors [22].
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Figure 4. Waveforms of the capacitor voltage and the absolute value of the branch voltage for harmonic compensation [the branch voltage containing the 1st and 5th as an example].
Figure 4. Waveforms of the capacitor voltage and the absolute value of the branch voltage for harmonic compensation [the branch voltage containing the 1st and 5th as an example].
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Figure 5. Flow chart to calculate the optimal capacitance value.
Figure 5. Flow chart to calculate the optimal capacitance value.
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Figure 6. Three-phase simulation results with C s u m , m i n (0.02 s–0.06 s), C s u m 1 (0.06 s–0.1 s), C s u m 2 (0.1 s–0.14 s), C s u m 3 (0.14 s–0.18 s) and C s u m 4 (0.18 s–0.22 s). The converter is injected at t = 0.02 s. From top to bottom are PCC line-line voltages, source currents, branch currents, the sum of SM capacitor voltages of each branch.
Figure 6. Three-phase simulation results with C s u m , m i n (0.02 s–0.06 s), C s u m 1 (0.06 s–0.1 s), C s u m 2 (0.1 s–0.14 s), C s u m 3 (0.14 s–0.18 s) and C s u m 4 (0.18 s–0.22 s). The converter is injected at t = 0.02 s. From top to bottom are PCC line-line voltages, source currents, branch currents, the sum of SM capacitor voltages of each branch.
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Figure 7. The capacitor voltage and the absolute value of the branch- c a voltage with C s u m , m i n . (Left): time-domain waveforms. (Right): Spectra components.
Figure 7. The capacitor voltage and the absolute value of the branch- c a voltage with C s u m , m i n . (Left): time-domain waveforms. (Right): Spectra components.
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Figure 8. A down-scaled prototype for single-phase CHB.
Figure 8. A down-scaled prototype for single-phase CHB.
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Figure 9. Online Diagram for single-phase CHB.
Figure 9. Online Diagram for single-phase CHB.
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Figure 10. Harmonic operation mode of CHB converter with C s u m , m i n = 260 µF.
Figure 10. Harmonic operation mode of CHB converter with C s u m , m i n = 260 µF.
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Figure 11. Harmonic operation mode of CHB converter with C s u m 1 = 210 µF.
Figure 11. Harmonic operation mode of CHB converter with C s u m 1 = 210 µF.
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Figure 12. Harmonic operation mode of CHB converter with C s u m 3 = 200 µF.
Figure 12. Harmonic operation mode of CHB converter with C s u m 3 = 200 µF.
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Table 1. Summary of the simulation results.
Table 1. Summary of the simulation results.
C s u m u c a p i j , m a x u c a p i j , m i n u c a p i j , m a x u c a p d c V N D C × % u c a p d c u c a p i j , m i n V N D C × % Constraints (19), (25), (29), (30)
C s u m , m i n = 26 µF 50.1 kV 37.3 kV 13.8 % 10.7 % All constraints satisfied
C s u m 1 = 21 µF51.7 kV35.9 kV 16.8 % 13.4 % (19), (25),(30) satisfied, omitting (29)
C s u m 2 = 26 µF50.1 kV37.3 kV 13.8 % 10.7 % (19), (25),(29) satisfied, omitting (30)
C s u m 3 = 20 µF52.2 kV35.5 kV 17.8 % 14.1 % (19), (25) satisfied, omitting (29), (30)
C s u m 4 = 7 µF66.7 kV17.7 kV 45.5 % 48.1 % (19) satisfied, omitting (25), (29) and (30)
Table 2. Summary of the experimental results.
Table 2. Summary of the experimental results.
C s u m u c a p i j , m a x u c a p i j , m i n u c a p i j , m a x u c a p d c V N D C u c a p d c u c a p i j , m i n V N D C Constraints (19), (25), (29), (30)
C s u m , m i n = 260 µF 50.1 V 37.3 V 13.8 % 10.7 % All constraints satisfied
C s u m 1 = 210 µF 51.4 V 35.7 V 16.2 % 13.8 % (19), (25),(30) satisfied, omitting (29)
C s u m 3 = 200 µF 52.0 V 35.4 V 17.4 % 14.3 % (19), (25) satisfied, omitting (29), (30)
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Wang, H.; Gao, F. An Optimal Strategy for Submodule Capacitance Sizing of Cascaded H-Bridge-Based Active Power Filter. Electronics 2023, 12, 4444. https://doi.org/10.3390/electronics12214444

AMA Style

Wang H, Gao F. An Optimal Strategy for Submodule Capacitance Sizing of Cascaded H-Bridge-Based Active Power Filter. Electronics. 2023; 12(21):4444. https://doi.org/10.3390/electronics12214444

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Wang, Hengyi, and Fei Gao. 2023. "An Optimal Strategy for Submodule Capacitance Sizing of Cascaded H-Bridge-Based Active Power Filter" Electronics 12, no. 21: 4444. https://doi.org/10.3390/electronics12214444

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