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Article
Peer-Review Record

Innovative Fault Current Evaluation Method for Active DC Grids

Electronics 2024, 13(5), 847; https://doi.org/10.3390/electronics13050847
by Julian Valbuena Godoy 1, Simone Negri 2, Francesca Oliva 1, Antonello Antoniazzi 3 and Roberto Sebastiano Faranda 1,*
Reviewer 1: Anonymous
Reviewer 2:
Electronics 2024, 13(5), 847; https://doi.org/10.3390/electronics13050847
Submission received: 29 January 2024 / Revised: 14 February 2024 / Accepted: 20 February 2024 / Published: 22 February 2024

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

This paper proposes an innovative, simple numerical approach to DC fault current evaluation. The paper is well-organized and presented, here are the several comments for better improving the quality.

 

1. The fault impedance will obviously affect the error of the DC short-circuit current calculation, but the fault impedance in practical case is also not easy to evaluate. Fortunately, the fault impedance will only reduce the value of short circuit current, and it will only increase conservatism without considering its effect. So in my opinion, the error introduced by the fault impedance is acceptable.

2. The hardware experimental validation is suggested.

3. More simulation results is required, especially for the different fault type.

4. These so-called traditional unreliable data and evaluations, their influence towards protection systems should be discussed in detail.

Comments on the Quality of English Language

Well organized and presented

Author Response

Reviewer 1

Comments and Suggestions for Authors

This paper proposes an innovative, simple numerical approach to DC fault current evaluation. The paper is well-organized and presented, here are the several comments for better improving the quality.

The authors  would like to thank the reviewer for his encouraging comments.

  1. The fault impedance will obviously affect the error of the DC short-circuit current calculation, but the fault impedance in practical case is also not easy to evaluate. Fortunately, the fault impedance will only reduce the value of short circuit current, and it will only increase conservatism without considering its effect. So in my opinion, the error introduced by the fault impedance is acceptable.

We greatly appreciate your valuable time and your helpful comments. The effect of the fault resistance is discussed in detail in the paper in lines  304 – 356. From this discussion, it should be evident that the reviewer considerations are true  only when the peak value of the line fault current is considered. Indeed, this cannot be considered true when Joule integrals and diode free-wheeling currents need to be evaluated (the traditional DC fault analysis can lead to strongly underestimate the Joule integral and to foresee a diode free-wheeling current not present in the real case). Therefore, the authors consider that, due to the approximations introduced in the traditional DC fault analysis method, when the latter is adopted the fault impedance can have a strong effect on the reliability of currents evaluated, leading to unacceptable results. We hope that this could be enough for the reviewer.

  1. The hardware experimental validation is suggested.

We greatly appreciate your valuable time and your helpful suggestion. Unfortunately, we are not currently able to provide significant experimental results, as the experimental validation of DC fault studies requires a real test facility. We are currently working on getting suitable equipment for experimental validation, which will be the topic of a future dedicated paper. We hope that this could be enough for the reviewer.

  1. More simulation results is required, especially for the different fault type.

We greatly appreciate your valuable time and your helpful suggestion. However, the main scope of this paper is not an extensive evaluation of the traditional DC fault analysis, but only to highlight its limits and to provide a suitable alternative to evaluate fault currents in DC systems with acceptable accuracy. Therefore, in the Authors’ opinion, the results presented in the paper are more than enough to demonstrate that the traditional DC fault analysis is not suitable for all the cases. So, adding more fault simulation results cannot provide significant added value for this paper.  In any case, to continue this research line on a broader spectrum of fault cases, we are currently working on this topic for a future dedicated conference paper. We hope that this could be enough for the reviewer.

  1. These so-called traditional unreliable data and evaluations, their influence towards protection systems should be discussed in detail.

We greatly appreciate your valuable time and your helpful suggestion. However, this paper is not focused on the system protection, but on correct fault current evaluation, which is a prerequisite for protection design. Therefore, the system protection is not analyzed in deep in the paper, but only shortly discussed as in section 2.3.3, where some considerations and values on Joule integrals are reported. A complete analysis of the effects of the inaccuracies introduced by the traditional DC fault analysis on the system protection would require a dedicated paper, and is out of the purposes of this work. We hope that this could be enough for the reviewer.

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

Authors present a numerical method for evaluating fault currents in DC smart grids (based on VSC converters). The paper is well written and organized. Here are some comments for authors' consideration:

- Page 2, line 42: "discharge of converters capacitors", is this specific to VSC (Voltage Source Converter) technology only, not LCC (Line Commutated Converter)? If so, that can be clarified here.

- Page 2, line 78: "with multiple"... is the word "converters" missing after "multiple"?

- Page 9, line 302: In addition to SIMULINK, if authors have access to PSCAD simulation tool, could a comment be made on the potential discrepancy between SIMULINK and PSCAD solutions?

- Page 19, Figure 7: can a discussion point be added, to identify at what value of time step, the curves start to differ more significantly? previous comment was that 0.01ms time step should be enough, which was demonstrated. However, might be interesting to identify the upper limit f the time step in this case, where curves start to differ.

- General comment: the method and case studies considered here seem to be specific to VSC converters (not LCC), so perhaps this could be emphasized or even included in the title? Unless it is pretty much straightforward and obvious.

- General comment: how does the application of the proposed numerical method (Euler) differ from the numerical methods used in SIMULINK simulation for example, that is used as a comparison? Is the proposed method less computationally extensive? Or, if it is not less computationally extensive compared to SIMULINK, the advantage is that it provides users with an option to basically write their own code (or create their own "software"), based on the algorithms laid out in the paper?

Author Response

Reviewer 2

Comments and Suggestions for Authors

Authors present a numerical method for evaluating fault currents in DC smart grids (based on VSC converters). The paper is well written and organized. Here are some comments for authors' consideration:

The authors  would like to thank the reviewer for his encouraging comments.

- Page 2, line 42: "discharge of converters capacitors", is this specific to VSC (Voltage Source Converter) technology only, not LCC (Line Commutated Converter)? If so, that can be clarified here.

Thanks for this suggestion that gave us the possibility to go in deep in this argument. To clarify the issue highlighted by the reviewer, the introduction of the paper has been modified (lines 41 - 44), reported here for your convenience:

“Specifically, in LVDC networks dominated by Voltage-Source Converters (VSCs), the first system reaction to a fault is the converters capacitors discharge, which can lead to a very high short-circuit current. Additionally, the series impedance of DC lines is typically lower
than that of AC lines, leading to a rapid surge in fault current.”

We hope that this could be enough for the reviewer.

- Page 2, line 78: "with multiple"... is the word "converters" missing after "multiple"?

Thanks for this suggestion that gave us the possibility to  correct a typing error.

- Page 9, line 302: In addition to SIMULINK, if authors have access to PSCAD simulation tool, could a comment be made on the potential discrepancy between SIMULINK and PSCAD solutions?

We greatly appreciate your valuable time and your helpful comments. Unfortunately, we do not have access to a PSCAD license. Nevertheless, we expect that, with similar simulation settings, two respected simulation tools would provide comparable results. In any case, the aim of the paper is not  to compare commercial simulation tools, but to provide an innovative alternative for DC fault analysis. We hope that this could be enough for the reviewer.

- Page 19, Figure 7: can a discussion point be added, to identify at what value of time step, the curves start to differ more significantly? previous comment was that 0.01ms time step should be enough, which was demonstrated. However, might be interesting to identify the upper limit f the time step in this case, where curves start to differ.

We greatly appreciate your valuable time and your helpful comments. Unfortunately, to identify the upper limit of the time step in these cases would not add significant value to the paper because:

1) the paper is not focused on simulation techniques;

2) the maximum time step which allows to perform a correct simulation is related to the fastest time constant of the system under analysis, so that this result cannot be generalized.  

We hope that this could be enough for the reviewer.

- General comment: the method and case studies considered here seem to be specific to VSC converters (not LCC), so perhaps this could be emphasized or even included in the title? Unless it is pretty much straightforward and obvious.

We greatly appreciate your valuable time and your helpful comments. Indeed, the reviewer is correct, and this is intentional as VSC as by far the most common family of converters used in LVDC systems, while LCC are nowadays limited to a number of very specific applications. Considering the modifications in the introduction (lines 41 - 44) subsequent to this reviewer, we think this aspect has been clarified in the revised version of the paper.  We hope that this could be enough for the reviewer.

- General comment: how does the application of the proposed numerical method (Euler) differ from the numerical methods used in SIMULINK simulation for example, that is used as a comparison? Is the proposed method less computationally extensive? Or, if it is not less computationally extensive compared to SIMULINK, the advantage is that it provides users with an option to basically write their own code (or create their own "software"), based on the algorithms laid out in the paper?

We greatly appreciate your valuable time and your helpful comments. Indeed, the reviewer is correct, as the main advantage provided by the proposed method is that it provides users with an option to write their own code (or create their own "software"), based on the algorithms laid out in the paper, with no need for licenses and/or commercial software. For this reason we did not perform a detailed comparison between the computational effort of the proposed method with respect to Simulink, or indeed any other commercial software. By our experience, the computational effort required by the proposed method is lower than an equivalent Simulink simulation, but it must be recognized that our method does not include any graphical interface. Furthermore, we did not explore the difference between computational times when the number of converters is increased. However, the main focus of this paper is the proposal of an alternative method, which can be easily used with no need for specific commercial software. We hope that this could be enough for the reviewer.

Author Response File: Author Response.pdf

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