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Article

A Design Method to Improve Temperature Uniformity on Wafer for Rapid Thermal Processing

School of Physics and Electronics, Hunan University, Changsha 410082, China
*
Author to whom correspondence should be addressed.
Electronics 2018, 7(10), 213; https://doi.org/10.3390/electronics7100213
Submission received: 4 September 2018 / Revised: 19 September 2018 / Accepted: 21 September 2018 / Published: 22 September 2018

Abstract

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Single-wafer rapid thermal processing (RTP) is widely used in semiconductor manufacturing. Achieving temperature uniformity on silicon wafer is a major challenge in RTP control. In this work, a lamp configuration including five concentric lamp zones is designed to obtain uniform temperature distribution on the wafer. An optics-based model is developed to determine the optimal lamp design parameters, and a uniformity criterion is proposed to evaluate the effective irradiance distribution of the tungsten–halogen lamps on the wafer. This method can be used to determine geometric parameters of the lamp array in order to achieve uniform temperature distribution on the wafer. A realistic simulation of a cold wall RTP system with five lamp rings and a 200-mm wafer is performed. The proposed model makes way for a simple method for determining the optimal lamp design parameters in RTP systems.

1. Introduction

The continuing downscaling of design features in ultra-large-scale integration (ULSI) is leading to manufacturing challenges in the semiconductor fabrication technology [1,2,3,4]. Hence, there is a need for better control of process parameters in order to meet the increasing demand. Thermal processes play an important role in the fabrication of semiconductor chips in the microelectronics industry. When dopant atoms are implanted into the substrate (usually by ion bombardment), the surface layers of silicon lose their crystalline structure. In order to recrystallize the surface layer and activate dopant atoms, it is necessary to anneal the wafer. Rapid thermal processing (RTP) is a technology that provides high ramp rates and short processing times for the activation of dopants with minimal redistribution combined with wafer annealing [5,6,7,8]. RTP is used for various processes during the fabrication of semiconductor devices, such as rapid thermal annealing (RTA), rapid thermal oxidation (RTO), rapid thermal chemical vapor deposition (RTCVD) and rapid thermal nitration (RTN). A typical RTP operating cycle consists of three phases: (i) a rapid heating phase to achieve a desired operating temperature, (ii) the constant-temperature processing phase, and (iii) a rapid cooling phase to cool down to ambient temperature [9]. Precise temperature control is necessary for RTP and there are several challenges that need to be addressed. Among them, maintaining uniform temperature distribution over the wafer at all times while following fast temperature trajectories is an important challenge. Numerous papers have addressed the issues related to wafer temperature control including thermal modeling, control strategy, lamp power controller, and temperature measurement [10,11,12,13,14,15]. However, most of the existing RTP systems are designed without rigorous treatment of the light flux distributions of the heating sources and their impact on wafer temperature patterns is not considered. In these approaches, the design optimization cannot be achieved until the RTP system has been constructed and tested by temperature measurements. Therefore, a predictive design method for heating sources (a tungsten–halogen lamp array) to achieve the temperature uniformity on wafer is desirable. In this work, the relationship between the arrangement of tungsten–halogen lamps and the uniformity of effective irradiance received by the wafer is studied, and an optimized concentric tungsten–halogen lamp array is designed. A criterion based on relative standard deviation is proposed to determine the temperature uniformity on the wafer. Simulation results show that the design yields good temperature uniformity distribution on the wafer. The proposed model makes way for a simple method for determining the optimal lamp design parameters in RTP systems.

2. Design Methodology

In this work, an axially symmetric RTP chamber is studied. A simplified schematic diagram of the RTP system is shown in Figure 1. In this system, power is supplied to several rings of tungsten–halogen lamps, and energy is transferred through a quartz window onto a thin silicon wafer via direct paths. In most RTP systems, dozens or hundreds of tungsten–halogen lamps are placed above and/or below the wafer in order to serve as the heating source. The radiation from the lamps with its central wavelength at about 900 nm heats the wafer through a selective absorption process. The temperature of wafer can be measured by thermocouples or pyrometers, and this data is used to control the output power of lamps through a feedback circuit.
For simplicity, the effect of chamber reflection and heat convection are neglected in lamp configuration design while only considering the radiative effect. The wafer is thin enough so that axial thermal gradient is neglected, and since silicon is opaque at temperature above 873 K, the silicon wafer is assumed to be a gray body at high temperatures. With these assumptions, the thermal balance equation can be expressed as,
P + ε 1 σ T 0 4 = 2 ε 2 σ T 4
where, the first term on the left is the effective irradiance density received by the wafer from the lamp array, the second term is the energy flow density absorbed by the wafer from the ambient (mainly including the quartz underlay), and the term on the right refers to the energy flow density that the silicon wafer radiates into the environment. In Equation (1), ε1 and ε2 are the emission coefficients of quartz and silicon respectively, σ is the Stefen–Boltzman constant, T0 and T are the temperatures of quartz and wafer respectively, and the coefficient 2 indicates that the wafer has two surfaces radiating outward simultaneously. The values of these constants are listed as: ε1 = 0.66, ε2 = 0.60 and σ = 5.672 × 10−8 W·m−2·K4.
An effective lamp configuration must have the capacity to provide the required irradiative heat flux to the wafer surface for maintaining uniform temperature both during steady-state and transient heating. For this purpose, the following design principles are proposed.
(i) Concentric lamp zones. Since the wafer is circular, concentric placement of the lamps around the central axis of the wafer is an effective way to ensure temperature uniformity. A concentric circle of lamps comprises of one lamp zone, as shown in the upper frame of Figure 1. Since the lamp array is axially symmetric, only temperatures in the radial direction of the wafer are of interest by assuming axisymmetric temperature distribution on the wafer.
(ii) Linear density of lamp zone. The linear density of the i-th lamp zone is defined as di = Ni/Ci, where Ni is the number of lamps in the zone and Ci is the circumference of the zone. Here, a condition is imposed where the linear density in the outer zone is greatly or equal to the inner zone, that is di+1di. This ensures that additional radiant exposure is achieved at the wafer edge to compensate for the edge heat loss.
(iii) Height of lamp array. The height of the lamp array is also an important factor affecting the temperature distribution on the wafer. In the following section, the lamp number N on each zone, the radius R of each zone and the height h of the lamp array are three variables chosen to calculate the effective irradiance density absorbed by a point on the wafer.
(iv) Uniformity criterion. In order to determine the optimal temperature distribution on the wafer by adjusting geometric parameters (N, R and h) of the lamp array, a uniformity criterion is defined for quantitative assessment. Assuming that the temperature T of a point on the wafer surface depends only on the effective irradiance of all lights at that point, the uniformity criterion can be expressed by the relative standard deviation (RSD) of the effective irradiance density P:
δ = k = 1 n ( P k P ¯ ) 2 n 1 P ¯ × 100 %
where k is the index of a point on a given radius of the wafer surface (a total of n points is evenly distributed on this radius), Pk is the effective irradiance density absorbed by the k-th point, and P ¯ is the average value of the effective irradiance densities at all points on this radius. According to this criterion, the temperature distribution on the wafer can be considered to be uniformity when the RSD reaches a minimum, δmin. The corresponding geometric parameters for the optimal design can then be obtained.

3. Problem Formulation

In this section, an optics-based approach is formulated in order to solve the temperature uniformity problem. A cylindrical coordinate system is used in which the origin (point O) is at the center of the wafer upper surface, the OZ-axis coincides with the central axis of the wafer, and is the pole axis, as shown in Figure 2. A ray from a point light source S (i.e. one point on a lamp zone) hits a point x on a given radius of the wafer upper surface, and then it is reflected and refracted at the point x, as shown in the inset of Figure 2. The point P is the projection of the source S on the wafer, θ is the angle between the lines Ox and OP, and α and β are the incidence and reflection angles respectively. Assume that h = SP, R = OP, r = Ox. According to the optics theory [16], the irradiance density received by a point x from a point light source Sij is expressed by:
P i j = W i j 4 π h ( r 2 + R i 2 + h 2 2 r R i cos θ i j ) 3 2
where Wij is the power of the j-th lamp on the i-th lamp zone. The total irradiance density received by the point x (the k-th point on the given radius) is:
P k = i j ( η i j P i j )
where ηij is the absorption coefficient. The absorption coefficient accounts for the fact that not all the irradiance that reaches the point can be absorbed. Since the wafer is assumed to be a grey body hereinabove, it is considered that all the light that is refracted into the wafer can be absorbed. Thus, based on the Fresnel formulae, the absorption coefficient is given by:
η i j = 1 2 ( 1 n Si | ( t 1 ) i j | 2 + n Si | ( t 2 ) i j | 2 )
where t1 and t2 are the parallel and vertical components of the amplitude transmissivity of the refracted light respectively, nSi is the refractive index of silicon. The coefficient 1/2 is introduced because the incidence rates in both parallel and vertical directions to the wafer surface are normalized to 1. The parameters t1 and t2 are expressed by:
t 1 = 2 cos α n Si cos α + cos β t 2 = 2 cos α cos α + n Si cos β
For convenience, we assume that all the lamps have the same power, W. The reduced effective irradiance density, Lk, is introduced as:
L k = 4 π W P k
Equation (2) can then be rewritten as:
δ = k = 1 n ( L k L ¯ ) 2 n 1 L ¯ × 100 %
where L ¯ is the average reduced effective irradiance density.

4. Design Procedure and Example

In the design of a RTP system, the effective illumination uniformity from a lamp array is a prerequisite in order to achieve temperature uniformity. Poor placement of lamp array can result in an increase in temperature difference, and the temperature uniformity cannot be improved regardless of how the RTP system is controlled. In this section, based on the proposed optimization methodology, a cold wall RTP system with five lamp rings and a 200 mm wafer is considered as an example to design an optimal tungsten–halogen lamp array. For simplicity, unless further specified, units of all the geometric parameters are mm in this section. The radii of the 1st, 2nd, 3rd, 4th and 5th rings of the lamp array are marked as R1, R2, R3, R4 and R5, respectively, and they are grouped into a matrix R = (R1,R2,R3,R4,R5). Similarly, the lamp number of the 1st, 2nd, 3rd, 4th and 5th rings of the lamp array are marked as N1, N2, N3, N4 and N5, respectively, and they are grouped into a matrix N = (N1,N2,N3,N4,N5).
The design procedure is summarized in the following steps.
Step 1: Initialization. Select a set of data in Ref. [17] as the initialization condition with R = (0, 32, 64, 96, 128), N = (1,6,12,19,26), as listed in Table 1.
Step 2: Optimizing N & h. Keep R constant, change N3, N4, and N5 as a function of h sequentially, and determine RSD to seek its minimum value.
Step 3: Refining N. Repeat Step 2 and continue to refine the values of N and h.
Step 4: Optimizing R & h. Keep N constant, change R2, R3, R4, and R5 as a function of h sequentially, and determine RSD to seek its minimum value.
Step 5: Analyzing the results. Analyze the results obtained in the above steps, and provide the optimal design parameters of the tungsten–halogen lamp array.
Table 1 summarizes the results obtained in Step 1, 2, 3, and 4. In the initialization condition, the RSD of the effective irradiance density on the wafer decreases rapidly and then increases gradually as the height of the lamp array is increased, as shown in the upper frame of Figure 3.
For the first step, with the initialization values, a minimum of RSD is obtained as δmin = 4.07% at h = 34 mm. From this result, it can be inferred that achieving a uniform temperature distribution on the wafer could be challenging due to the larger RSD value.
In Step 2, R is kept constant and N2 vs. h is carried out to find δmin. A δmin = 3.33% is obtained when h = 32, R = (0,32,64,96,128) and N = (1,6,14,19,26). Further, changing N3 vs. h yields a δmin = 1.11% when h = 40, R = (0,32,64,96,128) and N = (1,6,14,24,26). Finally, changing N4 vs. h gives a δmin = 0.727% when h = 58, R = (0,32,64,96,128) and N = (1,6,14,24,40), as listed in Table 1 and shown in the lower frame of Figure 3.
The third step and the fourth step are fine tuning processes, with only minor changes in the geometric parameters and the minimum values of RSD, as shown in the Table 1 and Figure 3. The final results are obtained with h = 64, R = (0,32,63,96,128), N = (1,6,12,23,45) and δmin = 0.396%. The linear densities of lamps on these lamp rings is also calculated, and the results are d = (N/A 0.030 0.030 0.038 0.056), which is in accordance with the second rule in Section 2. The linear density of the fifth lamp ring is the largest, which is beneficial to compensate for the heat loss near the edge of the wafer and to achieve better uniformity of the temperature distribution on the wafer.
The minimum of RSD is a sufficient condition in determining the uniform distribution of the effective irradiance received by the wafer. Figure 4 shows the minimum values of RSD determined from each sub-step of the lamp array design. It can be seen from Figure 4 that δmin = 4.07% initially, and then decreases rapidly during the Step 2. During Step 3 and 4, the δmin changes gradually, especially in the last three sub-steps, it stabilizes to 0.396%. This indicates that a certain degree of uniform effective irradiance distribution on the wafer has been attained and the optimized geometric parameters of lamp array can be extracted.
Next, the power of tungsten–halogen lamps required at a given annealing temperature is estimated based on the geometrical parameters of the lamp array obtained from the optimization procedure. First, the relative irradiance density is calculated by substituting the geometric parameters, h = 64, R = (0,32,63,96,128), and N = (1,6,12,23,45), into Equations (3) and (4). Then, under the ambient temperature setting, T0, the power of tungsten–halogen lamp can be obtained according to Equation (1). Here, the term 2ε1σT04 in Equation (1) originates from the thermal energy of the quartz underlay and the heat of the gas inside the chamber, which can be determined by measurement. Figure 5 shows the relationship between the power of tungsten–halogen lamp and the annealing temperature of silicon wafer at T0 = 300, 400, 500, 600, 700, and 800 K. The influence of ambient temperature on the power of tungsten–halogen lamp is relatively small, as evident from Figure 5. In order to better observe the trends, a partially enlarged section near 1000 °C is shown in the lower-right inset of Figure 5. The top-left inset of Figure 5 shows the lamp power vs. the ambient temperature for the annealing temperature 850 °C and 1000 °C, respectively. This data will help to compile the program stored in E2PROM of RTP system to control the temperature of wafer. For instance, on the condition of T0 = 300 K, when the annealing temperature is set to be 850 °C, the required power of each lamp will need to be 1.43 kW; or when the annealing temperature is set to 1000 °C, the required power of each lamp needs to be 2.36 kW.

5. Conclusions

A lamp configuration design method is proposed for achieving temperature uniformity of a RTP system. The central idea here is to optimize the geometrical parameters, including the radius of each lamp ring, the lamp number on each lamp ring and the height of lamp array, so as to minimize the variation of the effective irradiance received by the silicon wafer. An optics-based model is developed to determine the optimal lamp design parameters, and a uniformity criterion is introduced to evaluate the effective irradiance distribution of the tungsten–halogen lamps on the wafer. The efficacy of the design method is demonstrated through a design example in which the optimal geometrical parameters, h = 64, R = (0,32,63,96,128), and N = (1,6,12,23,45), are obtained for a cold wall RTP system with five lamp rings and a 200 mm wafer. The linear density of the outmost lamp ring needs to be the largest, which is beneficial to compensate for the heat loss near the edge of the wafer. Additionally, this method can also be used in the design of a RTP system with a 300 mm wafer. Based on the thermal balance equation presented in this work, the power of tungsten–halogen lamps required at a given annealing temperature can be determined, and this data can be integrated within the E2PROM of RTP system to control the temperature of wafer. In a practical setting, it may be necessary to explore both the open-loop and feedback control to evaluate the merit of the lamp design.

Author Contributions

H.-G.Y. developed the concept; P. H. designed and simulated the system; H.-G.Y. analyzed the data and wrote the paper.

Funding

This research was funded by the National Natural Science Foundation of China (Grant No. 61474041) and the Technology Program of Changsha (No. KQ1703001).

Acknowledgments

We gratefully acknowledge financial support from the National Natural Science Foundation of China (Grant No. 61474041) and the Technology Program of Changsha (No. KQ1703001). The authors would like to thank Cheng Xu of Shenzhen SI Semiconductors Co. LTD for his helpful discussions.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Hanson, G.W. Fundamentals of Nanoelectronics, 1st ed.; Pearson Education Asia Ltd.: Beijing, China, 2012; pp. 3–15. ISBN 9787030343826. [Google Scholar]
  2. Kim, J. New wafer alignment process using multiple vision method for industrial manufacturing. Electronics 2018, 7, 39. [Google Scholar] [CrossRef]
  3. Xu, D.; Wang, Z.; Liu, J.; Zhou, M.; Chen, W.; Chen, H.; Mo, J.; Yu, F. All-in-one wafer-level solution for mmic automatic testing. Electronics 2018, 7, 57. [Google Scholar] [CrossRef]
  4. Xu, Y.B.; Yang, H.G. Capacitance extraction method for a gate-induced quantum dot in silicon nanowire metal–oxide–semiconductor field-effect transistors. Chin. Phys. B 2017, 26, 127302. [Google Scholar] [CrossRef]
  5. Van Zant, P. Microchip Fabrication: A Practical Guide to Semiconductor Processing, 1st ed.; McGraw-Hill Education and Publishing House of Electronics Industry: Beijing, China, 2014; pp. 146–149. ISBN 9780071821018. [Google Scholar]
  6. Kurachi, I.; Takano1, H.; Kanie, H. Study of oxide-silicon interface state generation and annihilation by rapid thermal processing. Jpn. J. Appl. Phys. 2015, 54, 086501. [Google Scholar] [CrossRef]
  7. Wang, W.; Xi, Z.; Yang, D.; Que, D. Recombination activity of nickel in Czochralski silicon during rapid thermal process. Mat. Sci. Semicon. Proc. 2006, 9, 296–299. [Google Scholar] [CrossRef]
  8. Wang, W.; Yang, D.; Ma, X.; Zeng, Y.; Que, D. Recombination activity of nickel in nitrogen-doped Czochralski silicon treated by rapid thermal processing. Mater. Sci. Semicon. Process 2007, 10, 222–226. [Google Scholar] [CrossRef]
  9. Jeng, J.C.; Chen, W.C. Control strategies for thermal budget and temperature uniformity in spike rapid thermal processing systems. Comput. Chem. Eng. 2013, 57, 141–150. [Google Scholar] [CrossRef]
  10. Cho, Y.M.; Paulraj, A.; Kailath, T.; Xu, G. A contribution to optimal lamp design in rapid thermal processing. IEEE Trans. Semicond. Manuf. 1994, 7, 34–41. [Google Scholar] [CrossRef]
  11. Jan, Y.K.; Lin, C.A. Lamp Configuration Design for Rapid Thermal Processing Systems. IEEE Trans. Semicond. Manuf. 1998, 11, 75–84. [Google Scholar]
  12. Balakrishnana, K.S.; Edgar, T.F. Model-based control in rapid thermal processing. Thin Solid Films 2000, 365, 322–333. [Google Scholar] [CrossRef]
  13. Habuka, H.; Maruyama, K.; Suzuki, T. Design of a Rapid Thermal Processing System Using a Reflection-Resolved Ray Tracing Method. J. Electrochem. Soc. 2001, 148, G543–G547. [Google Scholar] [CrossRef]
  14. Xiao, T.; Li, H.X. Learning Control Approach for Thermal Regulation of Rapid Thermal Processing System. In Proceedings of the IEEE International Conference on Systems Man and Cybernetics Conference, Hong Kong, China, October 2015; pp. 334–340. [Google Scholar]
  15. Lovelett, J.R.; Hanket, M.G.; Shafarman, N.W.; Birkmire, W.R.; Ogunnaike, B.A. Design and experimental implementation of an effective control system for thin film Cu(InGa)Se2 production via rapid thermal processing. J. Process Contr. 2016, 46, 24–33. [Google Scholar] [CrossRef]
  16. Zhang, Y. Applied Optics, 4th ed.; Publishing House of Electronics Industry: Beijing, China, 2017; pp. 105–109. ISBN 9787121251467. (In Chinese) [Google Scholar]
  17. Dassau, E.; Grosman, B.; Lewin, D.R. Modeling and temperature control of rapid thermal processing. Comput. Chem. Eng. 2006, 30, 686–697. [Google Scholar] [CrossRef] [Green Version]
Figure 1. A simplified schematic of the rapid thermal processing (RTP) chamber. The lower frame: side-view of the RTP chamber, including a silicon wafer and a tungsten–halogen lamp array; the upper frame: bottom-view from the wafer for the configuration of the concentric tungsten–halogen lamps.
Figure 1. A simplified schematic of the rapid thermal processing (RTP) chamber. The lower frame: side-view of the RTP chamber, including a silicon wafer and a tungsten–halogen lamp array; the upper frame: bottom-view from the wafer for the configuration of the concentric tungsten–halogen lamps.
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Figure 2. A sketch of the geometrical relationship for the wafer irradiated by a tungsten–halogen lamp. The inset shows the reflection and refraction of a ray incident on the silicon wafer.
Figure 2. A sketch of the geometrical relationship for the wafer irradiated by a tungsten–halogen lamp. The inset shows the reflection and refraction of a ray incident on the silicon wafer.
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Figure 3. The relative standard deviation vs. the height of lamp array. The upper frame: RSD vs. the height of lamp array at the initialization condition; the lower frame: RSD vs. the height of lamp array after Step 2, 3 and 4, respectively.
Figure 3. The relative standard deviation vs. the height of lamp array. The upper frame: RSD vs. the height of lamp array at the initialization condition; the lower frame: RSD vs. the height of lamp array after Step 2, 3 and 4, respectively.
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Figure 4. The minimum, δmin, of RSD of effective irradiance density during each sub-step of optimal design.
Figure 4. The minimum, δmin, of RSD of effective irradiance density during each sub-step of optimal design.
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Figure 5. The lamp power vs. the wafer temperature at different ambient temperature. The top-left inset: the lamp power vs. the ambient temperature for the annealing temperature 1123 K (850 °C) and 1273 K (1000 °C); the lower-right inset: enlarged view near the wafer temperature of 1000 °C.
Figure 5. The lamp power vs. the wafer temperature at different ambient temperature. The top-left inset: the lamp power vs. the ambient temperature for the annealing temperature 1123 K (850 °C) and 1273 K (1000 °C); the lower-right inset: enlarged view near the wafer temperature of 1000 °C.
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Table 1. The radius R, the lamp number N of each lamp ring, the height h of the lamp array, and the RSD minimum δmin of the effective irradiance density obtained in each design step.
Table 1. The radius R, the lamp number N of each lamp ring, the height h of the lamp array, and the RSD minimum δmin of the effective irradiance density obtained in each design step.
StepRNhδmin
1(0 32 64 96 128)(1 6 12 19 26)344.07%
2(0 32 64 96 128)(1 6 14 24 40)580.727%
3(0 32 64 96 128)(1 6 12 23 45)660.473%
4(0 32 63 96 128)(1 6 12 23 45)640.396%

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Huang, P.; Yang, H. A Design Method to Improve Temperature Uniformity on Wafer for Rapid Thermal Processing. Electronics 2018, 7, 213. https://doi.org/10.3390/electronics7100213

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Huang P, Yang H. A Design Method to Improve Temperature Uniformity on Wafer for Rapid Thermal Processing. Electronics. 2018; 7(10):213. https://doi.org/10.3390/electronics7100213

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Huang, Peng, and Hongguan Yang. 2018. "A Design Method to Improve Temperature Uniformity on Wafer for Rapid Thermal Processing" Electronics 7, no. 10: 213. https://doi.org/10.3390/electronics7100213

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