Robust Sliding-Mode Control Design of DC-DC Zeta Converter Operating in Buck and Boost Modes

Abstract

This paper presents a new nonlinear control scheme for a pulse-width modulated dc-dc Zeta converter operating in buck and boost modes. The averaged model of the dc-dc power converter is derived, based on which a robust control law is developed using a simplified sliding-mode control technique. The existence and stability conditions are introduced to select proper controller gains that ensure fast output voltage convergence towards reference voltage. A detailed design procedure is provided to realize the control scheme using low-cost discrete components. The proposed control method handles large disturbances, accommodates the non-minimum phase property, and maintains regulated output voltage during step-up and step-down operation modes. The control system also maintains constant switching frequency, improves the transient response, and eliminates the steady-state error at the output voltage. A MATLAB/SIMULINK model is developed to simulate the closed-loop dc-dc Zeta converter in continuous conduction mode and investigate the tracking and regulation performance. The simulation results confirm the robustness and stability of the nonlinear controlled power converter under abrupt line and load variations.

1. Introduction

Energy efficiency has become a key objective in power system design. Pulse-width modulated (PWM) dc-dc converters play a crucial role in electrical power systems via providing an efficient energy conversion between different dc voltage levels. High efficiency results in high power density and low cost. In this scenario, dc-dc Zeta converters have garnered significant attention due to their numerous applications in various areas, including low-power systems, electric vehicles, renewable energy, and many others.

The dc-dc Zeta converter is a non-isolated power converter that offers significant advantages over traditional configurations. The main feature of this type of power converter is the ability to provide regulated output voltage while maintaining a variable conversion ratio between input and output. This makes it particularly suitable for applications where precise output voltage regulation is required, such as battery-powered systems or solar applications, where the photovoltaic array voltage can vary considerably.

To ensure reliable dc-dc Zeta converter operation in buck and boost modes under large disturbances, it is essential to employ an advanced and efficient control technique. This is because the classical linear control methods are only effective around a local operating point. In this context, the sliding-mode control (SMC) method has proven to be an excellent choice for power converter control system design. The SMC method is characterized by the robustness against the system parameters’ variation. Hence, this feature is advantageous when the power converter operates in buck and boost modes under line and load disturbances. The SMC technique has widely been used to control several power converter topologies such as buck [1,2], boost [3], quadratic boost [4], buck-boost [5,6], H-bridge [7,8], and multilevel converter [9]. SMC technique is a nonlinear control technique that offers inherent robustness against variations in system parameters, external disturbances, and modeling uncertainties. This technique is particularly suitable for applications that require fast transient response, precise tracking performance, and large disturbance rejection capability.

Table 1. Research endeavors in advanced control techniques of dc-dc Zeta converters.

Control Technique	Merits	Drawbacks	References
Hyper-plane sliding mode control	- Suitable for non-minimum phase power converters. - Robust reference tracking and large-signal stability.	- Complexity of control system structure. - Hardware implementation cost of nonlinear control system. - No systematic design procedure for electronic control circuit. - The operation is limited to buck or boost modes.	[10]
Robust sliding mode current control			[11]
Indirect sliding mode control	- Rejection of line, load, and reference variations.		[12]
Adaptive sliding mode control	- Unknown system parameters estimation. - Large-signal stability		[13,14]
PI sliding mode control	- Robust reference tracking. - Rejection of line and load disturbances.		[15]
Lyapunov redesign-based nonlinear control			[16]
Pole-placement via state-feedback control	- Achieve the desired transient response for local operating point.	- Control performance is deteriorated under large disturbances. - The operation is limited in buck or boost modes.	[17]
Peak-current control with ramp compensation	Suitable for non-minimum phase power converters.	- No systematic design procedure for electronic control circuit. - The operation is limited to buck or boost modes. - Complexity and implementation cost of adaptive control.	[18]
Current control			[19]
Adaptive control	- Unknown system parameters estimation. - Robust reference tracking.		[20]

summarizes the previous research work that has been introduced in the literature [10,11,12,13,14,15,16,17,18,19,20], which has focused on advanced control techniques of dc-dc Zeta converters. For instance, hyper-plane SMC [10], robust SMC [11], indirect SMC [12], adaptive SMC [13,14], and proportional-integral (PI) SMC [15] have been proposed for Zeta converters in various applications. Other control methods such as Lyapunov redesign-based control [16], pole placement via state-feedback control [17], peak-current control with ramp compensation [18], current-mode control [19], and adaptive control [20] have also been presented.

As shown in Table 1, the main advantages of the previous control methods include the robustness against large disturbances and accommodation for system parameters variation. Such feature allows the dc-dc Zeta converter to have a wide operating range and large-signal stability. However, a systematic design procedure using a simple electronic control circuit has not been reported. Moreover, previous control methods of dc-dc Zeta converters in step-up and step-down modes have not been considered. In [21], an efficient dc-dc Zeta converter has been introduced to operate in buck and boost modes. However, the design of robust control circuit has not been provided to handle the large disturbances and maintain precise tracking performance.

A systematic design procedure of a simplified sliding-mode voltage control circuit has been proposed in [22,23] for buck converters. In [24,25], a simplified sliding-mode current control method has also been proposed for non-minimum phase power converters, such as buck-boost and Cuk converters. Since the dc-dc Zeta converter is a non-minimum phase system, the nonlinear sliding-mode current control scheme is recommended to achieve a fast and robust dynamic response. Hence, motivated by the design approach in [25], a new sliding-mode current control circuit for dc-dc Zeta converters has been developed in continuous conduction mode (CCM). The main research contributions can be summarized as follows. (1) A new nonlinear control scheme is introduced to regulate the output voltage of dc-dc Zeta converters during step-up and step-down operation modes. (2) The system modeling, control law derivation, controller gains selection criteria, and design procedure of a simple control circuit have been provided. (3) The design approach of the nonlinear controlled power converter circuit has been simulated in MATLAB R2022b during abrupt line and load disturbances. (4) The tracking performance and transient response characteristics of the closed-loop PWM dc-dc Zeta converter has been analyzed.

The rest of the paper is organized as follows. The nonlinear model of the dc-dc Zeta converter in CCM is introduced in Section 2. Section 3 presents the design of the robust sliding-mode control circuit. Section 4 includes the results and discussion. Finally, the conclusions are covered in Section 5.

2. Nonlinear Model of Zeta Converter

2.1. Ideal Switched Zeta Converter Model

The dc-dc Zeta converter circuit typology is given in Figure 1. The switching elements are presented by the MOSFET switch S and the diode D. The energy storage elements are L₁, L₂, C₁, and C₂. For CCM, the ideal switched state-space model of the dc-dc Zeta converter can be written as [17]

$$\left\{\begin{array}{c}\frac{d{i}_{L1}}{dt}=-\frac{1}{L_1}{v}_{C1}\stackrel{-}{u}+\frac{1}{L_1}{v}_{I}u \\ \begin{array}{c}\frac{d{v}_{C1}}{dt}=\frac{1}{C_1}{i}_{L1}\stackrel{-}{u}-\frac{1}{C_1}{i}_{L2}u \\ \frac{d{i}_{L2}}{dt}=\frac{1}{L_2}{v}_{C1}u-\frac{1}{L_2}{v}_{C2}+\frac{1}{L_2}{v}_{I}u\\ \frac{d{v}_{C2}}{dt}=\frac{1}{C_2}{i}_{L2}-\frac{1}{{\mathrm{rC}}_2}{v}_{C2}. \end{array}\end{array}\right.$$

(1)

The state variables of the state-space model given in (1) are $i_{L1}$, $i_{L2}$, $v_{C1}$, and $v_{C2}$, which represent the large-signal quantities of inductor currents and capacitor voltages, respectively. The switching control input u and its complement $\stackrel{-}{u}$ take the values 0 or 1. In addition, $v_I$, $v_O$, and r represent the large-signal quantities of the input voltage, output voltage, and load resistance, respectively.

Since the parasitic components are neglected in (1), the output voltage $v_O$ is equal to the capacitor voltage $v_{C2}$.

2.2. Averaged Zeta Converter Model

In order to derive the equivalent control law based on the sliding-mode control method, the control-oriented model of the dc-dc Zeta converter in CCM should be derived [25]. The control state variables of the sliding-mode current controller can be defined as

$$\left\{\begin{array}{l}{x}_1=I_r-i_{L1}\\ x_2=\int \left(V_r-\mathsf{\beta }{v}_O\right)dt\\ x_3=\int x_{1}dt\\ x_4=\int x_{2}d\mathrm{t}. \end{array}\right.$$

(2)

where $I_r$, $V_r$, and $\mathsf{\beta }$ are the reference inductor current, reference output voltage, and output voltage sensor gain, respectively. It should be noted that the control state variables in (2) are constructed based on the error signals of input inductor current $i_{L1}$ and output voltage $v_O$.

As reported in [25], the current-mode control scheme is recommended for non-minimum phase power converters to improve the dynamic response of the sliding-mode controlled PWM dc-dc converter. Hence, for the SMC of dc-dc Zeta converter, a reference current can be defined by

$$I_r=K\left(V_r-\mathsf{\beta }{v}_O\right),$$

(3)

where $K$ is a positive constant gain. Moreover, the fourth control state variable in (2) contains the double-integral term of the error signal $\left(V_r-\mathsf{\beta }{v}_O\right)$, which has been included to track the reference voltage $V_r$ precisely.

The time derivatives of the control state variables in (2) give the following dynamic equations:

$$\left[\begin{array}{c}{\dot{x}}_1\\ {\dot{x}}_2\\ \begin{array}{c}{\dot{x}}_3\\ {\dot{x}}_4\end{array}\end{array}\right]=\left[\begin{array}{c}-\frac{u{v}_I-\stackrel{-}{u}{v}_{C1}}{L_1}-\frac{K\mathsf{\beta }{i}_{C2}}{C_2}\\ V_r-\mathsf{\beta }{v}_O\\ \begin{array}{c}{I}_r-i_{L1}\\ \int \left(V_r-\mathsf{\beta }{v}_O\right)dt\end{array}\end{array}\right]$$

(4)

where (4) reflects the dynamics of the dc-dc Zeta converter in CCM. The term $i_{C2}$ represents the instantaneous current through the capacitor $C_2$.

Next, the averaged control-oriented model of the dc-dc Zeta converter can be derived according to the averaging technique [22], which gives

$$\left[\begin{array}{c}{\dot{\stackrel{-}{x}}}_1\\ {\dot{\stackrel{-}{x}}}_2\\ \begin{array}{c}{\dot{\stackrel{-}{x}}}_3\\ {\dot{\stackrel{-}{x}}}_4\end{array}\end{array}\right]=\left[\begin{array}{c}-\frac{u_e{\stackrel{-}{v}}_I-{\stackrel{-}{u}}_e{\stackrel{-}{v}}_{C1}}{L_1}-\frac{K\mathsf{\beta }{\stackrel{-}{i}}_{C2}}{C_2}\\ V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\\ \begin{array}{c}{I}_r-{\stackrel{-}{i}}_{L1}\\ \int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt\end{array}\end{array}\right]$$

(5)

The averaged control-oriented model in (5) contains the averaged quantities of the capacitor current ${\stackrel{-}{i}}_{C2}$, inductor current ${\stackrel{-}{i}}_{L1}$, input voltage ${\stackrel{-}{v}}_I$, output voltage ${\stackrel{-}{v}}_O$, and averaged control input $u_e$ that varies between 0 and 1. The term ${\stackrel{-}{u}}_e$, on the other hand, is the complement of $u_e$.

3. Sliding-Mode Current Control Design of DC-DC Zeta Converter

3.1. Equivalent Control Method

The equivalent control law is a continuous function that is derived based on the invariance conditions and mapped onto a duty cycle to generate the control input of the sliding-mode controlled PWM dc-dc converter [26].

In order to derive the equivalent control law, a switching control input should be defined to satisfy the hitting condition [26], which can be written as

$$u=\frac{1}{2}\left[1+\mathrm{sign}\left(\mathsf{\psi }\right)\right].$$

(6)

The parameter $\psi$ is the sliding surface that is defined by the following equation:

$$\mathsf{\psi }={\mathsf{\alpha }}_1{x}_1+{\mathsf{\alpha }}_2{x}_2+{\mathsf{\alpha }}_3{x}_3+{\mathsf{\alpha }}_4{x}_4,$$

(7)

in which the constants ${\mathsf{\alpha }}_1$, ${\mathsf{\alpha }}_2$, ${\mathsf{\alpha }}_3$, and ${\mathsf{\alpha }}_4$ define the sliding coefficients of the sliding-mode current controller.

The time derivative of (7) yields the sliding surface dynamics $\dot{\mathsf{\psi }}$, which can be expressed as

$$\dot{\mathsf{\psi }}={\mathsf{\alpha }}_1{\dot{x}}_1+{\mathsf{\alpha }}_2{\dot{x}}_2+{\mathsf{\alpha }}_3{\dot{x}}_3+{\mathsf{\alpha }}_4{\dot{x}}_4=0.$$

(8)

It should be noted that (8) is equated to zero based on the invariance conditions [26]. Now, substituting (5) into (8) gives

$${\mathsf{\alpha }}_1\left(-\frac{u_e{\stackrel{-}{v}}_I-{\stackrel{-}{u}}_e{\stackrel{-}{v}}_{C1}}{L_1}-\frac{K\mathsf{\beta }{\stackrel{-}{i}}_{C2}}{C_2}\right)+{\mathsf{\alpha }}_2\left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)+{\mathsf{\alpha }}_3\left(I_r-{\stackrel{-}{i}}_{L1}\right)+{\mathsf{\alpha }}_4\left[\int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt\right]=0.$$

(9)

In (9), the averaged capacitor current ${\stackrel{-}{i}}_{C2}$ is zero at steady state [22]; therefore, this term can be neglected, which gives

$${\mathsf{\alpha }}_1\left(-\frac{u_e{\stackrel{-}{v}}_I-{\stackrel{-}{u}}_e{\stackrel{-}{v}}_{C1}}{L_1}\right)+{\mathsf{\alpha }}_2\left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)+{\mathsf{\alpha }}_3\left(I_r-{\stackrel{-}{i}}_{L1}\right)+{\mathsf{\alpha }}_4\left[\int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt\right]=0.$$

(10)

Hence, substituting (3) into (10) and solving for the term $u_e$ yields the equivalent control law

$$u_e=\frac{{\stackrel{-}{v}}_{C1}}{{\stackrel{-}{v}}_I+{\stackrel{-}{v}}_{C1}}-\frac{K_L}{{\stackrel{-}{v}}_I+{\stackrel{-}{v}}_{C1}}{\stackrel{-}{i}}_{L1}+\frac{K_p}{{\stackrel{-}{v}}_I+{\stackrel{-}{v}}_{C1}}\left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)+\frac{K_i}{{\stackrel{-}{v}}_I+{\stackrel{-}{v}}_{C1}}\int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt,$$

(11)

where the sliding-mode controller gains are defined by

$$\left\{\begin{array}{l}{K}_L=\frac{{\mathsf{\alpha }}_3}{{\mathsf{\alpha }}_1}{L}_1\\ K_p=\frac{\left({\mathsf{\alpha }}_2+K{\mathsf{\alpha }}_3\right)}{{\mathsf{\alpha }}_1}{L}_1 \\ K_i=\frac{{\mathsf{\alpha }}_4}{{\mathsf{\alpha }}_1}{L}_1\end{array}\right.$$

(12)

The proportional gain, integral gain, and inductor current gain of the SMC system are $K_p$, $K_i$, and $K_L$, respectively.

In order to implement the equivalent control law $u_e$ via a pulse-width modulator, the relationship among the control equation ${\widehat{u}}_e$, the duty cycle $d$, and the peak ramp voltage $V_T$ should be utilized.

$$0<d=\frac{{\widehat{u}}_e}{V_T}<1$$

(13)

The relationship in (13) maps (11) onto a PWM-based SMC equation, yielding

$$\left\{\begin{array}{l}{\widehat{u}}_e=\mathsf{\gamma }\left[{\stackrel{-}{v}}_{C1}-K_L{\stackrel{-}{i}}_{L1}+K_p\left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)+K_i\int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt\right]\\ {\mathrm{V}}_{\mathrm{T}}=\mathsf{\gamma }\left({\stackrel{-}{v}}_I+{\stackrel{-}{v}}_{C1}\right)\end{array}\right.$$

(14)

Note that (14) has been scaled down by a factor $\mathsf{\gamma }$, where $0<\mathsf{\gamma }<1$. The factor $\mathsf{\gamma }$ is utilized to adjust the controller parameters and the peak ramp voltage to suitable values that fit the practical implementation of the SMC circuit.

3.2. Existence and Stability Conditions

As reported in [26], the existence and stability conditions set the criteria of the sliding mode controller gains selection, which ensure a proper sliding-mode control operation.

3.2.1. Existence Condition

The local reachability condition $\underset{\mathsf{\psi }\to 0}{\lim }\mathsf{\psi }\dot{\mathsf{\psi }}<0$ yields the existence condition [26]. If this condition is satisfied, the state trajectories of the switched-mode power converter are kept within the sliding surface vicinity. Considering the dc-dc Zeta converter model given in (5), the local reachability condition yields the following existence condition:

$$\left\{\begin{array}{l}-K_L{i}_{L1}+K_p\left(V_r-\mathsf{\beta }{v}_O\right)+K_i\int \left(V_r-\mathsf{\beta }{v}_O\right)dt<v_I\\ K_L{i}_{L1}-K_p\left(V_r-\mathsf{\beta }{v}_O\right)-K_i\int \left(V_r-\mathsf{\beta }{v}_O\right)dt< v_{C1}.\end{array}\right.$$

(15)

The relationship given in (15) depends on the inductor, proportional, and integral gains $K_L$, $K_p$, and $K_i$, respectively. However, the existence conditions cannot guarantee the stability of the closed-loop system dynamics. The stability conditions should also be derived to guarantee the convergence of all the state trajectories towards the desired equilibrium point [26].

3.2.2. Stability Conditions

It is worth noting that the stability analysis of the proposed nonlinear current-mode controlled Zeta converter is complicated. Therefore, the stability of the linearized closed-loop Zeta converter model should be analyzed to derive the required stability conditions. If the time derivatives of the dc-dc Zeta converter model are set to zero, the steady-state inductor currents become

$$\left\{\begin{array}{l}{I}_{L1}=\frac{V_o^2}{V_{I}R}\\ I_{L2}=\frac{V_o}{R}\end{array}\right.$$

(16)

The equilibrium point in (16) includes the steady-state quantities of the input voltage $V_I$, output voltage $V_o$, input inductor current $I_{L1}$, output inductor current $I_{L2}$, and load resistance $R$.

The ideal sliding-mode controlled dc-dc Zeta converter is given in (17), which has been derived via substituting (11) into (1), thus

$$\left\{\begin{array}{l}\frac{d{i}_{L1}}{dt}=-\frac{1}{L_1}{v}_{C1}{\stackrel{-}{u}}_e+\frac{1}{L_1}{v}_I{u}_e\\ \frac{d{v}_{C1}}{dt}=\frac{1}{C_1}{i}_{L1}{\stackrel{-}{u}}_e-\frac{1}{C_1}{i}_{L2}{u}_e\\ \frac{d{i}_{L2}}{dt}=\frac{1}{L_2}{v}_{C1}{u}_e-\frac{1}{L_2}{v}_O+\frac{1}{L_2}{v}_I{u}_e\\ \frac{d{v}_O}{dt}=\frac{1}{C_2}{i}_{L2}-\frac{1}{{\mathrm{r}C}_2}{v}_O.\end{array}\right.$$

(17)

The parameters $u_e$ and ${\stackrel{-}{u}}_e$ are the equivalent control law and its complement, respectively. The ideal sliding-mode controlled dc-dc Zeta converter model in (17) can be linearized around the equilibrium point (16), which yields the following linearized model:

$$\left[\begin{array}{c}{\dot{\tilde{x}}}_1\\ {\dot{\tilde{x}}}_2\\ \begin{array}{c}{\dot{\tilde{x}}}_3\\ \begin{array}{c}{\dot{\tilde{x}}}_4\\ {\dot{\tilde{x}}}_5\end{array}\end{array}\end{array}\right]=\left[\begin{array}{ccccc}{j}_{11}& j_{12}& 0& j_{14}& j_{15}\\ j_{21}& j_{22}& 0 & j_{24}& j_{25}\\ j_{31}& j_{32}& 0& j_{34}& j_{35}\\ 0& 0& j_{43}& j_{44}& 0\\ 0& 0& 0& 1& 0\end{array}\right]\left[\begin{array}{c}{\tilde{x}}_1\\ {\tilde{x}}_2\\ \begin{array}{c}{\tilde{x}}_3\\ \begin{array}{c}{\tilde{x}}_4\\ {\tilde{x}}_5\end{array}\end{array}\end{array}\right].$$

(18)

In (18), the state vector elements ${\tilde{i}}_{L1}$, ${\tilde{v}}_{C1}$, ${\tilde{i}}_{L2}$, ${\tilde{v}}_O$, and $\int {\tilde{v}}_{O}dt$ are defined as ${\tilde{x}}_1$, ${\tilde{x}}_2$, ${\tilde{x}}_3$, ${\tilde{x}}_4$, and ${\tilde{x}}_5$, respectively. Assumptions that have been made to obtain the linearized model are $V_i=v_I$, $R=r$, $V_r=\mathsf{\beta }{V}_o$, $I_r=I_{L1}=K\left(V_r-\beta v_O\right),$ $V_{C1}={\tilde{v}}_{C1}$, and $V_O={\tilde{v}}_O$. The Jacobian Matrix elements $j_{11}$, $j_{12}$, $j_{14}$, $j_{15}$, $j_{21}$, $j_{22}$, $j_{24}$, $j_{25}$, $j_{31}$, $j_{32}$, $j_{34}$, $j_{35}$, $j_{43}$, and $j_{44}$ are defined as follows:

$$J=\left[\begin{array}{ccccc}-\frac{K_L}{L_1}& -\frac{V_i+V_{C1}-1}{L_1\left(V_i+V_{C1}\right)}& 0& -\frac{K_p\mathsf{\beta }}{L_1}& -\frac{K_i\mathsf{\beta }}{L_1}\\ \frac{1+\frac{{K_{L}V}_o}{R}\left(\frac{V_o}{V_I}+1\right)}{C_1\left(V_i+V_{C1}\right)}& -\frac{\frac{V_o}{R}\left(\frac{V_o}{V_I}+1\right)}{C_1\left(V_i+V_{C1}\right)}& 0& \frac{\frac{K_p\mathsf{\beta }{V}_o}{R}\left(\frac{V_o}{V_I}+1\right)}{C_1\left(V_i+V_{C1}\right)}& \frac{\frac{{K_i\mathsf{\beta }V}_o}{R}\left(\frac{V_o}{V_I}+1\right)}{C_1\left(V_i+V_{C1}\right)}\\ -\frac{K_L}{L_2}& \frac{1}{L_2}& 0& -\frac{K_p\mathsf{\beta }+1}{L_2}& -\frac{K_i\mathsf{\beta }}{L_2}\\ 0& 0& \frac{1}{C_2}& -\frac{1}{{RC}_2}& 0\\ 0& 0& 0& 1& 0\end{array}\right]$$

(19)

The stability of the linearized model can be analyzed based on the characteristic equation obtained from the determinant of (19), where

$${\mathsf{\lambda }}^5+P_1{\mathsf{\lambda }}^4+P_2{\mathsf{\lambda }}^3+P_3{\mathsf{\lambda }}^2+P_4\mathsf{\lambda }+P_5=0$$

(20)

is the characteristic equation of the Jacobian Matrix. Note that the parameters $P_1$, $P_2$, $P_3$, $P_4$, and $P_5$ are represented by

$$\left\{\begin{array}{l}{P}_1=-\left(j_{11}+j_{22}+j_{44}\right)\\ P_2=j_{11}{j}_{22}-j_{12}{j}_{21}+j_{11}{j}_{44}+j_{22}{j}_{44}-j_{34}{j}_{43}\\ P_3=-j_{35}{j}_{43}-j_{11}{j}_{22}{j}_{44}+j_{12}{j}_{21}{j}_{44}+j_{11}{j}_{34}{j}_{43}-j_{14}{j}_{31}{j}_{43}+j_{22}{j}_{34}{j}_{43}-j_{24}{j}_{32}{j}_{43}\\ P_4=-j_{15}{j}_{31}{j}_{43}+j_{11}{j}_{35}{j}_{43}+j_{22}{j}_{35}{j}_{43}-j_{25}{j}_{32}{j}_{43}-j_{11}{j}_{22}{j}_{34}{j}_{43}+j_{11}{j}_{24}{j}_{32}{j}_{43}\\ +j_{12}{j}_{21}{j}_{34}{j}_{43}-j_{12}{j}_{24}{j}_{31}{j}_{43}-j_{14}{j}_{21}{j}_{32}{j}_{43}+j_{14}{j}_{22}{j}_{31}{j}_{43}\\ P_5=-j_{11}{j}_{22}{j}_{35}{j}_{43}+j_{11}{j}_{25}{j}_{32}{j}_{43}+j_{12}{j}_{21}{j}_{35}{j}_{43}-j_{12}{j}_{25}{j}_{31}{j}_{43}-j_{15}{j}_{21}{j}_{32}{j}_{43}\\ +j_{15}{j}_{22}{j}_{31}{j}_{43}\end{array}\right.$$

(21)

Hence, if all the Eigenvalues of the Jacobian Matrix have negative real parts, then the linearized model of the closed-loop dc-dc Zeta converter is stable around the equilibrium point.

Thus, the stability conditions of the closed-loop dynamics of the dc-dc Zeta converter can be derived using the Routh–Hurwitz stability criterion [25]

$$\left\{\begin{array}{l}{P}_1>0\\ P_2> \frac{P_3}{P_1}\\ P_3>\frac{P_1{P}_4-P_5}{P_2-\frac{P_3}{P_1}}\\ P_4>\frac{P_4\left[\frac{P_5}{P_1}+P_2\left(P_2-\frac{P_3}{P_1}\right)\right]}{{2P}_5-P_1{P}_4+P_3\left(P_2-\frac{P_3}{P_1}\right)}\\ P_5>0.\end{array}\right.$$

(22)

Hence, if (22) is solved numerically, one can solve for the sliding-mode controller gains that ensure the system stability around the equilibrium point. It is worth noting that the gains $K_L$, $K_p$, and $K_i$ must be selected according to the existence and stability conditions so that the state trajectories remain within the vicinity of the sliding surface and converge towards the desired equilibrium point [26].

3.3. Control System Structure

In order to select proper controller gains that meet both existence and stability conditions, the dc-dc Zeta converter parameters must be known. First, it has been assumed that the input voltage V_I = (18–30) V, output voltage V_O = (12–48) V, load resistance R = (20–100) Ω, and switching frequency f_s = 100 kHz. Using the design equations in [27], the dc-dc Zeta converter parameters can be calculated, which are summarized in

Table 2. Parameters of dc-dc Zeta converter.

Description	Parameter	Value
Inductors	L1, L2	22 μH
Capacitors	C1, C2	33 μF
Load resistance	R	(20–100) Ω
Input voltage	VI	(18–30) V
Output voltage	VO	(12–48) V
Switching frequency	fs	100 kHz

.

According to the conditions in (15) and (22), the control law parameters $K_L$, $K_p$, and $K_i$ can be chosen to be 0.03, 413.6, and 455000, respectively. In addition, a scaling factor $\mathsf{\gamma }$ of 0.5 can be selected to scale down the control law and the peak ramp voltage V_T to a practical range. Hence, the proposed equivalent control law of the dc-dc Zeta converter is given by

$$\left\{\begin{array}{l}{\widehat{u}}_e=0.5\left[{\stackrel{-}{v}}_{C1}-0.03{\stackrel{-}{i}}_{L1}+413.6\left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)+455 \times {10}^3\int \left(V_r-\mathsf{\beta }{\stackrel{-}{v}}_O\right)dt\right]\\ V_T=6 \mathrm{V}. \end{array}\right.$$

(23)

The sliding-mode current controlled PWM dc-dc Zeta converter in CCM has been constructed in MATLAB/SIMULINK as shown in Figure 2.

3.4. Design of SMC Circuit of DC-DC Zeta Converter

The equivalent control Equation in (23) can be implemented using any MATLAB-based control system, such as dSPACE. Alternatively, the control law can be converted to a low-cost control circuit based on the design procedure given in [25] as follows:

• Inductor current gain $K_L$: The gain value is chosen as 0.03, where $K_L$ = R_L2/R_L1. If R_L1 is assumed to be 33 kΩ, then R_L2 is 1 kΩ.
• Summing amplifier: The values of the resistors R_S1–R_S4 of the summing op-amp can be set to 5.1 kΩ.
• PWM generator: The switching frequency and the ramp voltage V_T are chosen to be 100 kHz and 12 V, respectively.
• Scaling factor $\mathsf{\gamma }$: The factor $\mathsf{\gamma }$ is chosen as 0.5, where $\mathsf{\gamma }$ = R_I2 /R_I1. Hence, if R_I2 is 5.1 kΩ, then R_I1 yields 10 kΩ. In addition, V_T can be scaled down from 12 V to 6 V to reduce the peak ramp voltage.
• Proportional gain K_p: The gain is defined as K_p = R₂/R₁ [25]. Thus, if K_p is set to 413.6 and R₁ assumed to be 2.2 kΩ, then R₂ becomes 910 kΩ.
• Integral gain K_i: The gain is defined as K_i = 1/(R₁C) [25]. If K_i is set to 4.55 × 10⁵, then C is 1 nF.

3.5. Practical Design Considerations

Prior to the hardware implementation, extensive simulation under various operating conditions should be conducted to validate the proposed control design methodology. The tracking performance and disturbance rejection capability of the nonlinear controlled Zeta converter should be investigated in both step-up and step-down operation modes. The parasitic components, non-idealities of switching elements, and limited bandwidth of operational amplifiers should also be considered during the simulation of the closed-loop Zeta converter.

From a practical point of view, one of the most complex aspects can be the digital implementation of the control law as the quantization errors and delays degrade the control performance. To overcome this issue, an analog solution using operational amplifiers and discrete electronic components has been suggested in this research. However, it should be noted that the analog control circuit parameters may require tuning and adjustment to enhance the transient response characteristics of the power converter.

Another critical aspect of the practical implementation is the possible lack of exact knowledge of the components and their parasitic elements. Therefore, the use of a robust sliding-mode control technique considerably simplifies the experimental phase since the nonlinear control technique provides precise tracking performance despite the external disturbances and modeling uncertainty.

4. Results and Discussion

4.1. Validation of Control Design Approach

The control design approach of the simplified nonlinear control circuit of PWM dc-dc Zeta converter in CCM has been validated based on MATLAB R2022b simulation. The circuit in Figure 3 has been constructed using Simscape Electrical, and the power converter parameters are given in Table 2. The closed-loop power converter has been simulated under normal operating conditions, where the input voltage and load resistance are set to 24 V and 40 Ω, respectively.

The steady-state waveforms have of the ramp voltage, control voltage, gate-to-source voltage, and output voltage in buck and boost modes are depicted in Figure 4a,b, respectively. It can be seen that the dc-dc Zeta converter operates at a constant switching frequency of 100 kHz, while the duty cycle of the gate-to-source voltage in buck and boost modes are approximately 12% and 49.5%, respectively.

In addition, the averaged output voltage is 48 V, which confirms the regulation performance of the nonlinear controlled dc-dc Zeta converter. The peak-to-peak ripple at the output voltage during step-down and step-up operation is about 150 mV and 370 mV, respectively.

It is worth noting that the proposed control circuit has been simulated taking into account parasitic components, non-idealities of switches, and limited bandwidth of operational amplifiers.

4.2. Rejection of Large Line and Load Disturbances

The proposed sliding-mode current controlled PWM dc-dc Zeta converter has been simulated in MATLAB R2022b under large line/load disturbances in step-up and step-down modes to investigate the large disturbance rejection capability and tracking performance. The control objective is to maintain the desired output voltage under large deviation from the nominal operating condition and acceptable transient characteristics.

4.2.1. Boost Mode

The closed-loop power converter circuit shown in Figure 3 has been simulated in boost mode using Simscape Electrical, where the dc-dc Zeta converter parameters are defined as given in Table 2. Figure 5a,b show the transient response of the output voltage under step increase and decrease in load current at t = 7 ms, respectively. It has been observed that under large load disturbance, the maximum percentage undershoot and longest settling time are 6.7% and 3 ms (1% criterion), respectively.

In addition, Figure 6a,b exhibit the transient response of the output voltage during step increase and decrease in input voltage at t = 7 ms, respectively. Obviously, under large line disturbance, the maximum percentage undershoot and longest settling time are 2.3% and 2.5 ms (1% criterion), respectively. The transient characteristics of the closed-loop power converter in boost mode have been summarized in

Table 3. Dynamic response characteristics of proposed nonlinear control of PWM dc-dc Zeta converter in buck and boost modes.

Operation Mode	Step Line/Load Change	Percentage Peak Overshoot (%)	Settling Time (ms)	Output Voltage (V)
Buck Mode	$∆i_O \to 0.3 \mathrm{A} \mathrm{to} 0.60 \mathrm{A}$	2.5	2.0	12
	$∆i_O \to 0.3 \mathrm{A} \mathrm{to} 0.12 \mathrm{A}$	1.7	2.0	12
	$∆v_I \to 24 \mathrm{V} \mathrm{to} 30 \mathrm{V}$	0.8	1.3	12
	$∆v_I \to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	1.0	1.3	12
Boost Mode	$∆i_O \to 1.2 \mathrm{A} \mathrm{to} 2.40 \mathrm{A}$	6.7	3.0	48
	$∆i_O \to 1.2 \mathrm{A} \mathrm{to} 0.48 \mathrm{A}$	4.8	2.8	48
	$∆v_I \to 24 \mathrm{V} \mathrm{to} 30 \mathrm{V}$	1.7	2.0	48
	$∆v_I \to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	2.3	2.5	48

.

It can be seen that when the dc-dc Zeta converter is operated in boost mode, the proposed nonlinear control circuit rejects the large step change in input voltage and load current and maintains regulated output voltage at 48 V. Moreover, the maximum percentage overshoot/undershoot and settling time during large disturbances are within acceptable range.

4.2.2. Buck Mode

The robustness of the simplified nonlinear controlled dc-dc Zeta converter circuit against large disturbances has also been tested in step-down mode. Figure 7 and Figure 8 exhibit the transient response of the output voltage under load and line disturbances, respectively. As shown in Figure 7a, when the load changes from 0.3 A to 0.6 A at t = 7 ms, the maximum percentage undershoot and the longest settling time are 2.5% and 2 ms (1% criterion), respectively. On the other hand, the step decrease in input voltage in Figure 8b results in the maximum percentage undershoot of 1% and 1.3 ms settling time (1% criterion). The transient characteristics of the closed-loop dc-dc Zeta converter in buck mode have been summarized in Table 3.

Hence, it can be confirmed that the simplified nonlinear control circuit tolerates the large disturbances, regulates the desired output voltage, and provides wide operating range.

4.3. Comparison with Proportional-Integral Controller

The proposed sliding-mode current control scheme has been compared with the conventional PI controller under large disturbances in step-up and step-down modes. The proportional and integral gains of the conventional PI controller have been selected based on the Ziegler–Nichols method to operate the dc-dc Zeta converter in buck and boost modes, where the PI control law $u^{*}$ is defined as

$$u^{*}=0.1\left(V_r-\mathsf{\beta }{v}_O\right)+650\int \left(V_r-\mathsf{\beta }{v}_O\right)dt.$$

(24)

Figure 9a,b exhibit the tracking performance of the proposed and PI controllers when the dc-dc Zeta converter operates in boost mode during line and load disturbances. The transient response characteristics of the two controllers are summarized in

Table 4. Comparison of PI and proposed control methods of PWM dc-dc Zeta converter in boost mode under line and load disturbances.

Control Technique	Load/Line Disturbances	Percentage Peak Overshoot (%)	Settling Time (ms)	Output Voltage (V)
PI Control	$∆i_O\to 2.4 \mathrm{A} \mathrm{to} 1.2 \mathrm{A}$	7.3	3	48
	$∆i_O\to 1.2 \mathrm{A} \mathrm{to} 0.48\mathrm{A}$	6.3	4
Proposed Control	$∆i_O\to 2.4 \mathrm{A} \mathrm{to} 1.2 \mathrm{A}$	7.3	3	48
	$∆i_O\to 1.2 \mathrm{A} \mathrm{to} 0.48\mathrm{A}$	4.8	2.8
PI Control	$∆v_I\to 30 \mathrm{V} \mathrm{to} 24 \mathrm{V}$	2.9	2	48
	$∆v_I\to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	5	3
Proposed Control	$∆v_I\to 30 \mathrm{V} \mathrm{to} 24 \mathrm{V}$	1.7	2	48
	$∆v_I\to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	2.3	2.5

. As shown in Figure 9a and Table 4, under load disturbance conditions, the PI controller response exhibits longer settling time as compared to the proposed controller. However, in Figure 9b, the PI controller shows the largest percentage undershoot.

In Figure 10a,b, the tracking performance of the two controllers has been compared in step-down mode during line and load disturbance. The transient response characteristics of the two controllers are summarized in

Table 5. Comparison of PI and proposed control methods of PWM dc-dc Zeta converter in buck mode under line and load disturbances.

Control Technique	Load/Line Disturbances	Percentage Peak Overshoot (%)	Settling Time (ms)	Output Voltage (V)
PI Control	$∆i_O\to 0.6 \mathrm{A} \mathrm{to} 0.3 \mathrm{A}$	7.5	3.5	12
	$∆i_O\to 0.3 \mathrm{A} \mathrm{to} 0.12\mathrm{A}$	6.3	5
Proposed Control	$∆i_O\to 0.6 \mathrm{A} \mathrm{to} 0.3 \mathrm{A}$	3	2	12
	$∆i_O\to 0.3 \mathrm{A} \mathrm{to} 0.12\mathrm{A}$	1.7	2
PI Control	$∆v_I\to 30 \mathrm{V} \mathrm{to} 24 \mathrm{V}$	3.3	2.5	12
	$∆v_I\to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	4.5	3
Proposed Control	$∆v_I\to 30 \mathrm{V} \mathrm{to} 24 \mathrm{V}$	0.6	1	12
	$∆v_I\to 24 \mathrm{V} \mathrm{to} 18\mathrm{V}$	1	1.3

.

Figure 10a,b along with the transient characteristics given in Table 5 show that the PI controller response exhibits longer settling time and the largest overshoot as compared to the proposed controller. Hence, the comparison results confirm the superiority of the proposed sliding-mode current control circuit over the conventional control method.

5. Conclusions

A systematic design procedure of a robust nonlinear control scheme of a PWM dc-dc Zeta converter operating in buck and boost modes has been introduced. The power converter modeling and control design approach have been developed based on the simplified sliding-mode current control method. The equivalent control law has been derived based on the invariance conditions, while the existence and stability conditions have been provided to select proper sliding-mode control parameters. The nonlinear control equation has been realized in a simple electronic circuit, which is suitable for various industrial applications. For instance, photovoltaic and micro-mobility charging systems require low-cost and robust control schemes to improve the dc-dc Zeta converter dynamics, accommodate the modeling uncertainties, and tolerate the line and load disturbances. Thus, the proposed control circuit can be implemented as an alternative for complex and high-cost control platforms, such as dSPACE, OPAL-RT, and other real-time operating systems.

The closed-loop power converter circuit has been built and simulated in MATLAB/SIMULINK using Simscape Electrical to validate the control design approach under abrupt line and load disturbances. The desired output voltage has been determined based on the reference voltage that operates the power converter in buck or boost mode. The simulation results have shown that the nonlinear controlled PWM dc-dc Zeta converter tracks the desired reference voltage and provides (12–48) V regulated output voltage within (18–30) V input voltage and (20–100) Ω load resistance. It has also been confirmed that the proposed closed-loop power converter exhibits consistent transient response and robust tracking capability. It has been observed that the maximum percentage overshoot and longest settling time under large load disturbance were 6.7% and 3 ms, respectively. Under large line disturbance, however, the maximum percentage overshoot and longest settling time were 2.3% and 2.5 ms, respectively. This research can be extended in the future with PCB prototype designs and experimental validation.