Technical Advances in Semiconductor Process

Dear Colleagues,

The development of nanoscale semiconductor processing has been driven by the structural innovation of devices and application of new materials for the last two decades. Especially, in the era of sub-3 nm gate-all-around field-effect-transistor (GAAFET) devices, as the contact poly pitch (CPP) is reduced to less than 45 nm, research on the advanced technologies, such as  EUV-based nanopatterning processes, novel metal processes with low resistance, and inventive scheme processes (i.e., BSPDN: Back Side Power Delivery Network), have garnered notable attention in realizing next-generation semiconductor devices.

This Special Issue will cover recent advances and comprehensive strategies in our fundamental understanding, advanced technologies, and new material development, with a focus on semiconductor processing for next-generation technology nodes. This will bring together a diverse set of leading researchers and engineers from academia to industry who focus on new materials, advances in materials characterization, material design, process modeling, and fundamental science in the semiconductor manufacturing field.

Dr. Kangchun Lee
Dr. Kiho Bae
Guest Editors

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• semiconductor processing
• patterning process
• thin film process
• process integration
• defect