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Memristor Device and Memristive System
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Memristor Device and Memristive System

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".

Deadline for manuscript submissions: 15 October 2026 | Viewed by 1662

Editors

Dr. Nataša Samardžić

E-Mail Website
Guest Editor
Faculty of Technical Sciences, Department of Power, Electronic and Telecommunication Engineering, University of Novi Sad, 21000 Novi Sad, Serbia
Interests: memristive neural networks; modeling of memristive devices; spiking neural networks; neuromorphic computing
Dr. Max Talanov

E-Mail Website
Guest Editor
1. Institute for Artificial Intelligence R&D of Serbia, 21000 Novi Sad, Serbia
2. Engineering Department, University of Messina, 98122 Messina, Italy
Interests: spiking neural networks; neuromorphic computing; neurosimulation; computational neuroscience
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

This Special Issue of Electronics, entitled “Memristor Device and Memristive System”, is dedicated to both theory and applications of memristors and memristive devices and systems, especially in the domain of brain-inspired computing, i.e., neuromorphic computing. Starting with the theoretical foundations for the fourth fundamental circuit element, postulated in the work of Prof. Leon Chua in 1971, followed by an influential paper from 2008 by the HP Labs group led by Stanley Williams, memristors continue to attract extensive research interest. With the ability to support multilevel resistance states, inherent plasticity, high scalability potential, and energy-efficient operation modes, memristive devices are promising building blocks in neuromorphic computing.  

This Special Issue aims to collate original research papers in the domain of mathematical models of memristive devices (including memristors, memcapacitors, and meminductors), design and application of memristive circuits, ReRAM, memristive-based neurons and synapses, training algorithms for memristive neural networks (MNNs) and memristive spiking neural networks (MSNN), neuromorphic computing, and the design and application of bio-inspired computing architectures.

Research areas of interest within this Special Issue include, but are not limited to, the following:

  1. Training algorithms for memristive neural networks and memristive spiking neural networks;
  2. Theoretical modeling of memristive devices;
  3. Artificial neural networks based on memristors;
  4. Memristive neuron and synapse for SNNs and MSNNs;
  5. Unconventional computing with memristors;
  6. Neuromorphic circuits;
  7. Bio-inspired algorithms and systems;
  8. In-memory computing;
  9. Applications of memristors in AI;
  10. Complex networks with memristors;
  11. Application of memristive circuits in biomedical engineering.

Dr. Nataša Samardžić
Dr. Max Talanov
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 250 words) can be sent to the Editorial Office for assessment.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-anonymized peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

 

Keywords

  • memristive devices
  • memristive neural networks
  • theoretical models
  • neuromorphic computing
  • memristive neurons and synapses
  • spiking neural networks
  • memristive circuits
  • bio-inspired algorithms
  • nonlinear circuits
  • in-memory computing
  • complex networks

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Published Papers (2 papers)

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Research

28 pages, 5997 KB  
Article
Memristor-Based Read–Write Interface Design for Neural Networks: A Comparative Study of Linear-Drift and VTEAM Models
by Zeen Fang, Mingyang Zhu, Hanbo Xu and Lei Zhang
Electronics 2026, 15(11), 2333; https://doi.org/10.3390/electronics15112333 - 28 May 2026
Viewed by 310
Abstract
This paper presents a behavioral-level, pre-silicon analytical co-design framework for memristor read–write interfaces, intended to establish closed-form design rules that subsequently guide SPICE-level and silicon-level realizations. Memristor-based neural hardware requires interfaces that can program resistance states efficiently while suppressing read disturbance, yet existing [...] Read more.
This paper presents a behavioral-level, pre-silicon analytical co-design framework for memristor read–write interfaces, intended to establish closed-form design rules that subsequently guide SPICE-level and silicon-level realizations. Memristor-based neural hardware requires interfaces that can program resistance states efficiently while suppressing read disturbance, yet existing designs typically rely on empirical tuning without closed-form analytical rules. We close this gap by deriving a single closed-form operating-window inequality (von<Vrd<voff,Vwr≥Vwrmin(Twr)) from the VTEAM state equation, embedding it in an Energy–Delay–Accuracy (EDA) cost function, and validating the resulting parameter set hierarchically up to MNIST-scale inference. The main finding is that this analytically derived parameter set simultaneously achieves a 96.08% set-cycle energy saving and 90.6% MNIST top-1 accuracy (1.2% below software baseline) under realistic D2D/C2C variability, with every measured number agreeing with its analytical prediction within 2%. The framework is instantiated with a two-phase over-threshold-write and sub-threshold-read timing strategy together with a mutually exclusive PMOS-NMOS path-isolation topology, evaluated through behavioral-level MATLAB simulation under linear-drift and VTEAM models. Behavioral simulation confirms each analytical bound within 2%: a 13.78× resistance window with ≤0.008% cycle-to-cycle drift, 5.01% read-current CV, and 30.94%/96.08% Reset/Set energy savings versus a no-separation baseline. Transistor-level non-idealities (slew rate, charge injection, RTN, retention aging, peripheral overhead) are bounded analytically; full SPICE/silicon validation is identified as immediate follow-up work. These results establish a reusable, analytically grounded reference design that bridges memristive device modeling, circuit-level interface implementation, and neural network-level usability. Full article
(This article belongs to the Special Issue Memristor Device and Memristive System)
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16 pages, 2438 KB  
Article
A Proof-of-Concept of a Bio-Inspired Neuromorphic Hierarchical System Behaving as an Associative Memory for Multisensory Integration
by Marta Pedro, Javier Martin-Martinez, Rosana Rodriguez and Montserrat Nafria
Electronics 2026, 15(7), 1385; https://doi.org/10.3390/electronics15071385 - 26 Mar 2026
Viewed by 609
Abstract
The brain’s primary sensory processing areas often present a topographical organization and are distributed following hierarchical architecture, permitting the integration of the information in higher levels of its hierarchy: a process referred to as multisensory integration. A system with such characteristics naturally computes [...] Read more.
The brain’s primary sensory processing areas often present a topographical organization and are distributed following hierarchical architecture, permitting the integration of the information in higher levels of its hierarchy: a process referred to as multisensory integration. A system with such characteristics naturally computes in a parallel and distributed manner and is based in associations between the different symbols built from our perceptions of the environment. In this work, we take inspiration from the sensory processing areas of the brain and propose proof-of-concept of a multi-layered neuromorphic system with parallel and distributed computing capabilities by means of simulation. The proposed neuromorphic architecture is constituted by identical self-organizing modules which are trained with on-line unsupervised-friendly learning rules, such as the spike-timing-dependent plasticity (STDP). These self-organizing modules are constituted by oxide-based resistive random access memory (OxRAM) devices, which play the analog synaptic role. The different modules display a topographical organization according to the input dataset features they have been trained with and are organized following a hierarchical system. The system exhibits conceptual associative behavior between inputs with clustering capabilities, able to classify inputs which have never been seen before by the system, according to their similarity with the ones it has been trained with. Full article
(This article belongs to the Special Issue Memristor Device and Memristive System)
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