The accurate small-signal modeling method of DCM-operated direct-duty-ratio (DDR) or voltage-mode (VM) controlled converters was establish in the late 1990s in [
24,
25] and later elaborated in a more convenient form in [
16]. It is claimed in [
26] that the small-signal models in [
25] are not accurate enough, but the paper does not explicitly provide the required correction elements to improve the model accuracy. The small-signal models in [
24,
25] are load-resistor affected, which will hide the unterminated dynamic behavior of the converter, especially, at the low frequencies as well as which affects also the location of the low-frequency system poles [
17]. Therefore, we will apply the methods presented in [
16] for obtaining the small-signal DDR state space with the parasitic circuit elements included, which is utilized also in the corresponding PCM modeling.
Figure 1, in
Section 1, proves explicitly that the method described in [
16] produces highly accurate unterminated small-signal models, when all the parasitic elements are included in the model. The duty ratio is generated in a DRR-controlled converter by means of a fixed pulse-width-modulator (PWM) ramp signal. In a PCM-controlled converter, the duty ratio is generated by means of the up slope of the instantaneous inductor current. As a consequence of this, the small-signal state space of a PCM-controlled converter can be found by developing proper duty-ratio constraints of the form [
4,
10,
14]:
where
denotes duty-ratio gain,
the control variable (i.e., control current (
)), and
the feedback or feedforward gain related to variable
, which can be either a state, or input variable of the converter as well as
the number of input and state variables [
4]. The modeling is finalized by replacing the perturbed duty ratio (
) by (1) in the linearized state space of the corresponding DDR-controlled converter [
4,
10,
14]. The hat over the variables in (1) indicates that the corresponding variables are small-signal variables. This notation method is applied in rest of the paper.
2.1. Generalized Duty-Ratio Constrains in DCM
Figure 2 shows the inductor-current waveforms, the control current (
), and the inductor-current compensating ramp (
) during one switching cycle in DCM under dynamic conditions. According to [
16], the real state variables, which will produce the dynamic behavior of the converter up to half the switching frequency, are the time-averaged values of the instantaneous variables (i.e., inductor currents and capacitor voltages), where the averaging is performed within one cycle. The time-averaged variables are denoted in this paper by
.
Figure 2 shows that at the time instant
) the variables in
Figure 2 are linked together by:
which is known as the comparator equation, because the associated PWM comparator will change state, when the condition determined by (2) is valid [
13]. The only unspecified variable in (2) is
(cf.
Figure 2), which can be solved by applying the definition of the time-averaged inductor current (i.e.,
) at
:
where
can be solved based on the inductor-current waveforms in
Figure 2 as
[
10]. Thus
can be given by:
and the corresponding comparator equation in (2) by:
where
and
denote the absolute values of the up and down slopes of the inductor current as denoted in
Figure 2.
The coefficients in the small-signal duty ratio constraints in (1) can be found by substituting the up and down slope of the inductor current with their topology-based values in (5) as well as linearizing (5) at a certain operating point. The linearization requires to applying the partial-derivative-based method due to the highly nonlinear nature of the comparator equation in (5) for obtaining the required coefficients in (1) (cf. pp. 60, 61, [
14]). Thus the duty-ratio gain (
) can be given in a generalized form (Note: In this case, only the duty ratio (
) is a variable, and all the other variables are constant) by:
which indicates that
Fm becomes infinite, when the duty ratio (
D) equals:
Equation (7) defines the mode limit for the converter operation at the switching frequency, where the first term denotes actually the mode limit between the DCM and CCM operation [
14], because the only operational condition in DCM, where
equals zero, is the boundary between DCM and CCM (i.e., the boundary conduction mode (BCM) [
11]). It equals symbolically the same value, which defines the mode limit at
in the PCM-controlled converter in CCM, when
Mc = 0 [
4].
Figure 3 shows the inductor-current waveforms, when the converter is driven into the harmonic modes of operation. The figure shows definitively that the buck converter can adopt both even and odd harmonic modes as discussed also in [
10]. The reason for the existence of the odd harmonics is actually the existence of an RHP pole in the converter open-loop dynamics. In case of CCM operation, only the even harmonic modes are possible as explained in detail in [
4]. In DCM operation, the mode-limit duty ratio does not either equal the average duty ratio of the harmonic operation as it does in CCM operation [
4].
Equation (5) can be developed in terms of duty ratio (
) for a second-order converter with
as [
13]:
where
. According to (8), we can compute that
will be limited to:
at the duty ratio of:
which equals
D in (7) (i.e., the first term). At the higher duty ratios, Equation (8) does not have any more real-valued solutions indicating that the converter enters into harmonic operation mode as shown in
Figure 3.
The steady-state comparator equation in (8) can be developed further in terms of the input-to-output gain (
) (i.e.,
), and
(i.e.,
and
). It should be observed that
and
denote the inductor current up and down slopes as absolute values, and they have to be expressed as a function of
according to the behavior of the corresponding converter. In addition, the duty ratio (
) has to be replaced by the converter specific formula, which can be given for the buck converter as
[
11]. These procedures yield for the buck converter as:
Equation (11) can be further developed as:
which indicates that there exists a double root at
in (11), which means that there are no real-valued solutions for
in open loop, as discussed also in [
11,
12] as well as explicitly demonstrated in [
21]. It is explicitly proved in [
10] that the mode limit at
does not exist, when the output-voltage feedback loop is closed. The dynamic analysis will reveal that the mode limit at
produces an RHP pole (i.e., the converter is unstable), which does not take place in the CCM converter. Therefore, the output-voltage feedback can remove the RHP pole when its control bandwidth is higher than the RHP pole. The boost and buck-boost converters do not have similar anomalies as the buck converter has in the open-loop behavior as discussed also in [
11]. Equation (11) is actually load-resistor affected, and therefore, it does not correctly predict the location of the actual RHP pole in a buck converter as will be shown later in
Section 2.3.
2.3. Small-Signal Models of PCM-Controlled Buck Converter in DCM
The power stage of the PCM-controlled buck converter including the resistive load and the values of components are given in
Figure 5, where the power stage equals the power stage in
Figure 4. The generalized comparator equation for the second-order converters has been given earlier in (5), and the inductor-current up and down slopes, which are valid for a buck converter, are given explicitly in (18). According to (5) and (18), the corresponding unterminated duty-ratio constraints can be computed to be as given in (19) and in (20), respectively:
where:
In Equation (20),
and
are defined in (17), and
denotes the inductor-current compensation ramp in A/s. As discussed in the beginning of this section, the PCM state space can be obtained from the DDR state space in (15) by replacing the perturbed duty ratio by (19). As an outcome of this process, the small-signal state space valid for a PCM-controlled buck converter operating in DCM can be given by:
where
A1−4 and
B1 are defined explicitly in (16) and
Ve, and
Ie in (17) as well as
Fm,
q1,
qc,
qin and
q0 in (20), respectively.
The transfer functions representing the dynamics of the converter can be solved by applying proper software packages such as, for example, MatlabTM Symbolic Toolbox. The symbolic-form transfer functions representing the input-side dynamics (i.e., the control-to-input-current transfer function, the output-current-to-input-current transfer function, and the input impedance) are very long, and thus only the transfer functions representing the output-side dynamics (i.e., the control-to-output-voltage transfer function (), audiosusceptibility (), and output impedance ()) are given explicitly in this paper in (22).
Usually, the DCM state spaces are given omitting all the parasitic circuit elements as a function of
and
(cf. pp. 222–224, [
14]). We will show later in
Section 3 that the simplified transfer functions do not represent correctly the dynamic behavior of the buck converter analyzed in this paper, and therefore, they are not given here. We will use the simplified transfer functions, however, in certain cases for providing better physical insight into the converter dynamics, when performing approximate analyses.
The three transfer functions comprising the output dynamics of the PCM-controlled buck converter in DCM are given in (22). The unterminated denominator (
) of the transfer functions is given in (23). The load-resistor-affected denominator is given in (24):
where the unterminated denominator
equals:
As discussed in [
11], the PCM-controlled converters are highly damped converters, which means that the poles of the system are highly separated (i.e., the low-frequency pole (
) lies close to origin, and the high-frequency pole (
) lies close to infinity). Thus the poles can be approximated from (22) with quite high accuracy by utilizing the properties of a second-order polynomial, and the high separation of the poles, which yield (Note: the last simplified terms in (24) are computed assuming
):
where
and
as well as
and
(cf. p. 164, [
14]).
Equation (24) shows explicitly that becomes an RHP pole, when (i.e., the minus sign becomes a plus sign), and it moves into higher frequencies in RHP, when and increases. stays always as a left-half-plane (LHP) pole, because , and it moves towards infinity, when and increases.
The full-order load-resistor-affected denominator can be given according to (25) but it does not give enough information to understand the effect of the load resistor on the system poles:
Equation (26) is derived from (25) by omitting the parasitic circuit elements as well as by transforming it into a more customary form according to [
10]:
from which the simplified system poles can be solved at fully resistive load (i.e.,
) as:
Equation (27) shows that the load-resistor-affected low-frequency pole moves into RHP, when
, which complies with the instability condition predicted by Equation (12) in
Section 2.1. The high-frequency pole equals the high-frequency pole in (24) and stays an LHP pole.
The load-resistor-affected denominator of transfer functions derived from the equivalent circuit representing the dynamics of the buck converter in [
11] is explicitly given in [
10] as:
from which the system poles can be approximated to be as:
When studying carefully the system poles in (29) then it is obvious that the high-frequency pole becomes an RHP pole when
, and the low-frequency pole becomes an RHP pole when
M > 2/3. In practice, this means that the converter should be unstable under resistive load already when
M > 0.5 but the converter has not been observed to behave like that. This means that the modeling method introduced in [
11] does not provide correct second-order transfer functions.
The behavior of the system poles is presented in
Table 1 in case of the converter in
Figure 5, where the high separation of the poles is clearly visible. In addition, the table shows that the instability will take place already at the input voltage of 21.6 V, where
due to the contribution of the power-stage losses. The determining factor in the appearing of the open-loop instability is that the zeroth-order coefficients in (23) and (25) become negative, which indicates that one of the roots of (23) and (25) lies in RHP. This happens, because the feedback gain
(i.e., the output-capacitor-voltage feedback gain) (cf. Equation (20)) is negative. Actually, the missing of the negative sign of the first-order term indicates that the low-frequency pole is an RHP pole. It is obvious that the appearance of the instability can be controlled by the inductor-loop compensation (
), which will reduce
(cf. Equation (20)). This form of instability has not been reported earlier even if comprehensive analyses have been performed, for example, in [
12]. The reason for this is that the load resistor affects the location of the poles as is visible in the load-resistor-affected poles given in (27) as well as in
Table 1 (i.e., two right most columns) [
17]. The investigations of this paper show that the load-resistor-affected RHP pole appears in vicinity of
M = 2/3 as discussed in [
10,
11,
12,
13,
14] and derived explicitly in
Section 2.1 (Equation (12)) and in (27). The power-stage losses will shift the appearance of the instability into an operating point, where
M < 2/3 as clearly visible in
Table 1. The instability in vicinity of
is also clearly visible in
Figure 3 as the second-harmonic mode of operation.
The entries in
Table 1 are computed by using the complete models. The coarsely approximated load-resistor-affected system poles in (27) (i.e., the last terms) yield
and
at the input voltage of 20 V. The coarsely approximated unterminated system poles in (24) (i.e., the last terms) yield
and
. These figures indicate that the simplified models will not predict accurately the location of the system poles.
The input-to-output transfer function (
) (known also as audiosusceptibility in [
11]) in (22) can be nullified by providing
such that
. The approximate value of
can be computed to be:
which complies with the value given in [
12] (note: the definition of
in [
12] differs from the definition of
in this paper; when the difference is taken into account, the values are equal).
2.4. Generalized Small-Signal Transfer Functions Applicable for Buck, Boost, and Buck-Boost Conveters
The set of PCM transfer functions, which are valid for the buck, boost, and buck-boost converters, can be developed in a generalized form from the block diagrams presented in
Figure 6 based on the generalized duty-ratio constraints in (31). In
Figure 5, the transfer functions denoted by the superscript ‘DDR’ corresponds to the set of transfer functions of the corresponding DDR-controlled converter. The coefficients of (31) do not equal exactly the coefficients given in (20), because the output voltage is used as such in computing the inductor-current slopes as
Figure 6 explicitly implies. The coefficient
denotes a series resonant circuit, which is placed in the inductor-current feedback loop, for correcting the high-frequency phase behavior of the transfer functions (cf. [
4]).
is given in (32), where
and
in case of buck converter. The series-resonant circuit in (32) differs significantly from the series-resonant circuit utilized in [
4], where
and
. The validity of the proposed
in case of PCM-controlled DCM buck converter is discussed in more detail in
Section 3.
The general set of transfer functions, which is valid for the buck, boost, and buck-boost converters, can be given as shown in (33) (the output dynamics) and (34) (the input dynamics), respectively:
where
and
denote the inductor-current and output-voltage loop gains (i.e.,
and
denote the control-to-inductor-current and control-to-output-voltage transfer functions of the DDR-controlled converter) given in (35):
and
denotes the impedance of the output capacitor, as well as
,
, and C = 0 for a buck converter, and A, B, and C are defined in (36) for boost and buck-boost converters, respectively:
The duty-ratio constrains applicable for (32) and (33) can be obtained from (19) by setting
as:
as well as
and
for computing
in (33) can be given for a buck converter as:
where the coefficients
are given in (16) and
in (17), respectively.