Sector Subdivision Based SVPWM Strategy of Neutral-Point-Clamped Three-Level Inverter for Current Ripple Reduction

Abstract

This paper presents a sector subdivision based space vector pulse width modulation (SVPWM) strategy with reduced current ripple for a three-level inverter. Using the output current ripple theory, closed-form expressions of average current ripple vectors for both continuous and discontinuous switching sequences are derived. Based on the sector and triangle distributions of conventional SVPWM strategy, each triangle is further divided into three small-regions. Then the switching sequence with the lowest magnitude of the average current ripple vector is applied in every small-region, so that the advantages of continuous pulse width modulation (CPWM) and discontinuous pulse width modulation (DPWM) under different modulation index conditions are combined to reduce the current ripple in the whole modulation range. The output performance of the proposed strategy is compared with the conventional CPWM and DPWM strategy, and experimental results verify that the proposed strategy could reduce the current ripple of three-level inverters effectively.

1. Introduction

Three-level inverters are possible to generate five-level-step-shaped line to line voltage and three-level-step-shaped phase voltage. So the harmonics of the output voltage and current are reduced compared with conventional two-level inverters. Additionally, the emitter-collector voltage is only one half of that of conventional two-level inverters. Due to the low stress to switching devices, switching loss and switching noise are reduced [1,2,3]. The topology of three-level inverters can be divided into three categories: cascade H-bridge (CHB) [4], flying capacitor (FC) [5], and neutral-point-clamped (NPC) [6]. Among them, NPC three-level inverters are the most widely used in medium-voltage high-power industrial applications, such as traction drive, mine hoister, and wind power generation [7,8,9].

The research of three-level inverter has been focused on output current ripple reduction [10], neutral-point potential fluctuation restraint [8,11,12], common mode voltage reduction [13], switching loss suppression [14], and low switching frequency operation [15]. With these strategies, basic vectors used to synthesize the reference vector or dwell times of redundant switching states are changed to meet the requirement of a certain aspect of performance. When three-level inverters are applied in medium-voltage high-power motor drives, the output current ripple is increased because of the limitation of the switching frequency. Furthermore, with the increase of current harmonics and torque ripple, the additional loss and noise are introduced in both the inverter and the motor. As a result, how to evaluate and reduce the output current ripple of three-level inverters has been attracting attention from researchers all over the world.

In recent years, various evaluation methods, such as weighted total harmonic distortion (WTHD) [15,16], root-mean-square (RMS) value of stator flux ripple, [17], and magnitude of the average current ripple vector [10,18], are proposed to evaluate the output ripple of the three-level inverter. If WTHD is regarded as the evaluation indicator of the output current ripple, the expression of each harmonic needs to be obtain by using a double-fourier transform of the output voltage. Unfortunately, the computational process is very complicated. And in most cases, it is convenient to compare PWM strategies based on the overall quality of output waveform rather than the individual harmonic produced by them. Thus, the RMS value of stator flux ripple and the magnitude of the average current ripple vector could be adopted to evaluate the output current ripple. Compared with WTHD, the computational burdens are lower.

Based on the above evaluation methods, lots of modulation strategies are presented to reduce the output current ripple of three-level inverters [10,16,18], which can be divided into CPWM strategies and DPWM strategies. In reference [18], the magnitude of the average current ripple vector is used as the indicator, and the dwell times of the two redundant switching states in continuous switching sequences are redistributed to reduce the output current ripple. DPWM methods for three-level inverters are proposed in reference [16], and WTHD of the output voltage for both the CPWM and DPWM strategies are compared with each other. The concept of stator flux ripple is proposed in reference [17], and the closed-form expressions of stator flux ripple for different switching sequences are obtained, and then the output performance of different switching sequences are compared with each other.

According to the above modulation strategies, it can be concluded that the current ripple of CPWM strategies is lower than that of DPWM strategies under a lower modulation index condition, while the conclusion is reversed under a higher modulation index condition. Thus, CPWM and DPWM strategies are both adopted in this paper. The closed-form expressions of the average current ripple vector for both the continuous and discontinuous switching sequences are derived. The sub-regions of different switching sequences are determined on the basis of the minimum value of magnitude of the average current ripple vector. Then a sector subdivision based SVPWM strategy with a reduced current ripple can be obtained.

2. Analysis of Switching Sequence in Space Vector Modulation Strategies

The topology of the NPC three-level inverter is shown in Figure 1a. Each of three phases (A, B, and C) has three switching states (P, O, and N), so there are 3³ = 27 switching state combinations for the three-level inverter. According to Park transformation in Equation (1), each combination can be represented by a basic space voltage vector V_j, j = 0, 1, 2, …, 18, as shown in Figure 1b.

$${\mathit{V}}_j=V_{\mathrm{dc}}/3\cdot [(S_{\mathrm{A}1}-S_{\mathrm{A}4}){\mathrm{e}}^{\mathrm{j}0}+(S_{\mathrm{B}1}-S_{\mathrm{B}4}){\mathrm{e}}^{\mathrm{j}\frac{2\mathsf{\pi }}{3}}+(S_{\mathrm{C}1}-S_{\mathrm{C}4}){\mathrm{e}}^{\mathrm{j}\frac{4\mathsf{\pi }}{3}}]$$

(1)

Based on the vector’s magnitude, 19 basic vectors can be divided into four categories, which are zero-voltage, small-voltage, medium-voltage and large-voltage. Zero vector V₀ corresponds to three combinations, and each of small vectors V₇ ~ V₁₂ corresponds to two combinations. Different switching state combinations corresponding to the same voltage vector are defied as redundant switching states in this paper. The space vector hexagon could be symmetrically divided into six sectors Z₁ ~ Z₆, and every sector could be further divided into four triangles ① to ④.

The nearest three vectors are usually adopted to synthesize the reference voltage vector V_ref in three-level space vector PWM strategies. The dwell time of each vector can be solved by the principle of voltage-second balance. For example, when V_ref locates in triangle ③ of sector Z₁, yields

$$\{\begin{array}{l}{\mathit{V}}_{\mathrm{ref}}{T}_{\mathrm{s}}={\mathit{V}}_7{T}_1+{\mathit{V}}_1{T}_2+{\mathit{V}}_{13}{T}_0\\ T_{\mathrm{s}}=T_1+T_2+T_0\end{array}$$

(2)

where T₁, T₂, and T₀ represent the dwell times of basic vector V₇, V₁, and V₁₃ in each sample period T_s, respectively. The reference voltage vector V_ref can be synthesized by using various switching sequences. That is because each switching state can be arranged at any arbitrary time interval of each sample period and there are redundant switching states for basic voltage vectors V₀ and V₇ ~ V₁₂.

All the possible switching sequences synthesized the reference voltage vector V_ref in triangle ①–④ of sector Z₁ are shown in Figure 2. The conditions that keep the switching loss as low as possible are listed as follows [17]:

• The switching exists in at most one phase leg during each state transition.
• The total number of switching sequences in each sample period must be less or equal to three.

Based on the number of switching in each sample period, the switching sequences can be categorized into continuous switching sequences (Sequence 11, 12, 13, 21, 22, 31, and 41) and discontinuous switching sequences (Sequence 14, 15, 16, 23, 24, 25, 32, 33, 42, and 43). For discontinuous switching sequences, the switching only appears in two phase legs. Meanwhile for continuous switching sequences, the switching appears in all the three phase legs.

The switching sequences of space vector PWM strategies must be arranged symmetrically on both sides so that the switching sequence in a certain sample period is reversed in the next sample period. For example, if the switching sequence in one sample period is POO→PON→PNN→ONN, the sequence in the next sample period will be ONN→PNN→PON→POO, as shown in Figure 3b.

Different arrangements of the switching sequence will inherently offer different behavior with regard to the performance indicators that can be used to assess the quality of the output waveform. Output current ripple of three-level inverters is used as the evaluation indicator and is analyzed in the next section.

3. Analysis of the Output Current Ripple

At any arbitrary instant in each sample period, there is always an error between the applied voltage and the reference voltage vector according to the principle of space vector PWM. The vector difference between V_j and V_ref is defined as the voltage ripple vector V_j,err. As shown in Figure 3a, when V_ref is located in triangle ③ of sector Z₁, voltage ripple vectors corresponding to V₇, V₁, and V₁₃ are V_7,err, V_1,err, and V_13,err, respectively.

When the motor is driven by the voltage source inverter and the stator and rotor resistances are neglected, the voltage ripple vector V_j,err will generate the current ripple vector i_j,err in the motor. The relationship of voltage and current ripple vectors in each T_s can be indicated as follows

$${\mathit{V}}_{j,\mathrm{err}}=L_{\mathsf{\sigma }}\frac{\mathrm{d}{\mathit{i}}_{j,\mathrm{err}}}{\mathrm{d}t}$$

(3)

where L_σ is the equivalent inductance of the motor. Take Sequence 31 as an example, as shown in Figure 3a, when t ∈ [0, T₁/2], the switching state POO is applied, the start point of i_7,err is at t₀. The direction of current ripple vector i_j,err lag the direction of voltage ripple vector V_j,err by π/2 so that the end point of i_7,err travels from t₀ to t₁. When t = T₁/2, |i_7,err| equals to |V_7,err·T₁/2L_σ|. Similarly, the amplitude of current ripple vector are |V_13,err·T₀/L_σ|, |V_1,err·T₂/L_σ|, and |V_7,err·T₁/2L_σ| when the switching state PON, PNN, and ONN are applied alternatively. The instants t₀~t₈ shown in Figure 3a are corresponding to the instants shown in Figure 3b. The trajectory of i_j,err during (0, T_s] is triangle t₁–t₂–t₃–t₁. And the trajectory during (T_s, 2T_s] is triangle t₅–t₆–t₇–t₅. The lengths of three sides are V_7,err·T₁/L_σ, V_1,err·T₂/L_σ, and V_13,err·T₀/L_σ, respectively.

The average current ripple vector in sample period (0, T_s] and (T_s, 2T_s] are defined as follows

$${\mathit{i}}_{\mathrm{av}1}=\frac{1}{T_{\mathrm{s}}}{\displaystyle \underset{0}{\overset{T_{\mathrm{s}}}{\int }}{\mathit{i}}_{j,\mathrm{err}}\mathrm{d}t}, {\mathit{i}}_{\mathrm{av}2}=\frac{1}{T_{\mathrm{s}}}{\displaystyle \underset{T_{\mathrm{s}}}{\overset{2T_{\mathrm{s}}}{\int }}{\mathit{i}}_{j,\mathrm{err}}\mathrm{d}t}$$

(4)

As shown in Figure 3c, the shapes of triangle t₁–t₂–t₃–t₁ and t₅–t₆–t₇–t₅ are the same and are symmetrical about the origin. So i_av1 and i_av2 are equal in magnitude but opposite in direction. The conclusions derived in reference [18] are as follows:

Conclusion 1.

The terminal of the average current ripple vector is the mass center of the current ripple triangle.

In Figure 3b, point G and G′ are the mass center of triangle t₁–t₂–t₃–t₁ and t₅–t₆–t₇–t₅, respectively. So the terminals of i_av1 and i_av2 are point G and G′. The square RMS value of the output current ripple is normally introduced to estimate the performance of the inverter, which is defined as follows

$$I_{\mathrm{rip}\_\mathrm{rms}}^2=\frac{1}{T_{\mathrm{s}}}{\displaystyle \underset{0}{\overset{T_{\mathrm{s}}}{\int }}{\left|{\mathit{i}}_{j,\mathrm{err}}\right|}^2\mathrm{d}t}$$

(5)

In sample period (0, T_s], the current ripple vector can be divided into two parts

$${\mathit{i}}_{j,\mathrm{err}}={\mathit{i}}_{\mathrm{av}1}+{\mathit{i}}_j^{\prime }$$

(6)

where auxiliary vector is the vector error between the current ripple vector i_j,err and the average current ripple vector i_av1. In time interval (0, T_s], averaging Equation (6), yields

$$\frac{1}{T_{\mathrm{s}}}{\displaystyle \underset{0}{\overset{T_{\mathrm{s}}}{\int }}{\mathit{i}}_j^{\prime }\mathrm{d}t}=0$$

(7)

Substituting Equations (6) and (7) into Equation (5), yields

$$I_{\mathrm{rip}\_\mathrm{rms}}^2={\left|{\mathit{i}}_{\mathrm{av}1}\right|}^2+\frac{1}{T_{\mathrm{s}}}{\displaystyle \underset{0}{\overset{T_{\mathrm{s}}}{\int }}{\left|{\mathit{i}}_j^{\prime }\right|}^2\mathrm{d}t}$$

(8)

The trajectories of current ripple vector during (0, 2T_s] corresponding to Sequence 31, 32, and 33 are shown in Figure 3c. As can be seen, for different switching sequences, the relative positions of the mass center and the origin are different from each other, which means magnitudes of the average current ripple vectors are different. While shapes of current ripple triangles are the same. So the second item in the right side of Equation (8) is not changed. Then the following conclusion can be drawn:

Conclusion 2.

The value of I_{rip_rms} is determined by the value of |i_av1|². So the lower the value of |i_av1|² is, the better the output performance is.

4. The Expression of the Magnitude of the Average Current Ripple Vector

According to Conclusion 1 and Conclusion 2, the comparison of output performance for all the possible switching sequences can be replaced by the comparison of the distance between the mass center of current ripple triangle and the origin.

The modulation index m is defined as

$$m=\sqrt{3}{V}_{\mathrm{ref}}/V_{\mathrm{dc}}$$

(9)

where V_ref is the amplitude of reference voltage vector, V_dc is the amplitude of dc-link voltage. As shown in Figure 3, the magnitudes of voltage ripple vector V_7,err, V_1,err, and V_13,err can be derived as follows

$$\{\begin{array}{l}{V}_{7,\mathrm{err}}=V_{\mathrm{dc}}\sqrt{(1+3m^2)-2\sqrt{3}m\cos \theta }/3\hfill \\ V_{1,\mathrm{err}}=V_{\mathrm{dc}}\sqrt{(4+3m^2)-4\sqrt{3}m\cos \theta }/3\hfill \\ V_{13,\mathrm{err}}=V_{\mathrm{dc}}\sqrt{3(1+m^2)-6m\cos (\mathsf{\pi }/6-\theta )}/3\hfill \end{array}$$

(10)

where θ is the reference vector angle. According to Equation (2), the dwell time T₁, T₂, and T₀ corresponding to V₇, V₁, and V₁₃ during each sample period can be derived as follows

$$\{\begin{array}{l}{T}_1=2T_{\mathrm{s}}[1-m\sin (\mathsf{\pi }/3+\theta \left)\right]\hfill \\ T_2=T_{\mathrm{s}}[2m\sin (\mathsf{\pi }/3-\theta )-1]\hfill \\ T_0=2m{T}_{\mathrm{s}}\sin (\theta )\hfill \end{array}$$

(11)

Based on Equations (10) and (11), and the geometric relationship in Figure 3c, the closed-form expression of |i_av1| are listed in

Table 1. The expression of |i_av1| in Triangle ③ of Sector Z_1.

Sequence	$\left|{\mathit{i}}_{\mathit{av}1}\right|$	γi, (i = 1, 2, 3)
31	$\sqrt{{[V_{7,\mathrm{err}}{T}_1\cos ({\gamma }_1)/2-V_{1,\mathrm{err}}{T}_2\cos ({\gamma }_2\left)\right]}^2+{[V_{7,\mathrm{err}}{T}_1\sin ({\gamma }_1)/2+V_{1,\mathrm{err}}{T}_2\sin ({\gamma }_2\left)\right]}^2}/3L_{\mathsf{\sigma }}$	${\gamma }_1=\arccos \frac{V_{7,\mathrm{err}}^2+V_{\mathrm{dc}}^2/9-V_{1,\mathrm{err}}^2}{2V_{\mathrm{dc}}{V}_{7,\mathrm{err}}/3}$
32	$\sqrt{{\left[V_{7,\mathrm{err}}{T}_1\cos ({\gamma }_1\right)+V_{1,\mathrm{err}}{T}_2\cos ({\gamma }_2\left)\right]}^2+{[-V_{7,\mathrm{err}}{T}_1\sin ({\gamma }_1)+V_{1,\mathrm{err}}{T}_2\sin ({\gamma }_2\left)\right]}^2}/3L_{\mathsf{\sigma }}$	${\gamma }_2=\arccos \frac{V_{1,\mathrm{err}}^2+V_{\mathrm{dc}}^2/9-V_{7,\mathrm{err}}^2}{2V_{\mathrm{dc}}{V}_{1,\mathrm{err}}/3}$
33	$\sqrt{{\left[V_{7,\mathrm{err}}{T}_1\cos ({\gamma }_1\right)+V_{13,\mathrm{err}}{T}_0\sin ({\gamma }_3\left)\right]}^2+{\left[V_{7,\mathrm{err}}{T}_1\sin ({\gamma }_1\right)+V_{13,\mathrm{err}}{T}_0\cos ({\gamma }_3\left)\right]}^2}/3L_{\mathsf{\sigma }}$	${\gamma }_3=\frac{\mathsf{\pi }}{6}-\arccos \frac{V_{13,\mathrm{err}}^2+V_{\mathrm{dc}}^2/9-V_{1,\mathrm{err}}^2}{2V_{\mathrm{dc}}{V}_{13,\mathrm{err}}/3}$

.

Similarly, the expressions of other switching sequences in Figure 2 also can be derived out. According to Equations (10) and (11), and Table 1, it can be concluded that expressions of the magnitude of the average current ripple vector are functions of variable V_dc, T_s, L_σ, m and θ. By developing expressions in Table 1, it can be deduced that V_dcT_s/L_σ is the common item so that expressions can be considered as a function of m and θ (The detailed derivation process of |i_av1| is presented in Appendix A).

Let x and y to be m·cosθ and m·sinθ, respectively. The magnitude of the average current ripple vector |i_av1| of sector Z₁ in x-y rectangle coordinate system and the contour lines of |i_av1| in x-y plane corresponding to Sequence 31–33 are shown in Figure 4. From Figure 4, variation trends of |i_av1| corresponding to different sequences are not the same. If the switching sequence with the lowest |i_av1| is adopted at any arbitrary position, the output current ripple of the inverter will be minimized.

5. The Proposed Sector Subdivision Based SVPWM

5.1. The Boundaries of Different Switching Sequences

In order to obtain the boundary of the active area for Sequence 31 and 32, the intersection |i_av1|(sequence 31) = |i_av1|(sequence 32) need to be solved and the result is curve g in Figure 5c. Similarly, curve h is the intersection of |i_av1|(sequence 31) = |i_av1|(sequence 33) and curve l is the intersection of |i_av1|(sequence 32) = |i_av1|(sequence 33). When V_ref is located in small triangle ①, ②, or ④, expressions of |i_av1| can be derived out and the intersections can also be solved in the same manner. The distribution of sub-region for each switching sequence in small triangle ①–④ corresponding to the minimum value of |i_av1| are shown in Figure 5a–d, respectively.

Each triangle is subdivided into three small-regions. In Figure 5a–d, the curve a–q are the boundaries of each sub-region. Equations of the boundaries can be solved off-line by the expressions of |i_av1| of the two adjacent sub-regions. Omitting the tedious derivation process, the equation of a–q in x-y rectangle coordinate system are listed in Appendix B. Furthermore, the equations in Equation (A5) are independent of motor parameters, fundamental frequency, and dc bus voltage.

5.2. The Proposed Sector Subdivision Based SVPWM Strategy

According to Figure 5a–d, the sub-region of each switching sequence in the whole space vector diagram is shown in Figure 6. The sub-regions are different because the types of switching sequences (continuous and discontinuous) adopted in each triangle are different.

Generally, the determination process of sub-regions for different switching sequences in sector Z₁ are taken as an example. The flowchart to find out the spatial region and switching sequence are shown in Figure 7.

Based on the sub-region and switching sequence distributions in Figure 6, a sector subdivision based SVPWM strategy combined of both continuous and discontinuous switching sequences can be presented to improve the output current performance. It is worth to be mentioned that the switching sequences adopted in the proposed strategy are all selected from Figure 2. And the switching sequence adopted in a certain sample period will be reversed in the next sample period so that the strategy is arranged symmetrically on both sides.

6. Experimental Verification

The proposed strategy, CPWM [19] and DPWM3 (with the lowest distortion among DPWM0–DPWM3) [20] are tested on the experimental prototype of three-level inverter fed induction motor shown in Figure 8. Parameters of the experimental prototype are listed in

Table 2. Parameters of the experimental prototype.

Parameter	Unit	Value
dc-link voltage Vdc	V	540
dc-link capacitor C1,C2	μF	1000
switching frequency fsw	kHz	2
Rated power PN	kw	7.4
Rated current IN	A	14
Rated speed nr	r/m	1450
Stator resistance Rs	Ω	2.81
stator leakage inductance Lσs	mH	11.6
rotor resistance Rr	Ω	2.79
rotor leakage inductance Lσr	mH	11.6
magnetizing inductance Lm	H	0.34

. The induction motor is driven with a constant V/f control.

6.1. The Proposed Sector Subdivision Based SVPWM Strategy

Instead of total harmonic distortion (THD), total demand distortion (TDD) is usually used as the output performance indicator of the inverter in a wide range of modulation index m [21], which is defined as follows

$$I_{\mathrm{TDD}}=\frac{\sqrt{{\displaystyle \sum _{h=2}^{\infty }{I}_h^2}}}{I_{\mathrm{N}}}$$

(12)

where I_h is the hth component of the output current and I_N is the rated current. I_h and I_N are both RMS values.

Experimental waveforms of output voltage v_AO and v_AB, output current i_A for CPWM, DPWM3, and the proposed strategy under conditions of m = 0.2 and m = 0.9 are presented in Figure 9 and Figure 10, respectively. From Figure 9 and Figure 10, I_TDD of the proposed strategy is lower than that of CPWM and DPWM3.

According to experimental results, the fast fourier transformation (FFT) analysis tool in Matlab is used to calculate the I_TDD and V_WTHD under different modulation index conditions. Then variations of I_TDD and V_WTHD with the change of modulation index m for CPWM, DPWM3, and the proposed strategy can be obtained, which is illustrated in Figure 11a,b.

The weighted total harmonic distortion of output voltage V_WTHD is defined as

$$V_{\mathrm{WTHD}}=\frac{\sqrt{{{\displaystyle \sum _{h=2}^{\infty }\left(V_h/h\right)}}^2}}{V_1}$$

(13)

where V₁ and V_h are the rms value of fundamental and hth component of output voltage.

As shown in Figure 11a, for the modulation index m < 0.38 and m ≥ 0.8, I_TDD of the proposed strategy is lower than that of CPWM and DPWM3. For the modulation index 0.38 ≤ m < 0.8, output waveform quality of the proposed strategy and CPWM are the same, which is still better than that of DPWM3. The same conclusion can be obtained from Figure 11b. The percentage improvement of proposed strategy versus CPWM and DPWM3 is shown in Figure 12.

At the rated frequency (modulation index m = 1), I_TDD of the proposed strategy drops 33% and 3.5%, respectively, compared with CPWM and DPWM3. Thus, the output waveform quality of the proposed strategy is improved.

It is worth mentioning that the output waveform quality is also affected by the low frequency ripple in the neutral-point potential, as can be seen in Figure 9 and Figure 10. The dependence of neutral-point potential ripple v_C1-v_C2 on m and power factor angle φ for CPWM, DPWM3, and the proposed strategy can be calculated according to reference [22], as shown in Figure 13. The neutral-point potential ripple v_C1-v_C2 for CPWM, DPWM3, and the proposed strategy are approximately the same, so their effect on the output current ripple are the same, too.

6.2. Comparison of Power Losses

The switching losses of CPWM, DPWM3 and proposed strategy are calculated according to the method in reference [23], and the dependence of switching loss on m and power factor angle φ are shown in Figure 14.

As can be seen, when the power factor is close to 1, the switching loss of proposed strategy is lower than CPWM and a little bit higher than DPWM3. However in other cases, the switching losses of these three strategies are approximately the same.

6.3. Comparison with Neutral Point Balancing Strategies

The dependence of I_TDD and V_WTHD on modulation index m for CPWM with a neutral-point balancing control [8], a virtual SVPWM (VSVPWM) [11], a hybrid strategy of these two methods [12] and the proposed method are shown in Figure 15. As can be seen, when the modulation index m > 0.1, I_TDD and V_WTHD of the proposed strategy is lower than the other three strategies. It can be concluded that the output performance of the proposed method is better than usual-adopted SVPWM with neutral-point potential balancing strategy and VSVPWM.

7. Conclusions

A sector subdivision based modulation strategy combined with continuous and discontinuous switching sequences has been presented to promote the output performance of three-level inverters. The magnitude of the average current ripple vector was introduced as the performance indicator of the output current ripple. Then the optimal distribution of switching sequences has been derived. Compared with CPWM and DPWM3, the output current ripple of the proposed strategy was reduced. It can be concluded that the output current ripple are reduced significantly under the condition of m < 0.38 and m ≥ 0.8. At the rated frequency, I_TDD of the proposed strategy drops by 33% and 3.5%, respectively, compared with CPWM and DPWM3. The power loss of the proposed strategy was medium among those three strategies. Additionally, compared with neutral-point balancing strategies, the improvement of the output waveform quality was also significant.