Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System

Round 1

Reviewer 1 Report

The article describes the design, development and evaluation of an FPGA-based multilevel inverter. The article can be followed easily and it is in general well-structured, but there are several issues that need to be fixed.

(1) Language is fine in general, but English should be revised to correct certain errors/typos (e.g., page 1: "the performances",  page 2: "Jamaludin et al proposes…").

(2) There are several references that do not include brackets (e.g., "1" and "5" in page 1, "2" in page 6, "26" in page 7).

(3) It is not clearly stated why an FPGA is the best embedded device to implement a multilevel inverter. For instance, Why is it better to use an FPGA than a CPLD?

(4) When FPGAs are compared with DSPs, it is not mentioned the fact that software development is (in general) much more faster with DSPs than with FPGAs, especially when using VHDL or Verilog instead of other design tools (e.g., Xilinx System Generator). Please, try to provide a fairer comparison.

(5) It is not clearly stated why a high-performance device like an FPGA is actually needed for implementing the CHBMI.

(6) It is not clear the novelty of the implementation, since there is actually not a State of the Art Section where other similar commercial or academic solutions are described. The results should also be compared with other implementations in order to emphasize the  advantages of the proposed solution.

(7) Figures 1, 7a, 7b, 7 (please, note that there are two Figures 7) or 8 have low-quality, it can barely be read the text... Please provide clearer figures.

(8) In Figure 8, please indicate the name of the different test bench components.

Author Response

We thank the Reviewers for the interest in our work and for the helpful comments that will certainly improve our paper. We have reviewed the manuscript in order to satisfy as much as possible the general and specific indications written by all the Reviewers. The related answers are reported here below and all the modified sentences are highlighted in the manuscript in yellow color.

Review 1

The article describes the design, development and evaluation of an FPGA-based multilevel inverter. The article can be followed easily and it is in general well-structured, but there are several issues that need to be fixed.

Reply: First of all, we want to thank the reviewer for his time devoted to the study of this paper. The words of the reviewer are the best reward for our work that lasted months.

General remarks:

(1) Language is fine in general, but English should be revised to correct certain errors/typos (e.g., page 1: "the performances",  page 2: "Jamaludin et al proposes…")..

Reply: Dear Reviewer, we have carefully rechecked the use of English in order to reduce as much as possible the related grammar misspellings or sentence errors. All the modified sentences are highlighted in yellow color.

(2) There are several references that do not include brackets (e.g., "1" and "5" in page 1, "2" in page 6, "26" in page 7).

Reply: Dear Reviewer, in the new version of the paper we have included the brackets to all the references. All the due corrections are highlighted in yellow color.  

(3) It is not clearly stated why an FPGA is the best embedded device to implement a multilevel inverter. For instance, Why is it better to use an FPGA than a CPLD?

Reply: Dear Reviewer, the FPGA and CPLD solutions can be comparable in terms of performances, such as speed of execution, number of digital Inputs/Outputs, flexibility of use and software for the development of the related programming. The difference is mainly focused on their costs and on the number of available logic gates. Specifically, in our case, the choice of a programmable device based on the gate-array technology is derived from the adoption of an FPGA-based prototype of control board, which was developed over the last years through the collaboration with the University of L’Aquila. This control board is composed by a Cyclone III FPGA (ALTERA Corporation) and by conditioning circuits for the signal acquisition (400 V and 20°). We have added in the text new sentences and references in order to strengthen this aspect in our work. All the new parts are highlighted in yellow color.

 (4) When FPGAs are compared with DSPs, it is not mentioned the fact that software development is (in general) much more faster with DSPs than with FPGAs, especially when using VHDL or Verilog instead of other design tools (e.g., Xilinx System Generator). Please, try to provide a fairer comparison.

Reply: Dear Reviewer, your comment is correct. We have mentioned this aspect in the introduction, trying to provide a fairer comparison and adding two more references. More in detail, the following sentence has been added:”It can be stated that the adoption of a DSP could generally provide a much more faster software development with respect to a FPGA…..”.

 (5) It is not clearly stated why a high-performance device like an FPGA is actually needed for implementing the CHBMI.

Reply: Dear Reviewer, the low-level programming certainly presents a higher complexity. However, its high-flexibility is a very important advantage capable of compensating the first aspect. In fact, it is very challenging to implement the modulation techniques by using the traditional formula for the evaluation of the duty cycle by means of the allowable hardware in a microcontroller. On the contrary, due to both its flexibility and high number of configurable digital outputs, the FPGA allows the construction of a hardware system adequately designed for the previously mentioned purpose. Moreover, the possibility of choice of the frequencies for the clock signals provides a higher accuracy in terms of design of the related algorithm. In this context, we have added new sentences in order to clarify this aspect. All the new parts are highlighted in yellow color.

 (6) It is not clear the novelty of the implementation, since there is actually not a State of the Art Section where other similar commercial or academic solutions are described. The results should also be compared with other implementations in order to emphasize the advantages of the proposed solution.

Reply: Dear Reviewer, according to your comment, we have modified the introduction in order to highlight as much as possible the purpose of our work, which mainly consists in the experimental investigation and comparison on the harmonic content of the voltage waveforms of a CHBMI with different modulation techniques by means of the ATHD parameter. At this moment, the literature does not present similar studies concerning this extended analysis and describing in such a detailed manner the low-level FPGA programming.

 (7) Figures 1, 7a, 7b, 7 (please, note that there are two Figures 7) or 8 have low-quality, it can barely be read the text... Please provide clearer figures.

Reply: Dear Reviewer, as requested, we have provided new figures 1, 7a and 7b in order to clearly read the text inside them. In addition, one of the two Figures 7 has been renamed in the new version of the paper in Fig. 8a.

 (8) In Figure 8, please indicate the name of the different test bench components.

Reply: Dear Reviewer, Figure 8, which corresponds to Fig. 8b in this new version of the article, has been adequately changed, so that all the components of the test bench can be clearly identified.

Reviewer 2 Report

This paper  makes an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performances of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and  experimental results. The control algorithms are implemented by means of the VHDL programming language and the output voltage waveforms. Simulation and experimental results are analyzed in detail. 

This paper is interesting, and the experimental results seem correct and reasonable. However, the recent results, e.g. Energy Conversion & Management, 2018, 156:416-426 and DOI: 10.1109/TII.2018.2884494, should be mentioned in the introduction. By the way, the language should be checked carefully. For example, in the Abstract, something is wrong with the sentence "The control algorithms are implemented by means of the VHDL programming language and the output voltage waveforms, obtained from the main PWM techniques, are compared in terms of THD%".

Author Response

We thank the Reviewers for the interest in our work and for the helpful comments that will certainly improve our paper. We have reviewed the manuscript in order to satisfy as much as possible the general and specific indications written by all the Reviewers. The related answers are reported here below and all the modified sentences are highlighted in the manuscript in yellow color.

Review 2

This paper  makes an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performances of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and  experimental results. The control algorithms are implemented by means of the VHDL programming language and the output voltage waveforms. Simulation and experimental results are analyzed in detail.

Reply: We want to thank the reviewer for his time devoted to the study of our work.

This paper is interesting, and the experimental results seem correct and reasonable. However, the recent results, e.g. Energy Conversion & Management, 2018, 156:416-426 and DOI: 10.1109/TII.2018.2884494, should be mentioned in the introduction. By the way, the language should be checked carefully. For example, in the Abstract, something is wrong with the sentence "The control algorithms are implemented by means of the VHDL programming language and the output voltage waveforms, obtained from the main PWM techniques, are compared in terms of THD%".

Reply: Dear Reviewer, thank you very much for your positive comment. We have modified the text in accordance to your suggestions. More in detail, we have added in the reference list and commented in the text the suggested articles. In addition, we have carefully rechecked the use of English in order to reduce as much as possible the related grammar misspellings or sentence errors. All the modified sentences are highlighted in yellow color.

Round 2

Reviewer 1 Report

The authors answered appropriately to almost all the previous comments. 

The only aspect that should be revised is related to comment (6): despite the two additional references provided, the state of the art is still very limited. Please, try to expand it with other related articles (e.g., on the application of FPGAs to high-speed control systems) to emphasize the novelty of your work. In addition, it is necessary to give not only a summary of the  previous works, but also to indicate what they lack that justifies your development.

Author Response

The only aspect that should be revised is related to comment (6): despite the two additional references provided, the state of the art is still very limited. Please, try to expand it with other related articles (e.g., on the application of FPGAs to high-speed control systems) to emphasize the novelty of your work. In addition, it is necessary to give not only a summary of the  previous works, but also to indicate what they lack that justifies your development..

Reply: Dear Reviewer, we have extended the part of our work related to the state-of-the-art concerning the application of FPGA for multilevel inverters, trying also to highlight the novelty of our work with respect to the drawbacks of the other papers proposed in the recent literature.  

In this context, we have added 16 more references, which have been critically discussed in the text.