A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression—Part II
Abstract
:1. Introduction
2. NPC Cells for USPWM
- Rule #1:
- To reduce the number of switches in NPC cell, both TPF and TNF are turned on in freewheeling mode, including in PF and NF modes.
- Rule #2:
- Additional switches are added and connected to the freewheeling branch so that point A or B is clamped to point O.
3. Inverter Topologies Based on the Indirect Connection of NPC Cell from USPWM
3.1. Indirect Connection NPC Cell Based on Two Topology Familes
3.2. M = 2, N = 2
3.3. M = 2, N = 3 or M = 3, N = 2
3.4. M = 3, N = 3
3.5. M = 3, N = 4 or M = 4, N = 3
3.6. M = 4, N = 4
4. Inverter Topologies Based on the Direct Connection NPC Cell from USPWM
4.1. Direct Connection NPC Cell Based on Two Topology Families
4.2. M = 2, N = 2
4.3. M = 2, N = 3 or M = 3, N = 2
4.4. M = 3, N = 3
4.5. M = 3, N = 4 or M = 4, N = 3
4.6. M = 4, N = 4
5. Two Types of NPC Cells and Reflected Topologies under DFUSPWM
5.1. Principle of Indirect Connection NPC Cell and Reflected Topologies under DFUSPWM
5.2. Principle of the Direct Connection NPC Cell and Reflected Topology under DFUSPWM
6. Simulation Results
6.1. H6 Topology Without/With Direct Connection NPC Cell under USPWM
6.2. H8 Topology Without/With Indirect Connection NPC Cell under DFUSPWM
7. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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(M, N) | X1 + X2 | Y1 + Y2 | Family With Extra Diode | Family Without Extra Diode | ||
---|---|---|---|---|---|---|
Without NPC Cell (Part I) | With NPC Cell (Part II) | Without NPC Cell (Part I) | With NPC Cell (Part II) | |||
(M = 2, N = 2) | 1 + 1 | 1 + 1 | R1, R3 | R1S1-1, R1S1-2, R3S1-1, R3S1-2 | R2 | R2S1 |
(M = 2, N = 3) or (M = 3, N = 2) | 1 + 2 | 1 + 1 | R4 | R4S1-1, R4S1-2, R4S1-3 | R5 | R5S1 |
1 + 1 | 1 + 2 | |||||
2 + 1 | 1 + 1 | |||||
1 + 1 | 2 + 1 | |||||
(M = 3, N = 3) | 2 + 1 | 2 + 1 | R6 | R6S1 | R7 | R7S1 |
1 + 2 | 1 + 2 | |||||
2 + 1 | 1 + 2 | R8 | R8S1-1, R8S1-2 | None available | None available | |
1 + 2 | 2 + 1 | |||||
(M = 3, N = 4) or (M = 4, N = 3) | 1 + 2 | 2 + 2 | R9 | R9S1-1, R9S1-2 | R10 | R10S1 |
2 + 2 | 1 + 2 | |||||
2 + 1 | 2 + 2 | |||||
2 + 2 | 2 + 1 | |||||
(M = 4, N = 4) | 2 + 2 | 2 + 2 | R11, R12 | R11S1-1, R11S1-2, R12S1-1, R12S1-2 | R13 | R13S1-1, R13S1-2 |
(M, N) | X1 + X2 | Y1 + Y2 | Family With Extra Diode | Family Without Extra Diode | ||
---|---|---|---|---|---|---|
Without NPC Cell (Part I) | With NPC Cell (Part II) | Without NPC Cell (Part I) | With NPC Cell (Part II) | |||
(M = 2, N = 2) | 1 + 1 | 1 + 1 | R1, R3 | R1S2, R3S2 | R2 | R2S2-1, R2S2-2 |
(M = 2, N = 3) or (M = 3, N = 2) | 1 + 2 | 1 + 1 | R4 | R4S2 | R5 | R5S2-1, R5S2-2 |
1 + 1 | 1 + 2 | |||||
2 + 1 | 1 + 1 | |||||
1 + 1 | 2 + 1 | |||||
(M = 3, N = 3) | 2 + 1 | 2 + 1 | R6 | R6S2 | R7 | R7S2-1, R7S2-2 |
1 + 2 | 1 + 2 | |||||
2 + 1 | 1 + 2 | R8 | R8S2 | None available | R8S2 | |
1 + 2 | 2 + 1 | |||||
(M = 3, N = 4) or (M = 4, N = 3) | 1 + 2 | 2 + 2 | R9 | R9S2 | R10 | R10S2 |
2 + 2 | 1 + 2 | |||||
2 + 1 | 2 + 2 | |||||
2 + 2 | 2 + 1 | |||||
(M = 4, N = 4) | 2 + 2 | 2 + 2 | R11, R12 | R11S2, R12S2 | R13 | R13S2 |
(M, N) | X1 + X2 | Y1 + Y2 | Family With Extra Diode | Family Without Extra Diode | ||
---|---|---|---|---|---|---|
Without NPC Cell | With NPC Cell | Without NPC Cell | With NPC Cell | |||
(M = 4, N = 4) | 2 + 2 | 2 + 2 | R11, R12 | R11S1, R12S1 | R13 | R13S1 |
(M, N) | X1 + X2 | Y1 + Y2 | Family with Extra Diode | Family Without Extra Diode | ||
---|---|---|---|---|---|---|
Without NPC Cell | With NPC Cell | Without NPC Cell | With NPC Cell | |||
(M = 4, N = 4) | 2 + 2 | 2 + 2 | R11, R12 | R11S2, R12S2 | R13 | R13S2 |
Topology Name | Number of Switches | Number of Diodes | Economic Cost | Topology Name | Number of Switches | Number of Diodes | Economic Cost |
---|---|---|---|---|---|---|---|
R1S1-1 | 7 | 2 | 7.6 | R10S1 | 8 | 3 | 8.9 |
R1S1-2 | 6 | 4 | 7.2 | R13S1-1 | 7 | 0 | 7 |
R3S1-1 | 6 | 4 | 7.2 | R13S1-2 | 6 | 2 | 6.6 |
R3S1-2 | 5 | 6 | 6.8 | R1S2 | 8 | 4 | 9.2 |
R4S1-1 | 7 | 2 | 7.6 | R3S2 | 6 | 4 | 7.2 |
R4S1-2 | 7 | 2 | 7.6 | R4S2 | 8 | 4 | 9.2 |
R4S1-3 | 6 | 4 | 7.2 | R6S2 | 8 | 4 | 9.2 |
R6S1 | 7 | 2 | 7.6 | R8S2 | 8 | 4 | 9.2 |
R8S1-1 | 7 | 2 | 7.6 | R9S2 | 10 | 6 | 11.8 |
R8S1-2 | 6 | 4 | 7.2 | R11S2 | 12 | 8 | 14.4 |
R9S1-1 | 8 | 3 | 8.9 | R12S2 | 12 | 4 | 13.2 |
R9S1-2 | 7 | 5 | 8.5 | R2S2-1 | 8 | 0 | 8 |
R11S1-1 | 9 | 4 | 10.2 | R2S2-2 | 7 | 2 | 7.6 |
R11S1-2 | 8 | 6 | 9.8 | R5S2-1 | 8 | 0 | 8 |
R12S1-1 | 8 | 2 | 8.6 | R5S2-2 | 8 | 2 | 8.6 |
R12S1-2 | 7 | 4 | 8.2 | R7S2-1 | 8 | 0 | 8 |
R2S1 | 7 | 0 | 7 | R7S2-2 | 7 | 2 | 7.6 |
R5S1 | 7 | 0 | 7 | R10S2 | 10 | 2 | 10.6 |
R7S1 | 6 | 0 | 6 | R13S2 | 12 | 0 | 12 |
Connection Mode of NPC Cell | Topologies Name | Number of Switches | Number of Diodes | Economic Cost |
---|---|---|---|---|
Indirect Connection | R11S1 | 8 | 8 | 10.4 |
R12S1 | 8 | 2 | 8.6 | |
R13S1 | 6 | 2 | 6.6 | |
Direct Connection | R11S2 | 12 | 4 | 13.2 |
R12S2 | 10 | 2 | 10.6 | |
R13S2 | 9 | 0 | 9 |
Parameter | Value |
---|---|
Rated power | 3000 W |
Input voltage | 400 V |
Grid voltage/frequency | 220 V/50 Hz |
Filter inductor L1, L2 | 1 mH |
Switching frequency | 20 kHz |
DC-bus Capacitor Cdc1, Cdc2 | 470 µF |
Junction capacitor of each switch | 100 pF |
PV parasitic capacitor CPV1, CPV2 | 0.1 µH |
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Yue, X.; Wang, H.; Zhu, X.; Wei, X.; Liu, Y.-F. A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression—Part II. Energies 2020, 13, 446. https://doi.org/10.3390/en13020446
Yue X, Wang H, Zhu X, Wei X, Liu Y-F. A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression—Part II. Energies. 2020; 13(2):446. https://doi.org/10.3390/en13020446
Chicago/Turabian StyleYue, Xiumei, Hongliang Wang, Xiaonan Zhu, Xinwei Wei, and Yan-Fei Liu. 2020. "A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression—Part II" Energies 13, no. 2: 446. https://doi.org/10.3390/en13020446