1. Introduction
Electric vehicle (EV) technologies are currently being developed to lessen environmental impact and overcome shortages of fossil fuel [
1,
2,
3,
4,
5,
6,
7,
8,
9,
10]. The typical power configuration of pure electric vehicle (EV) contains four major parts: the battery energy storage (BES), the power converter, the driving inverter of motor, and the energy management system (EMS) [
6,
8,
10]. Among them, BES is the most critical component, which can directly affect the life and endurance of the EV, driving efficiency, and system performance. In general, the power will be drawn rapidly from the BES during the vehicle acceleration, subsequently causing BES output current and temperature to rise quickly. Moreover, the driving inverter is prone to generate less stable pulse currents for the BES during deceleration [
9]. Such long-term use not only causes damage to the external body of the battery but also excessively charges and discharges the BES, which eventually will shorten the lifespan of the BES, specifically in high power applications. Although it is feasible to size up the BES for high power demands, the high price of the overall system still remains an issue. Possible solutions may be to select an ultracapacitor (UC), to assist BES, forming a “hybrid energy” system as shown in
Figure 1 for EVs [
11,
12].
UC has high-power density, long cycle life, quick dynamic response, but low-energy-density, which are opposite toward BES. Hence, it should exploit the complementary properties of both the UC and the BES [
12]. Several conventional schemes integrating both the BES and UC are shown in
Figure 1. These schemes have all been designed to control power flows, supply specific voltages to loads, and to reduce design cost, mass, and power consumptions [
12,
13,
14,
15].
Figure 1a shows the most basic parallel scheme of the BES and UC, with the latter serving as the low-pass filter [
16]. Although simple, the energy stored in the UC is not utilized effectively due to the absence of power converters. The slightly more robust
Figure 1b shows that a power converter is added in between the BES and UC [
17,
18,
19,
20]. In this scheme, the BES is connected directly to the DC-bus instead of the UC. The power output of the UC is controlled by the power converter, and this enables the UC to operate over a wider voltage range than in
Figure 1a. Due to this, the power rating of the converter has to be sufficiently large to handle high surges of power demands from the UC. The purpose of the power converter is also to maintain a constant voltage value on the DC-bus during the operation of the motor. The drawback of this scheme is that the BES is exposed to large fluctuations of high charging and discharging current, resulting in its reduced lifetime.
Figure 1c is similar to
Figure 1b except that the positions of the BES and UC have been swapped [
21]. Due to this, the BES is no longer exposed to the large current fluctuations. The power output from the BES is now controlled by the power converter. The main disadvantage of this scheme is that the DC-bus voltage is exposed to large voltages as it is directly connected to the UC. As a result, the power converter is exposed to a high risk of suffering adverse losses, especially in harsh driving conditions.
All the schemes in
Figure 1a–c clearly demonstrate that it is insufficient to use only one or no power converter. Hence, cascaded schemes using two power converters, as shown in
Figure 1d,e, have also been considered before [
22,
23]. In these two schemes, two converters decouple the BES and UC from the DC-bus. The circuit, in
Figure 1d, is also known as the “type-I scheme” where an extra power converter is added in between the UC and the DC-bus. The converter that is located in between the BES and UC is rated according to the power rating of the BES. This scheme creates more losses for the higher rated converter that is located in between the UC and the DC-bus due to the fluctuations of the UC output voltage. In order to overcome this problem, the positions of the BES and UC are swapped, as shown in
Figure 1e (type-II scheme). However, it is difficult to balance the BES cell due to it now being located at the higher voltage terminal. Although both the type-I and type-II schemes are more robust than all the previous designs that use only one or no power converter, the power losses and design costs of the schemes are increased substantially owing to the multi-stage energy conversion processes in the vehicular power train. Besides that, only one power converter is connected to the DC-bus in both of these schemes. An outage in one of the power converters will lead to the loss of the power-control function. An alternative is to employ the scheme in
Figure 1f, where the power converters are connected in parallel and directly to the DC-bus [
13,
24,
25,
26,
27,
28]. In this scheme, the power converters have the same output voltage, and the power flow of both the energy sources (BES and UC) are not affected by the output of the other converter. Consequently, this scheme can operate in various modes [
28]. But, the fully power-rated converters are needed, and the cost of this scheme is higher than all the aforementioned schemes.
In order to reduce the overall system cost, a multi-input power converter scheme is studied, as shown in
Figure 2, into the EV system [
29,
30,
31,
32,
33].
Multi-input power converters are potential solutions when multiple energy sources with different voltage levels (battery voltage ≠ UC voltage ≠ DC-bus voltage) and/or power capabilities are to be combined and yet maintain a regulated output load voltage across them.
Using multi-input power converters, it is possible to apply a different power control command for each input source. In order to reduce the cost and weight and enhance the overall performance of the hybrid energy storage system, the multi-input power converter scheme was chosen in this paper and further investigated.
In [
29], a multi-input power converter topology has been proposed to combine various input energy sources in parallel by using a single-pole triple-throw switch. The major limitations of parallel-connected source topologies are: input source voltage should be asymmetric, and only one input source can supply power to the load at a time to avoid the power coupling effect.
In [
30], a single-inductor unidirectional multi-input power converter has been presented, which can operate in buck, boost, or buck-boost modes. To realize the bidirectional power flow mode, all the diodes must be replaced by unidirectional switches, which increase the number of switches.
In [
31], a DC-bus interfacing three-port converter with a simple topology and no electrical isolation has been proposed, but it cannot cope with a wide operating voltage ratio; energy storage devices connected to different ports must have a similar operating voltage, and this constricts the application.
In [
32], a modular multi-input power converter has been presented to integrate the basic buck-boost circuit and a shared DC-bus. It is a very simple approach to integrate multiple converters into a single unit. However, it has limited static voltage gains, resulting in a narrow voltage range and a low voltage difference between the high- and low-side ports. Besides, since only a few circuit elements are shared among multiple converters, the benefits of the integration are limited.
In [
33], a two-phase multi-input converter with a high voltage conversion ratio has been proposed as an interface between dual-energy storage sources. Due to the intrinsic automatic current balance characteristic, the currents of two energy sources are theoretically identical; it indicates that the high power capability of UC cannot be utilized, and the applications of the proposed converter would be limited.
By conducting a research literature review of [
29,
30,
31,
32,
33,
34,
35,
36], in this paper, a bidirectional power converter integrated BES/UC dual-energy storage was proposed, which had the capability to perform forward power transmission and reverse energy recovery.
First, the proposed converter used a multiport switch to change the different operating modes and to improve the energy utilization of UC and increase battery life.
Second, it was also integrated with interleaved-pulse-width-modulation (IPWM) control to increase power density and reduce bidirectional current ripples, which makes power delivery more reliable.
Third, the proposed converter also used a coupled inductor technique instead of a general single-winding inductor to achieve high voltage conversion ratio and high power density for bidirectional power conversion.
Finally, the steady-state operation and characteristic analysis of the proposed converter were described, validated using simulation and experimentation of a 500 W power converter prototype with specifications of 72 V DC-bus, 24 V BES, and 48 V UC.
The summarized main features of the proposed converter were its ability to:
- (1)
interface more than two energy sources of different voltage levels,
- (2)
control power flow between the DC-bus and the two low-voltage energy sources,
- (3)
control power flow from either the UC or BES or both,
- (4)
enhance static voltage gain and reduce switch voltage stress, and
- (5)
possess a reasonable duty cycle and produce a wide voltage difference between its high- and low-side ports.
4. Simulated and Experimented Results
The realized converter prototype is shown in
Figure 11, and
Table 1 shows the electrical specifications and the circuit parameters of the realized power converter. For the convenience of the experiments, in the charge mode, the power supply (ITECH IT6726G) was used as the DC-bus on the high-voltage side, and the electronic load (ITECH IT8814B) was used as the UC or the battery on the low-voltage side. Conversely, in the discharge mode, the power supply was used as the UC, the battery, or the dual-energy storage in series.
UC Charge Mode
Figure 12 and
Figure 13 show the waveforms of the gate signals of
Q2 and
Q4, the primary-side currents of the coupled inductor (
iT1,
iT2), the secondary-side currents of the coupled inductor (
iN2,
iN4), and the low-side voltage
VU in the UC charge mode with full load condition, respectively. In this mode, the UC voltage was about 48 V, the duty ratio of the switches
Q2 and
Q4 was set to 80% (i.e.,
Dc = 0.8), the DC values of the primary currents (
iT1,
iT2) and secondary currents (
iN2,
iN4) of the coupled inductance were about 5.2 A and 3.5 A, respectively.
Figure 14 shows the waveforms of the steady-state switching voltages across the power devices in the UC charge mode. The results showed that the steady-state switching voltages across the lower-leg MOSFETs
Q1 and
Q3 were about 60 V, and the steady-state switching voltages across the upper-leg MOSFETs
Q2 and
Q4 were about 120 V. It could be seen that in
Figure 14, the simulation and the experimental results were consistent and corresponded to (41) and (42).
Battery Charge Mode
Figure 15 and
Figure 16 show the waveforms of the gate signals of
Q2 and
Q4, the primary-side currents of the coupled inductor (
iT1,
iT2), the secondary-side currents of the coupled inductor (
iN2,
iN4), and the low-side voltage
VU in the battery charge mode with full load condition, respectively.
In this mode, the battery voltage was about 24 V, the duty ratio of the switches
Q2 and
Q4 was set to 50% (i.e.,
Dc = 0.5), and the DC values of the primary currents (
iT1,
iT2) and secondary currents (
iN2,
iN4) of the coupled inductance were about 10.4 A and 3.5 A, respectively. It could be seen that in
Figure 15 and
Figure 16, the simulation and the experimental results were consistent.
Figure 17 shows the waveforms of the steady-state switching voltages across the power devices in the battery charge mode. The results showed that the steady-state switching voltages across the lower-leg MOSFETs
Q1 and
Q3 were about 48 V, and the steady-state switching voltages across the upper-leg MOSFETs
Q2 and
Q4 were about 96 V. It could be seen that in
Figure 17, the simulation and the experimental results were consistent and corresponded to (41) and (42).
UC Discharge Mode
Figure 18 and
Figure 19 show the waveforms of the gate signals of
Q2 and
Q4, the primary-side currents of the coupled inductor (
iT1,
iT2), the secondary-side currents of the coupled inductor (
iN2,
iN4), and the high-side voltage
VH in the UC discharge mode with full load condition, respectively.
In this mode, the DC-bus voltage was about 72 V, the duty ratio of the switches
Q1 and
Q3 was set to 20% (i.e.,
Dd = 0.2), and the DC values of the primary currents (
iT1,
iT2) and secondary currents (
iN2,
iN4) of the coupled inductance were about 5.2 A and 3.5 A, respectively. It could be seen that in
Figure 18 and
Figure 19, the simulation and the experimental results were consistent.
Figure 20 shows the waveforms of the steady-state switching voltages across the power devices in the UC discharge mode. The results showed that the steady-state switching voltages across the lower-leg MOSFETs
Q1 and
Q3 were about 60 V, and the steady-state switching voltages across the upper-leg MOSFETs
Q2 and
Q4 were about 120 V. It could be seen that in
Figure 20, the simulation and the experimental results were consistent and corresponded to (41) and (42).
Dual-Energy in Series Discharge Mode
Figure 21 and
Figure 22 show the waveforms of the gate signals of Q
2 and Q
4, the primary-side currents of the coupled inductor (i
T1, i
T2), the secondary-side currents of the coupled inductor (i
N2, i
N4), and the high-side voltage V
H in the dual-energy discharge mode with full load condition, respectively.
In this mode, the DC-bus voltage was about 72 V, the low-side voltage V
L was 44 V, the duty ratio of the switches Q
1 and Q
3 was set to 25% (i.e., D
d = 0.25), and the DC values of the primary currents (i
T1, i
T2) and secondary currents (i
N2, i
N4) of the coupled inductance were about 5.8 A and 3.5 A, respectively. It could be seen that in
Figure 21 and
Figure 22, the simulation and the experimental results were consistent.
Figure 23 shows the waveforms of the steady-state switching voltages across the power devices in the dual-energy in series discharge mode. The results showed that the steady-state switching voltages across the lower-leg MOSFETs
Q1 and
Q3 were about 58 V, and the steady-state switching voltages across the upper-leg MOSFETs
Q2 and
Q4 were about 116 V. It could be seen that in
Figure 23, the simulation and the experimental results were consistent and corresponded to (41) and (42).
Efficiency Measurement
The system used two power analyzers (YOKOGAWA WT310) connected to the input and output of the realized converter prototype. As could be seen in
Figure 24, in the UC charge mode, the highest efficiency point was 97.4%; in the battery charge mode, the highest efficiency point was 95.5%; in the UC discharge mode, the highest efficiency point was 97.2%; in the dual-energy in series discharge mode, the highest efficiency point was 97.1%; in the battery discharge mode, the highest efficiency point was 95.3%.