High Step-Up Flyback with Low-Overshoot Voltage Stress on Secondary GaN Rectifier

Abstract

This paper presents a new technique to mitigate the high voltage stress on the secondary gallium nitride (GaN) transistor in a high step-up flyback application. GaN devices provide a means of achieving high efficiency at hundreds (and thousands) of kHz of switching frequency. Presently however, commercially available GaN is limited to only a 650 V absolute voltage rating. Such a limitation is challenging in high step-up flyback applications due to the secondary leakage. The leakage imposes high voltage stress on the secondary GaN rectifier during its turn-off transient. Such stress may cause irreversible damage to the GaN device. A new method of leakage bypass is presented to mitigate the high voltage stress issue. The experimental results suggest that when compared to conventional secondary active clamp, a 2.3-fold reduction in overshoot voltage stress percentage is achievable with the technique. As a result, it is possible to utilize GaN as the rectifier while keeping the peak voltage stress within the 650 V limitation with the technique.

1. Introduction

The flyback inverter (Figure 1) is an emerging topology, it started to become popular during the last decade upon the publication of the early works in [1,2,3,4,5,6]. The main advantage is the simple structure, which results in low component count (therefore low cost). Besides providing isolation, the high-frequency transformer also provides the means for a higher voltage step-up. In terms of efficiency, the flyback inverter has been reported to work at a promising efficiency of 95% in grid-tied PV applications as in [7,8,9]. Additionally, unlike other isolated topologies such as the forward, push-pull, and full-bridge topology, the flyback has the advantage of requiring no additional filter inductor at its output as pointed in [10]. This is because the flyback transformer itself functions as a coupled inductor and therefore forms a 2nd order low-pass LC filter with its output capacitor.

It is easy to achieve voltage transformation with the flyback topology because the output–input voltage is governed by the mathematical relationship of Equation (1) [11].

$$\frac{v_o}{v_{pv}}=\frac{N_s}{N_p}\frac{D}{1-D}$$

(1)

Equation (1) suggests that the output voltage could be varied by adjusting two variables, the duty cycle, D, and the winding turn ratio N_s/N_p (see Appendix A for the derivation of Equation (1)). The latter is important because by merely using a high ratio of turns, it is possible to achieve a high step-up transformation (e.g., 18 to 380 V) while still maintaining a manageable duty cycle. Such high step-up is not usually possible with transformer-less topologies (such as boost, buck-boost, and Ćuk converter) because they usually require an extremely high duty cycle to achieve such conversion. For example, stepping up from 18 to 380 V would require a duty cycle of 0.95 using a conventional boost converter. It is undesirable to operate at such a duty cycle because the output will be incredibly sensitive to a small variation of input PWM. High voltage step-up transformation is useful in grid-connected photovoltaic (PV) AC modules (or microinverters). In such an application, the PV panel is of low DC voltage (18–40 V) while the mains grid is of much larger voltage (240 V_rms or 340 V_peak). Unlike a typical PV array system where mitigation techniques are required to improve the performance under partial shading [12], microinverter system performance is unaffected under partial shading because each of the ac-module PV panels is independent of each other. Each PV panel has its own microinverter with an individual maximum power point tracker (MPPT).

2. The Secondary Leakage—Rectifier Problem

Figure 2 shows an experimental result of a grid-connected (240 V_rms) flyback microinverter with an input of 37 V (and turn ratio of 1:6). Note that the result in Figure 2 is from our other high-efficiency grid-connected flyback microinverter prototype. We will write on further details on the prototype in a future article. As suggested in Figure 2c,d, if not mitigated, the secondary rectifier could experience very high voltage stress of over 1.1 kV. Such effect could be seen in Figure 2d which is taken at the peak step-up during which the peak of grid voltage is 340 V. During this transient time in Figure 2d, the primary switch Q_p is turned on, thus, producing a sudden step change to the secondary winding. To prevent negative current, the rectifier Q_s must then block both the capacitor output voltage v_o and the secondary winding voltage. Developing the blocking voltage through a leakage inductor, however, is tricky because the nature of resonance. A second-order system of a series LC circuit will cause overshoot voltages and oscillation on the rectifier junction capacitor (for more details see Appendix C).

High voltage step-up implies that the isolation between the primary and the secondary winding needs to be solid. This is usually achieved by enlarging the physical distance between the primary and secondary winding through a thick insulator sandwiched in between the winding. This comes at the cost of increased leakage because the flux linkage between the primary and secondary is reduced. The leakage is a lumped inductor in series with the transformer winding (Figure 3). It could be measured using an LCR meter by the transformer short circuit test. Kindly refer to Appendix B for more detail. It is not uncommon to achieve a 5% leakage in the flyback transformer in the high step-up application. Due to the high leakage percentage, secondary leakage is a problem in high step-up applications. In short, the existence of the secondary leakage of the flyback transformer causes leakage oscillation with the diode stray capacitance (or reverse recovery charge), causing an EMI problem and increasing the diode switching losses. This is then made worst by the fact that the step-up transformer causes the diode oscillation (or spike) to be amplified in the primary by the turn ratio.

2.1. Problem with Using GaN as a Secondary Rectifier

New wide bandgap semiconductor technology of silicon carbide (SiC) [13,14,15,16,17], and gallium nitride (GaN) [18,19,20,21,22] could be used to address the reverse recovery diode current problem. Due to their construction, SiC and GaN have no reverse recovery charges [20] and [21]. However, this does not imply that the problem could be solved by simply switching to GaN and SiC.

To develop the blocking voltage, the current charging of the junction capacitor must go through the series leakage inductance, thus energizing the leakage inductance in the process. The problem is illustrated in Figure 2d, once the rectifier has reached the desired blocking voltage, there is still residual current stored in the leakage. Therefore, the excess energy stored in the leakage (or charge) must be dumped onto the GaN/SiC junction capacitance. This charge dump causes the voltage of the junction capacitance blocking voltage to be over-developed, exceeding the desired blocking voltage (Equation (7)).

GaN and SiC diodes have no reverse recovery charge because they have no p–n junction (unlike a normal silicon diode) [20]. Forming a depletion region in a p–n junction requires the carrier to be removed through the combined action of recombination (of holes-electron pair) and excess carrier sweep out by negative diode current ([23] on p. 537). Without a p–n junction, such a process is unnecessary. In GaN transistors, the conduction between drain and source (and vice versa) occurs in a two-dimensional electron gas channel (2DEG) [20,21]. Turning off the GaN or the blocking of current occurs when the gate depletes the 2DEG channel underneath the gate electrode [21] by applying 0 V or negative voltage at the gate of the GaN transistor. Without any p–n junction, there is no requirement for reverse recovery (no holes needed to be returned to the p-type region and vice versa for the electrons). Nonetheless, the GaN drain source still requires a reverse current to fill up its effective drain-source capacitance (C_oss). It is an important concept to understand that a reverse-biased rectifier (or a turned-off transistor) does not imply that zero current will flow through the semiconductor. Even in reverse-biased (or turned off) conditions, current can still flow through the device if there is a potential difference in the circuit. Through the semiconductor capacitor, the current can flow in both positive and negative directions, albeit through a higher impedance due to the reactance introduced by the junction capacitance (pF). The blocking voltage is important because it closes the potential gap in a circuit. The current will only stop flowing once there is no more potential difference. In the narrative of a power electronics engineer, the key is to develop the blocking voltage elegantly, such that no unnecessary spikes or overvoltage occurs during the transient.

Although GaN has no reverse recovery charge, a mitigation technique is still mandatory in GaN to avoid irreversible overvoltage damage to the semiconductor. As suggested in Figure 2, without any snubber intervention on the secondary rectifier, the peak voltage stress may reach up to 1.1 kV. The voltage step response in a series LC circuit is always double the steady state (more details in theory Section 3.1 and Appendix C). It may not be an issue should a 1.2 kV rated SiC diode be employed as the secondary rectifier. However, to our best knowledge, as of 2022, a 1.2 kV GaN device does not yet commercially exist. There is a limited number of GaN unique parts that are commercially available.

Table 1. List of unique GaN parts (>400 V V_dss) commercially available from major distributors (Digikey, Mouser, Element14, RS Components, LCSC, and Arrow).

Manufacturer Part Number	Manufacturer	Drain Source Voltage (Vdss)	Drain Current	Rds On (Max)	Datasheet Year
GAN039-650NTBZ	Nexperia	650 V	60 A	33 mΩ	2021
GAN041-650WSBQ	Nexperia	650 V	47.2 A	41 mΩ	2021
GAN063-650WSAQ	Nexperia	650 V	34.5 A	60 mΩ	2020
GS-065-004-1-L	GaN Systems	650 V	3.5 A	500 mΩ	2020
GS-065-008-1-L	GaN Systems	650 V	8 A	225 mΩ	2020
GS-065-011-1-L	GaN Systems	650 V	11 A	150 mΩ	2020
GS-065-030-2-L-TR	GaN Systems	650 V	30 A	50 mΩ	2021
GS66502B-MR	GaN Systems	650 V	7.5 A	260 mΩ	2020
GS66504B-MR	GaN Systems	650 V	15 A	130 mΩ	2016
GS66506T-MR	GaN Systems	650 V	22.5 A	90 mΩ	2020
GS66508B-MR	GaN Systems	650 V	30 A	63 mΩ	2019
GS66516B-MR	GaN Systems	650 V	60 A	32 mΩ	2018
IGLD60R070D1AUMA3	Infineon	600 V	15 A	70 mΩ	2021
IGLD60R190D1AUMA1	Infineon	600 V	10 A	190 mΩ	2021
IGT40R070D1ATMA1	Infineon	400 V	31 A	70 mΩ	2021
IGT60R070D1ATMA4	Infineon	600 V	31 A	70 mΩ	2021
IGT60R190D1SATMA1	Infineon	600 V	12.5 A	190 mΩ	2020
NTP8G202NG	Onsemi	600 V	9 A	350 mΩ	2015
NTP8G206NG	Onsemi	600 V	17 A	180 mΩ	2015
P1H06300D8	PNJSemi	650 V	10 A	300 mΩ	2020
TP65H015G5WS	Transphorm	650 V	95 A	18 mΩ	2021
TP65H035G4WS	Transphorm	650 V	46.5 A	41 mΩ	2021
TP65H050G4BS	Transphorm	650 V	34 A	60 mΩ	2021
TP65H070LSG-TR	Transphorm	650 V	25 A	85 mΩ	2021
TP65H150G4LSG	Transphorm	650 V	13 A	180 mΩ	2021
TP65H300G4LSG	Transphorm	650 V	6.5 A	312 mΩ	2022
TP65H480G4JSG-TR	Transphorm	650 V	3.6 A	560 mΩ	2021
TP90H050WS	Transphorm	900 V *	34 A	63 mΩ	2020
TP90H180PS	Transphorm	900 V *	15 A	205 mΩ	2021
TPH3202LD	Transphorm	600 V	9 A	350 mΩ	2018
TPH3205WSB	Transphorm	650 V	36 A	60 mΩ	2018
TPH3206LD	Transphorm	600 V	17 A	180 mΩ	2018
TPH3207WS	Transphorm	650 V	50 A	41 mΩ	2018
TPH3208LD	Transphorm	650 V	20 A	130 mΩ	2018
TPH3212PS	Transphorm	650 V	27 A	72 mΩ	2017
XGP6508B	Xinguan Tech.	650V	21 A	150 mΩ	2019

lists down the commercially available high-voltage GaN devices (rated drain-source voltage above 400 V) obtained through a search at the world’s major electronics distributors Digikey Electronics (Thief River Falls, MN, USA), Mouser Electronics (Mansfield, TX, USA), Element14 (Leeds, UK), RS Component (Corby, UK), Arrow (Centennial, CO, USA), and LCSC (Shenzhen, China). Table 1 depicts a concerning trend; the drain-source voltage of GaN is limited to a maximum of only 600 or 650 V. In the flyback high step-up application, the steady state voltage of the GaN is around 600 V. This meant a requirement of an ultralow near-zero overshoot for 600 V devices and 9% overshoot for 650 V. Both are difficult to achieve with large secondary flyback transformer leakage. Exceeding the absolute voltage rating of the drain-source will result in irreversible damage to the GaN semiconductor. We may miss some commercial unique GaN parts (>400 V V_dss); these components might not be listed in the major distributors. We do acknowledge that these distributors may not cover the entire stocks circulating globally. However, since they are the world’s major electronics distributors, it could be inferred that GaN devices that are not listed at these sites might be very difficult to obtain and use commercially. A 1.2 kV GaN does exist, but to the best of our knowledge, it appears it is currently only in the laboratory. Such recent work is demonstrated in [22] by researchers at MIT, in which a distinctive vertical FinFET structure is used to achieve a GaN transistor with higher breakdown voltage (not lateral structure).

There are commercial GaN MOSFETs with higher voltage ratings, our search found that there is only two commercially available GaN with 900 V (highlighted with asterisk *) rating from Transphorm Inc. (Goleta, CA, USA), the TP90H050WS (newly released in 2022), and TP90H180PS. However, it is important to note that they are not 100% GaN High Electron Mobility Transistor (HEMT) devices. Instead, the manufacturer combined GaN HEMT and silicon MOSFET and has them connected in cascode configuration. The main disadvantage of this is that, unlike enhancement mode HEMT GaN, the body diode is not without a reverse recovery charge. It is unclear whether there will be more of 900 V rated GaN in the future. If so, the manufacturer would likely charge a premium for GaN devices with higher voltage capabilities. Regardless, based on the trend in Table 1, it is self-evident that GaN rated at either 600 V or 650 V would remain in the market for years to come.

Additionally, it is interesting to note that Wolfspeed (previously Cree) is also a major GaN manufacturer. However, Wolfspeed’s GaNs are RF GaNs that are meant for radio frequency operation (such as radar). They are not meant for general power electronics usage. These RF GaN devices are extremely fast that could work at GHz frequency. Some examples include CG2H80015D, CG2H80030D (8 GHz transistor), CGH60008D, and CGH60030D (6 GHz transistor). However, the drain-source breakdown voltage is limited to only 120 V. Such is typical for RF GaN. GaN has a wide application and is not only limited to power electronics. Due to GaNs ability to conduct electrons more efficiently than silicon, GaN is also used in radio, light-emitting diode [24,25,26], in HEMTs [27], laser photodiode detectors [28], and radiation detectors [29].

It is preferable to use GaN as a synchronous rectifier due to the lower forward voltage (small drain-source resistance). Using 1.2 kV SiC MOSFET is possible; however, unlike the SiC diode, SiC MOSFET’s body diode is not without zero reverse recovery charge.

2.2. Research Motivation

In short, to be able to utilize the advantages of GaN in a high step-up application, it is important to develop an active method to allow GaN to operate under high-leakage conditions such that its absolute maximum voltage rating (650 V) is not exceeded. For this reason, this article presents a new technique to alleviate the high voltage stress on the secondary gallium nitride (GaN) rectifier in a high step-up flyback application. Such is achieved by using a newly proposed leakage bypass technique to reduce the voltage stress on the secondary GaN rectifier.

2.3. Previous Solution in the Literature

A literature search found that the adverse effect due to secondary leakage of the flyback remains scarcely documented. The literature work in flyback mostly deals with step-down applications. The rectifier problem is not immensely problematic in flyback step down (for example, 240 V_rms to 5 V) because the diode does not experience large voltage stress in step-down operation. Therefore, simply allowing the diode current to slowly drop to zero as in [30,31,32] is sufficient to minimize the reverse voltage problem. However, this is not the case in the high step-up flyback. Simply turning off the diode at zero current does not imply there will be no reverse current problem because the diode must still develop a high blocking voltage at its turn-off instant, and this effect of diode reverse recovery could be seen or mentioned in [10,33,34,35,36], in which the diodes experience leakage oscillation.

Due to the large voltage stress on the secondary semiconductor power device, previous work has proposed the use of the clamping method in [37], and in [38] the active clamping of the flyback inverter for secondary device protection. Vartak [39] presented the high step-up flyback converter with additional diodes and a capacitor to provide clamping on the secondary device. Nonetheless, it is worth noting that the switching of the secondary power device is not performed using GaN. The work in [40] proposed the use of a hybrid boost-flyback converter, in this case, the diode’s high voltage stress and EMI problem are addressed by using a resonant LC circuit. This, however, has the disadvantage of losing the isolation (because the boost shares the same ground with flyback).

Alternatively, this rectifier problem could be solved using the quasi-resonant method [41] (Figure 4). The diode reverse voltage could be developed through quasi-resonant oscillation (when the transformer is un-driven); therefore, an abrupt reverse current is not required to turn off the diode. This is provided that the timing of the turn ON of the primary switch is made to coincide with the quasi-valley of the primary switch voltage (also the quasi-peak of diode reverse voltage). However, such implementation is only possible in boundary conduction mode (BCM) and discontinuous conduction mode (DCM). This is not possible in continuous conduction mode (CCM) because the continuous conduction implies that the leakages are not free to oscillate with the semiconductor capacitance, and therefore the state of quasi-resonant does not exist in CCM. In short, it was found that previous work in high step-up flyback microinverters [41,42], is mainly concerned with the soft switching of the primary switch and not on the secondary diode. The reason for this is clear; the diode is not problematic in BCM and DCM as they can be solved through the quasi-resonant scheme. Due to control complexity in CCM (RHP zero problem) [43,44,45,46,47,48], previous works were mainly concerned with the CCM control complexity issue, and therefore the work on solving the secondary rectifier-leakage problem in CCM is still uncommon. In CCM flyback operation, a higher magnetizing inductance is usually employed, and this results in higher leakage magnitude (compared to DCM and BCM transformers). In short, in CCM, secondary leakage is a concern that still needs to be addressed.

2.4. Scope of Study

It must be made crystal clear that in this paper, the scope is limited to only studying the secondary leakage-rectifier problem under a high step-up condition in CCM. Focusing on this issue, however, does not require us to build a grid-connected closed-loop flyback inverter (although we have previously built a grid-connected PV flyback microinverter in [49]). To produce the high voltage stress phenomenon, it is sufficient to build a high step-up DC–DC converter with an input PV voltage of 18 V_mpp and a DC output voltage of 380 V (21.1 voltage gain). Furthermore, at the time of writing this study, a GaN diode does not commercially exist; therefore, the typical secondary diode is replaced with a GaN MOSFET operating in synchronous rectification mode.

3. Principle

3.1. Theory of the Problem

As depicted in Figure 5 and Figure 6, during state (a), the magnetizing inductance discharges its energy and transfers them to the secondary. Hence, the secondary rectifier conducts in forward bias. In this state, the rectifier’s voltage is simply the forward voltage drop of the rectifier, while the secondary rectifier current is given by Equation (2) (p. 53 in [23], noting the dot convention).

$$i_{Qs}=\frac{N_p}{N_s}\left[i_m-i_p\right]$$

(2)

Q_p turns ON (closes) at the start of state (b), as a result, the magnetizing inductance will experience a potential difference equivalent to the PV voltage (at maximum power point v_pv = V_mpp). The dot convention implies that this voltage is reflected to the secondary as a negative polarity voltage source as in Equation (3) and Figure 6b (p. 55 in [23], noting the dot convention):

$$v_s=-\frac{N_s}{N_p}{V}_{mpp}$$

(3)

During this time, the secondary rectifier is still forward biased because it carries the residual current stored in secondary leakage. Due to the change in voltage source polarity, the secondary residual current discharges to zero, and the differential equation governing rectifier current is as in Equation (4) (derivation detail in Appendix D).

$$\frac{d{i}_{Qs}}{dt}=-\frac{1}{L_s}\left[\frac{N_s}{N_p}{V}_{mpp}+v_o\right]$$

(4)

At the start of state (c), the current crosses zero. Once the rectifier current crosses zero, the rectifier would start to become reverse biased. As such, the rectifier would transform from behaving as a forward-biased diode to a non-linear capacitor (with its junction capacitance varies with the reverse voltage). As shown in Figure 7c,d, the non-linear capacitor characteristic is specified in the manufacturer’s datasheet. The negative current charges the junction capacitance hence developing the rectifier’s blocking voltage in the process. The junction capacitor forms a series LC circuit with the leakage. Through Kirchhoff’s KVL, the differential equation governing the current is given by Equation (5) (note the derivation detail in Appendix D).

$$\frac{d{i}_{Qs}}{dt}=-\frac{1}{L_s}\left[\frac{N_s}{N_p}{V}_{mpp}+v_o-v_{Qs}\right]$$

(5)

In which the rectifier’s voltage v_Qs is given by Equation (6) (refer to Equation (16) in [50]):

$$v_{Qs}=\frac{1}{C_{Qs}}{{\displaystyle \int }}^{}{i}_{Qs}dt$$

(6)

It is important to note that C_Qs in Equation (6) is a nonlinear capacitor that varies with the reverse voltage v_Qs as in Figure 7 (in GaN C_Qs = C_oss as in Figure 7d, in SiC diode, C_Qs is simply the junction capacitance as in Figure 7c). Due to the nonlinearity introduced by the semiconductor junction capacitance, it is difficult to obtain the solution to the differential equation of Equations (5) and (6) analytically. Nonetheless, it is possible to solve them using numerical methods.

The model of the non-linear capacitances and the relevant references is shown in Figure 7a,b. This non-linear capacitance behavior is demonstrated in [16,17] for SiC devices. The equivalent circuit for the SiC diode is shown in [50] and is redrawn in Figure 7a. It could be noted that the current source in Figure 7a will be zero (hence open circuit) under reverse-bias conditions; the equivalent circuit could then be reduced to only the junction capacitance (with some equivalent series resistance ESR). As for GaN, the nonlinear capacitance behavior is shown in EPC’s (El Segundo, CA, USA) application note [18]. Such non-linear capacitance of power MOSFET is also explained in [19,51]. Additionally, the non-linear capacitance behavior of the GaN employed in this paper (GS-065-011-1-L) is also documented in its datasheet [53]. As for the SiC diode used (C4D02120), the datasheet is in [52]. The capacitances of GaN are redrawn from [18,19,51] as in Figure 7b. Note that in off condition, it is the MOSFET’s output capacitance C_oss that is responsible for the effective drain-source voltage capacitance. C_gs is omitted because gate and source are shorted together when MOSFET is off. Hence only C_ds and C_gd (in parallel) are taken as the effective capacitance. The physical capacitance location is shown in Figure 5 of the reference [18]. The nonlinearity arises from the depletion region which interested readers may read more from the S.M. Sze Semiconductor Devices: Physics and Technology textbook [54] on page 100. It should be noted that the non-linearity of the junction capacitances is not limited to GaN or SiC only. They are a common characteristic of semiconductor devices. The depletion region is the area where there is an absence of free carriers, and such definition under reverse biased is not exclusive to a normal p–n junction only. It has also been used in [50] to explain the SiC junction capacitance. The interested reader may also read more on this in Mohan’s Power Electronics Converters, Applications and Design textbook [23] page 516. The capacitance–voltage relationship is non-linear because capacitance changes with the width of the depletion region, which has a surd relationship to the electric field (voltage over area) applied [23,50].

The relationship between the charge and voltage is often characterized by the SiC/GaN manufacturer in their datasheet. If not provided, they can also be obtained by performing under the graph area integration (using trapezoidal numerical integration) of the junction capacitance vs. the junction voltage (Figure 7c,d). Such a curve for the SiC diode is in Figure 8a,b for GaN transistor (integration of C_oss charge). The peak voltage stress can also be obtained by measuring the total charge flowing into the rectifier during the turn-off transient and performing a total charge to voltage mapping (Figure 8). The total charge can be measured as in Figure 9b.

Any current flowing into the junction capacitance must also go through the series leakage, hence the current area (charge) of the leakage current must be equal to the charge stored in the junction capacitance. For a linear series LC circuit, the peak of the negative current coincides in time with the steady state voltage. The steady state voltage v_ss of the rectifier is the voltage of the secondary winding plus the output voltage as in Equation (7) (refer to Equation (14) in [10]). It is important to note, that although leakage value or capacitance characteristics of devices may differ, the peak stress voltage without snubber intervention will be double of Equation (7) (v_peak = 2 v_ss). This can be mathematically proven (as in Appendix C).

$$v_{ss}=\frac{N_s}{N_p}{V}_{mpp}+v_o$$

(7)

The charge going into the junction capacitance (at the midpoint where di/dt = 0) could be estimated using a triangle (Figure 9a) where Q_m = 0.5 Δt_m Δi. The di/dt could be estimated to be as in Equation (4). Hence through the charge equivalence, the peak negative current could be estimated as in Equation (8) (derivation detail in Appendix D):

$$i_{peak}=\mathsf{\Delta }i\approx \sqrt{\frac{2Q_m{v}_{ss}}{L_s}}$$

(8)

Q_m (at v_ss) in Equation (8) could be obtained from the stored charge characteristic as in Figure 8a. As suggested by Equations (7) and (8), a lower leakage inductance, higher output voltage, higher secondary winding voltage, and higher semiconductor junction charge characteristic, all result in a higher magnitude of peak reverse current. The Δt_m or the junction capacitance charging time before overshooting occur is estimated as in Δt_m = 2 Q_m/Δi. In state (d), once the rectifier’s voltage passes through the steady-state voltage line (midpoint), the rectifier current will have a positive gradient as the energy stored in the leakage is dumped onto the junction capacitance of the rectifier. This result in high overvoltage stress on the secondary rectifier. Finally, in the state (e), the peak energy stored in the junction capacitance is recirculated as an LC oscillation, during which the excess energy is lost through heat and radiation until the steady-state voltage (or the midpoint) is reached.

3.2. For Large Leakages

It is important to note that the concept presented in Section 2.1 is only applicable when the series inductance (leakage) is relatively small. Such is the case of the flyback inverter in Figure 2, where the step-up is at a lower ratio of 37 to 340 V. A lower step-up ratio allows lower secondary winding no. of turns (1:6 in Figure 2 compared to 1:12 in

Table 2. Experimental parameters.

Symbol	Quantity	Value
Vo	Output voltage	380 V
Vpv	PV Input voltage	18 V
Cs	Secondary filter capacitance	330 nF
Cpv	PV capacitance	2 mF
Cps	Primary clamp capacitor (C0G)	94 nF
Css	Secondary clamp capacitor (C0G)	94 nF
Lss	Secondary bypass inductor	3.8 uH
Lm	Magnetizing inductance	5.43 uH
Np	Primary winding (no. of turn)	4
Ns	Secondary winding (no. of turn)	48 (ratio 1:12)
fsw	Nominal switching frequency	240 kHz
Lp	Leakage (primary referred)	0.3 uH
Ls	Leakage (secondary referred)	34 uH
Symbol	Components	Part Number
Qp	Primary GaN switch	EPC2215
-	Flyback transformer core	ETD34
Qps	Primary active clamp GaN switch	EPC2012C
Qs	Secondary GAN Rectifier	GS-065-011-1-L
Qssb	Secondary bypass GaN switch	GS-065-004-1-L
Qss	Secondary snubber GaN switch	GS-065-004-1-L
Ds	Bypass SiC diode	C3D1P7060Q

). Hence, secondary leakage could be much lower at 10 uH. It can be noted that when leakage is relatively low, such as in Figure 2, the peak negative current (di/dt = 0) occurs at the near midpoint (or the steady state Equation (7)). In this case, the characteristic very much observes a normal LC circuit.

Equation (8) will not be accurate for the case of high leakage value because the effect of junction capacitance non-linearity is more pronounced under high series inductance. It should be noted in a normal linear LC circuit, the peak negative current (when di/dt = 0) occurs at the midpoint (or the steady state). This is not the case for condition of large leakages. For example, in Figure 17a,b (where leakage is 34 uH), the peak negative current (when di/dt = 0) coincides with rectifier voltage at 200 V (one-third of midpoint), not at the midpoint (near 600 V) as in a normal LC circuit because the large leakage transforms the circuit into a very nonlinear LC circuit. The rectifier midpoint shifts to the right relative to the peak negative current (di/dt = 0) under large leakage conditions. The general relationship of negative peak current to charge for a given rectifier voltage could generally be estimated as (derivation detail in Appendix D):

$$\mathsf{\Delta }i\approx \sqrt{\frac{2Q_v{v}_{Qs}}{L_s}}$$

(9)

where Q_v is the charge characteristic for a given rectifier voltage v_Qs described by the manufacturer as in Figure 8. For example, in Figure 17a, the negative peak current coincides in time with around 200 V of rectifier voltage, the junction charge is 6 nC at 200 V (from Figure 8a) and the leakage is 34 uH. Putting these values into Equation (9) gives an estimation of 0.26 A, which agrees with the experimental measurement of Figure 17a. Similarly for Figure 17b, at 200 V, the C_oss charge (numerical integration of C_oss in GS-065-011-1-L datasheet) is 17.5 nC; Equation (8) estimates the peak negative current to be 0.45 A, which also concurs with the experiment.

4. Proposed Solution: The Leakage Bypass

Figure 10c illustrates the new technique to mitigate the voltage stress problem. It is composed of an inductive shunt branch, in such that L_ss << L_s. Providing a path of least impedance ensures that the leakage is bypassed during the rectifier turn-off transient. Hence, unlike the conventional secondary clamp solution of Figure 10b, the leakage is not unintentionally energized during the rectifier turn-off transition. As a result, smaller charge (or reactive power) circulation per switching cycle is possible.

Figure 11 shows the waveform of the technique, and the dotted area is zoomed in Figure 12a. It is demonstrated that the active clamp branch absorbs the secondary leakage energy in state 5 (Figure 12a) to prevent overvoltage on Q_s. Then, the active clamp transistor, Q_ss is turned on for a brief period before the turn on of Q_s to return the leakage energy to the input source (PV capacitor). Similarly, on the primary, the primary active clamp transistor Q_ps is turned on for a brief period, before the turn on of Q_p to return the primary leakage energy. Such clamping sequences provide zero voltage turn-on for both Q_p and Q_s.

The key difference between the presented technique and the conventional active clamp is in state 4 (Figure 12a and Figure 13), during which the shunt inductive branch is activated to bypass the leakage. Doing so changes the circuit from having the reverse current characteristic of Equation (5) to a circuit that could be described by Equation (10):

(10)

In which the current charging the rectifier junction capacitance is dominated by the bypass current contribution because L_ss << L_s.

Note: A device with reverse recovery is undesirable as a flyback’s synchronous rectifier because the body diode will temporarily conduct secondary leakage current in CCM as in state 3 (Figure 12a). State 3 is short, typically less than 50 ns. Hence, it is difficult to perform closed loop synchronous rectification; the GaN transistor does not have a body diode. GaN can conduct in reverse without requiring an anti-parallel diode through the drain-source 2DEG channel. More explanation on this can be obtained from [20,21]. We use the term body diode merely for ease of explanation.

Figure 14 demonstrates the prototype and Table 2 lists its parameters. The prototype at 160 W of PV power was custom-built to be at a size no larger than the palm of a human hand. The GaN transistors are soldered on a custom-designed, printed circuit board (PCB) as a separate module. As in Figure 14b, the Q_s modules consist of the main power GaN transistor Q_s, isolated gate drivers, active clamp transistor, bypass transistor, bypass diode, active clamp capacitor, leakage bypass inductor, and the output capacitor C_s (using Kemet’s 1812 high-voltage ceramic C0G capacitor). We named it a module because all these components are integrated into a single PCB. The module is designed to be about the same size as a normal IGBT (of TO-247 package). All the transistors on the secondary Q_s module are heatsink-less. Large heatsinks are not required (at 160 W power) because GaN losses are low. Nonetheless, we did incorporate some vias on the polygon plane of the PCB to add more surface area. In this way, the vias are used as a simple low-cost heatsink.

The input to the high step-up flyback is a PV array simulator, the Keysight E4350B. This is a dated solar array simulator without any USB port, we had to use a USB to GPIB device to perform communication between the solar array simulator and a personal computer (PC). At full PV power, the parameters are as shown in Figure 15. The PV voltage is regulated to be at the maximum power point as illustrated in Figure 16a. A digital signal controller (DSPIC33EP128GS806) is used to maintain the PV voltage at 18 V using a constant voltage MPPT. At startup, the controller measures the open circuit voltage (V_oc) of the PV. The peak power voltage is then calculated as 0.8 V_oc; this is based on the calculation stipulated in EN50530. Once the maximum power voltage has been determined, and the switching process starts, the controller would actively measure the PV voltage and perform the required adjustment of the duty cycle to maintain the PV voltage at the maximum power point. No interrupt is used; the program simply runs in a loop. The flowchart for this process is illustrated in Figure 16b. MPPT algorithm is not the focus of this paper; as such, it is sufficient to use a very simple MPPT algorithm. The DSPIC33EP128GS806 mainly outputs a PWM signal that controls the duty cycle of the main primary transistor Q_p. All the other supporting PWM signals (Q_ps, Q_s, Q_ss, and Q_ssb) are triggered based on the main Q_p signal (as illustrated in Figure 11).

5. Experimental Results

Figure 17 demonstrated the experimental result of the leakage bypass in comparison with the conventional secondary active clamp and snubber-less secondary. Figure 17 shows that the leakage bypass provides a lower clamping voltage (630 V) compared to the conventional (695 V). As suggested in Figure 17b, the GaN used (GS-065-011-1-L) could in fact operate above its rated voltage of 650 V, which is known as overrated operation of semiconductors.

However, continuous and repetitive peaks above the absolute maximum rating are not recommended because it is unwarranted by the manufacturer. Although overrated peak operation is possible, keeping the operation below 650 V as specified by the manufacturer is always more desirable because derating will prolong the lifespan and reliability of the semiconductor device.

Another thing to note, the peak negative current of the leakage bypass is much higher than that of the conventional. This is because L_ss is much lower than L_s, which results in higher (but still manageable) di/dt, and dv/dt compared to the conventional. The di/dt and dv/dt (or the turn-off time) could be adjusted by manipulating the value of L_ss. It is also demonstrated from Figure 17 that the turn-off transient of the leakage bypass is much faster at 50 ns compared to the conventional which has a relatively slow turn-off period of around 120 ns. Figure 17 also highlights the total charge.

Table 3. Experimental measurement of rectifier peak stress and charges.

Experimental Figure	Device	Series Leakage	Measured Peak Stress Voltage vpeak	Measured Charge at vpeak	Datasheet’s charge at vpeak
Figure 2d	C4D02120A (SiC)	10 uH	1120 V	18 nC	14 nC
Figure 17a	C4D02120A (SiC)	34 uH	1133 V	18 nC	14 nC
Figure 17b	GS-065-011-1-L (GaN)	34 uH	695 V	28 nC	29 nC
Figure 17c	GS-065-011-1-L (GaN)	34 uH	630 V	26 nC	27 nC

shows the experimental peak voltage stress to measured experimental charge (and its relation to datasheet charge). It could also be observed from Table 3 that although the turn-off time is different, the area under the graph or junction capacitance charge remains almost similar for both cases.

Figure 18 shows the experimental result of the transformer primary and secondary currents. As suggested in Figure 18 and

Table 4. Experimental result for charge circulation.

	Primary Charge	Secondary Charge
Conventional Clamp	2071.7 nC	126.95 nC
Leakage Bypass	443.68 nC	31.24 nC
Reduction	4.67 times smaller	4.06 times smaller

, the leakage bypass provides a lower charge circulation per cycle. This is possible because the leakage is not intentionally energized during the turn-off transient of the rectifier. This is important because the key to low voltage stress on the rectifier is not to have the leakage energized in the first place. It is demonstrated that the leakage bypass technique allows the circulating leakage charge to be reduced to a quarter of the conventional secondary clamp. Lower circulating current (or reactive power) will also result in lower conduction losses per cycle.

Figure 19 shows the power measurement of the experimental setup. The measurement is made by using Hioki 3194, a precision power/motor analyzer. The input to the converter (Keysight E4350B Solar Array Simulator), is programmed to produce a varying PV power of P_mpp = 16 W (10% power) to 160 W (100% power). The maximum power point voltage is fixed at V_mpp = 18 V. As illustrated in Figure 16a, the maximum power point tracking is performed using a simple closed-loop constant voltage algorithm, in which the duty cycle is adjusted to track the PV maximum power point. The output voltage is consistently maintained at 380 V, utilizing an adjustable load resistor, such that the resistance is manually adjusted to produce 380 V at the output.

Figure 20 demonstrates the experimental performance comparison of the leakage bypass to the conventional clamp and snubber-less secondary. It is indicated that the leakage bypass technique reduces the voltage overshoot percentage by an average of 57% (or 2.3 times lower) compared to the conventional secondary active clamp and 92% (or 12.66 times lower) compared to snubber-less secondary. The lower overshoot voltage advantage of the leakage bypass, however, does come at a price. The obvious one is it requires extra components (and therefore cost). A more uncomfortable fact is that the experimental data appear to suggest that leakage bypass will result in lower efficiency compared to the conventional secondary clamp. At 240 kHz of switching frequency, the experimental data demonstrate that the leakage bypass has an average 0.22% lower efficiency compared to the conventional (peak reduction at full PV power is 0.43%). The reason for this is due to switching loss of the bypass MOSFET Q_ssb (we observed during the experiment that the bypass transistor has a higher temperature compared to other switches). The leakage bypass GaN transistor Q_ssb is turned on with hard switching (for simplicity reasons). Its drain-source capacitance (C_oss) could not be discharged due to the existence of the diode D_s, which limits the current flow in only one direction (the diode is necessary to prevent current flow in a negative direction once the steady state has been reached). As a result, Q_ssb switches on with a relatively high voltage of 380 V (the output voltage) stored in its C_oss junction capacitance. A 0.22% (or peak 0.43%) reduction in efficiency may not seem significant, however, it must be pointed out that GaN is not meant to be switched at only 240 kHz; it is, in fact, capable of the multi-MHz switching frequency. Because switching power loss for Q_ssb will be higher at a higher switching frequency, it is deduced that efficiency will drop proportionally higher with an increase in switching frequency. As a result, a practical approach would be to limit the leakage bypass technique to only around 200 kHz–300 kHz operation. It may be possible to fix the switching loss dilemma. Such implementation will require a zero-voltage switching at the turn-on instant of Q_ssb. We are actively performing such research to discharge the C_oss before turning on Q_ssb. Such implementation will allow the leakage bypass to work at a much higher frequency without any reduction in efficiency. In fact, improvement in efficiency compared to conventional active clamp could be expected due to lower conduction loss with leakage bypass (lower conduction loss due to lower charge circulation per cycle with leakage bypass). This will be contingent on the condition that Q_ssb switches with the zero-voltage switching technique.

6. Conclusions

Utilizing GaN for high step-up (or high gain) flyback applications requires a unique kind of technique to limit the voltage stress to below 650 V. It is experimentally shown that the proposed leakage bypass could reduce the overshoot voltage, thereby achieving the required lower than 650 V voltage stress. However, the experimental result suggests this comes at the price of lower efficiency due to increased switching loss on the bypass shunt branch. Future work needs to implement a zero-voltage switching technique on the bypass transistor.