Improved PWM Methods to Reduce the Common Mode Voltage of the Five-Phase Open-Winding Drive Topology

Abstract

With the phase angle and shape modifications for carriers, two improved carrier-based pulse width modulation (CPWM) methods with common-mode voltage (CMV) suppression effects for the five-phase open-winding drive topologies are introduced. Theoretical analysis reveals that, by employing reversed triangular carriers for two inverters under the carrier-reversed PWM (CRPWM), CMV contributions of two bridge legs belonging to the same phase can be cancelled, realizing the zero CMV effect. By dynamically employing positive and negative sawtooth carriers for all bridge legs under the carrier-switching PWM (CSPWM), the CMV contribution of each inverter can be reduced, decreasing both the amplitude and step frequency of the CMV. Current qualities and dead-time effects on CMV under the above PWM methods are analyzed. Moreover, performances of two PWM methods are verified by experiments implemented on a five-phase open-winding topology with the induction motor load.

1. Introduction

Multi-phase machine systems recently attract increasing attention due to the enhanced reliability, reduced torque ripples and derating power rating in each phase compared with three-phase machine systems [1,2], which are gradually employed in applications with high-safety and/or high-power requirements [3]. For example, 5-phase interior permanent magnet machines have been shown to be a good candidate for hybrid electric vehicles due to the high reliability and efficiency [4]. High-performance six-phase permanent magnetic synchronous motors are designed for the spacecraft areas [5]. Additionally, due to the following advantages, multi-phase open-winding inverter topologies which employ two sets of inverters with a single DC bus to drive the open-winding machine are gaining increasing popularity [6,7,8,9]:

(1)

High DC voltage utilization rating. Due to the supplement of dual inverters, the DC voltage utilization rating of the motor system can be improved, effectively widen the motor speed range with the same DC voltage level. Additionally, with the same motor speed range requirement, the desired DC voltage level can be reduced.

(2)

Multilevel modulation effect. Three-level modulation effect can be achieved in the open-winding topologies supplied by two inverters. Compared with the traditional three-level topologies, structures of open-winding topologies are simpler and the undesirable capacitor voltage balancing problem is avoided.

(3)

High control flexibility. Due to the open-winding structure, each winding current can be independently controlled. Hence, the current and terminal voltage of the fault winding will not affect the healthy winding which helps to simplify the design of fault-tolerant control scheme, and thus improves the reliability of the drive system.

Hence, the open-winding inverter topologies have been employed in high-power application aeras like the wind power generation [10,11]. In high-reliability application aeras, open-winding six-phase motor system is designed for spacecraft [5] and EV applications [12,13] to handle the winding open-circuit and short-circuit faults. The structure of the open-winding drive topology with a single DC bus is shown in Figure 1.

Figure 1. Five-phase open-winding topologies and definition of the CMV.

CMV is one of the side effects in machine systems fed by pulse width-modulated inverters, which refers to the common components in all voltages applying to phase loads as shown in Figure 1. The high-amplitude and high-frequency CMV would obviously affect the safe operation of machine systems. For example, the shaft voltage is a replica of CMV in the open-winding inverter system, and their waveform are relatively similar under the traditional PWM scheme [14,15]. Suppression of the CMV can help to reduce the shaft voltage, decreasing the charge accumulation of air-gap capacitance to avoid the breakdown voltage on the lubricant around the bearings, thus avoid the electric discharge machining (EDM) currents which would shortening the bearing’s mechanical life. Additionally, large common-mode leakage currents appear when the CMV applies to the stray circuits, bringing about undesirable electromagnetic interference (EMI) which reduces the reliability of the system [16,17].

A large number of hardware and software solutions have been proposed to reduce the CMV. Among most hardware solutions, filters are employed in inverter topologies which increase the system’s size and weight cost. In constant, software solutions are more popular which aim to reduce the CMV with improved PWM methods. Most improved PWM methods are improved space vector pulse width modulation (SVPWM) methods, employing voltage vectors with low or zero CMV contribution. For the open-winding five-phase drive systems, voltage vectors with 2π/5 or 4π/5 phase displacement in two inverters are used in Refs. [18,19] to eliminate the CMV. To further reduce the current ripple caused by the utilization of the zero CMV voltage vectors, certain non-zero CMV are also employed in Ref. [20] to improve the current and torque quality of the motor, however, allowing a small quantity of the CMV. Though the above methods can effectively suppress the CMV, in total, 1024 voltage vectors exist in the open-winding 5-phase drive system, which makes the design and implementation of the improved SVPWM methods complex. Comparatively, improved CPWM methods are more straightforward and easier to apply. In Ref. [21], by symmetrically shifting phase angles of the carriers in two inverters with 2π/6, the CMV can be theoretically eliminated for the three-phase drive system. However, the CMV ripples appear in the experiment due to the ideal factors which are not given further analysis, and the effects of the carrier phase shift on the winding currents are not discussed. For the multi-phase drive system, Ref. [22] indicates that by symmetrically shifting the carrier phase angles with 2π/m, CMV can be completely eliminated in even m-phase inverters, but the CMV suppression effect deteriorates in odd m-phase inverters which is sensitive to the modulation index. In Ref. [23], opposite triangle carriers are applied to the second and fourth largest modulating waves to reduce 80% of the CMV peak-to-peak value. In Ref [24], two sets of sawtooth carriers are alternately employed in the odd-phase inverters, achieving the suppression of the amplitude and the step frequency of the CMV. However, the methods in Refs. [22,23,24] are all related to the half-bridge topologies. Hence, CMV characteristic and the current performance should be re-examined when applying them to open-winding inverters due to increased dimensions of the bridge legs and current paths.

Considering to the complexity of the improved SVPWM CMV suppression methods, this paper introduced two improved CPWM methods with the simple modification of phase angle and shape of the carriers, which can be easily applied to the multi-phase open-winding topologies. The CMV suppression effect, current quality, dead-time effect, and EMI characteristic of these two PWM method are analyzed and compared to give a comprehensive evaluation. The organization of this paper is as follows. Section 2 defines the CMV characteristics of the open-winding inverters. Principles of two improved CPWM methods are analyzed, with the comparison of their effects on the current quality. In Section 3, dead-time effects on the CMV suppression performance of two improved CPWM methods are investigated. Section 4 and Section 5 are the experiment verification and conclusion parts respectively.

2. Improved CPWM Methods with CMV Suppression Effects

2.1. CMV under Traditional CPWM

In open-winding topologies, the CMV $v_{\mathrm{com}}$ can be calculated by summing all phase voltages in inverter 1 (INV 1) and inverter 2 (INV 2). Defining $s_{k+}$ and $s_{k-}$ are the switching functions of the $k\mathrm{th}$ bridge leg in the INV 1 and INV 2 (which equals 1 when the upper switch turns on and the lower one turns off, otherwise −1), the $v_{\mathrm{com}}$ can be expressed in Equation (1).

$$v_{\mathrm{com}}=\frac{1}{5}{\displaystyle \sum _{n=1}^5{s}_{n+}}\frac{V_{\mathrm{dc}}}{2}+\frac{1}{5}{\displaystyle \sum _{n=1}^5{s}_{n-}}\frac{V_{\mathrm{dc}}}{2}$$

(1)

In Equation (1), the first and second part right the equation are CMV contributions of INV 1 and INV 2 respectively, which can be defined as the sub CMV $v_{\mathrm{com}1}$ and $v_{\mathrm{com}2}$ as shown in Figure 1. Considering that the sum of the switching function ${\displaystyle \sum _{n=1}^5(s_{n+}+s_{n-})}$ has 11 possible values which ranges from −10 to 10 (with the step of 2), there are totally 11 possible CMV levels: $0$, $\pm V_{\mathrm{dc}}/5$, $\pm 2V_{\mathrm{dc}}/5$, $\pm 3V_{\mathrm{dc}}/5$, $\pm 4V_{\mathrm{dc}}/5$ and $\pm V_{\mathrm{dc}}$.

Under the traditional CPWM, voltage references in INV 1 and INV 2 are commonly antiphase to achieve the high DC voltage utilization rating. Carriers are uniform triangular waveforms. Hence, the CMV waveform under the traditional CPWM in a switching period is shown in Figure 2.

Figure 2. Switching state in (a) INV 1, (b) INV 2 and the (c) CMV under the traditional CPWM.

As shown in Figure 2, switching function waveforms are centrally distributed due to the symmetrical triangular carriers, and centers of two sub CMVs, $v_{\mathrm{com}1}$ and $v_{\mathrm{com}2}$, are symmetrical. After summing two sub CMVs, $v_{\mathrm{com}}$ has 11 levels and steps 20 times in a switching period. $v_{\mathrm{com}}$ reaches the maximum or minimum ($+V_{\mathrm{dc}}$ or $-V_{\mathrm{dc}}$) when carriers reach the peak or valley values. Obviously, 11 possible levels and the theoretical maximum amplitude of CMV appear under the traditional CPWM.

2.2. CMV under Carrier-Reversed PWM

According to Equation (1), if −1 and 1 exist in pairs in switching functions, sum of the switching functions will equal zero, leading to zero CMV. Actually, this requirement can be easily satisfied in open-winding topologies. Considering that voltage references are inversed in two INVs, if reversed carriers are further employed for INV 2, switching functions of the bridge legs belonging to the same phase are always complementary, as shown in Figure 3. As a result, their CMV contributions are cancelled.

Figure 3. Bridge leg voltages in INV 1 and INV 2 of the same phase under the CRPWM.

As shown in Figure 4, $v_{\mathrm{com}2}$ will be absolutely reversed compared to $v_{\mathrm{com}1}$ after employing reversed carriers for INV2, and the CMV $v_{\mathrm{com}}$ can be entirely eliminated.

Figure 4. Switching state (a) INV 1, (b) INV 2 and the (c) the CMV under the CRPWM.

Though the carrier reverse operation can effectively suppress the CMV, high-frequency harmonics of winding voltages will increase, effecting the quality of winding currents. Taking the phase A for example, Fourier analysis results of the bridge leg voltages in INV 1 and INV 2, $u_{1\_\mathrm{leg}+}^{}$ and $u_{1\_\mathrm{leg}-}^{}$, under traditional CPWM are shown in Equations (2) and (3) respectively (assuming initial angles of the voltage reference and carrier is 0).

$$u_{1\_\mathrm{leg}+}^{}=\frac{V_{\mathrm{dc}}}{2}+\frac{V_{\mathrm{dc}}}{2}M\cos {\omega }_{0}t+\frac{2}{\pi }{\displaystyle \sum _{m=1}^{\infty }{\displaystyle \sum _{n=-\infty }^{+\infty }\frac{1}{m}}}{J}_n(\frac{mM\pi }{2})\sin (\frac{m+n}{2}\pi )\cos (m{\omega }_{\mathrm{c}}t+n{\omega }_{0}t)$$

(2)

$$u_{1\_\mathrm{leg}-}^{}=\frac{V_{\mathrm{dc}}}{2}+\frac{V_{\mathrm{dc}}}{2}M\cos ({\omega }_{0}t-\pi )+\frac{2}{\pi }{\displaystyle \sum _{m=1}^{\infty }{\displaystyle \sum _{n=-\infty }^{+\infty }\frac{1}{m}}}{J}_n(\frac{mM\pi }{2})\sin (\frac{m+n}{2}\pi )\cos [m{\omega }_{\mathrm{c}}t+n({\omega }_{0}t-\pi )]$$

(3)

where $M$ is the modulation index. $J_n$ is the n-order Bessel function. ${\omega }_0$ and ${\omega }_{\mathrm{c}}$ are the fundamental and the carrier angular velocities respectively.

Then, the winding voltage $u_{1\_\mathrm{ph}}$ can be expressed as

$$u_{1\_\mathrm{ph}}=V_{\mathrm{dc}}M\cos {\omega }_{0}t-\frac{4}{\pi }{\displaystyle \sum _{m=1}^{\infty }{\displaystyle \sum _{n=-\infty }^{+\infty }\frac{1}{m}}}{J}_n(\frac{mM\pi }{2})\sin (\frac{m+n}{2}\pi )\sin (\frac{n}{2}\pi )\sin (m{\omega }_{\mathrm{c}}t+n{\omega }_{0}t-\frac{n}{2}\pi )$$

(4)

Due to the factor $\sin (\frac{m+n}{2}\pi )\sin (\frac{n}{2}\pi )$ in Equation (4), winding voltage harmonics which satisfy Equation (5) do not exist.

$$\{\begin{array}{l}m+n=\pm 2k\\ n=\pm 2k\end{array},k=0,1,\cdots$$

(5)

Obviously, only harmonics with the frequency of $2k{f}_c\pm (2k-1)f_0$ exist, where $f_0$ and $f_c$ are the fundamental and the carrier frequency respectively. There are no harmonics around the odd-order switching frequency.

Under the CRPWM, the initial angle of the carrier in INV2 changes to $-\pi$. The bridge leg voltage will be

$$\begin{array}{l}{u}_{1\_\mathrm{leg}-}^{\prime }=\frac{V_{\mathrm{dc}}}{2}+\frac{V_{\mathrm{dc}}}{2}M\cos ({\omega }_{0}t-\pi )\\ +\frac{2}{\pi }{\displaystyle \sum _{m=1}^{\infty }{\displaystyle \sum _{n=-\infty }^{+\infty }\frac{1}{m}}}{J}_n(\frac{mM\pi }{2})\sin (\frac{m+n}{2}\pi )\cos [m({\omega }_{\mathrm{c}}t-\pi )+n({\omega }_{0}t-\pi )]\end{array}$$

(6)

Then, the winding voltage can be rewritten as

$$u_{1\_\mathrm{ph}}^{\prime }=V_{\mathrm{dc}}M\cos {\omega }_{0}t-\frac{8}{\pi }{\displaystyle \sum _{m=1}^{\infty }{\displaystyle \sum _{n=-\infty }^{+\infty }\frac{1}{m}}}{J}_n(\frac{mM\pi }{2}){\sin }^2(\frac{m+n}{2}\pi )\sin (m{\omega }_{\mathrm{c}}t+n{\omega }_{0}t-\frac{m+n}{2}\pi )$$

(7)

Comparatively, the harmonic factor becomes ${\sin }^2(\frac{m+n}{2}\pi )$, and harmonics which satisfying Equation (8) do not exist.

$$m+n=\pm 2k$$

(8)

It can be seen that the winding voltage simultaneously contains harmonics with the frequency of $2k{f}_{\mathrm{c}}\pm (2k-1)f_0$ and $(2k-1)f_{\mathrm{c}}\pm 2k{f}_0$. Voltage harmonics around the odd-order switching frequency appear. Consequently, the current harmonics around the switching frequency will increase, deteriorating the total harmonic distortion (THD) of the winding current.

2.3. CMV under Carrier-Switching PWM

Under CRPWM, winding currents would deteriorate significantly due to reversed carriers employed for the same phase. Different from the CRPWM, the CSPWM aims to create complementary states of switching functions inside the same INV, reducing the sub CMV to suppress the CMV.

Under CSPWM, firstly, reversed carriers are employed for bridge legs with different up-down states, leading to reduced amplitude of sub CMV. Secondly, triangular carriers are replaced by sawtooth carriers to further reducing the step frequency of sub CMV, which is meaningful to reduce the CMV effects on the machine system [24]. As shown in Figure 5, five voltage references can be divided into 10 sectors in a fundamental period according to their up-down states. The carrier type of each bridge leg remains unchanged inside the sector, but changes when sector switches. Take the INV 1 in sector X for example, positive (right-slanting) sawtooth carriers are employed for rising voltage references $u_{1+}$, $u_{2+}$ and $u_{3+}$, and negative (left-slanting) sawtooth carriers are employed for falling voltage references $u_{4+}$ and $u_{5+}$. As a result, switching pulses of phase A, B and C have right side distributions, meanwhile that of phase D and E have left side distributions. It ensures the sum of switching functions in INV 1 varies between ± 1. Hence, the amplitude of $v_{\mathrm{com}1}$ declines to $V_{\mathrm{dc}}/10$, which is 1/5 of that under the traditional CPWM. Additionally, comparison operations of the carrier waveform and the reference waveform occur on the single edge of the sawtooth carrier, leading to reduced CMV step times, which is 6 in a switching period (10 times under the traditional CPWM).

Figure 5. The (a) sectors distribution and the sub CMV under carrier allocation (b) ruler A and (c) ruler B.

It should be noted if reverse the carrier allocation rule, the same sub CMV suppression effect can still be achieved as shown in Figure 5c. The allocation rule in Figure 5b is defined as allocation ruler A here, and that in Figure 5c is defined as allocation ruler B.

When apply CSPWM in open-winding topologies, there are totally four different schemes according to the carrier allocation rule as shown in Table 1.

Table 1. CSPWM schemes with different carrier allocation rules.

CSPWM Schemes	Carrier Allocation Ruler in INV 1	Carrier Allocation Ruler in INV 2
1	ruler A	ruler A
2	ruler B	ruler B
3	ruler A	ruler B
4	ruler B	ruler A

Under CSPWM 1 and 2, INV 1 and INV 2 adopt the same carrier allocation ruler. Because voltage references in INV 1 and INV 2 of the same phase are antiphase, their up-down states are reversed. Their carrier types are always reversed. Hence, similar to the CRPWM, CMV under CSPWM 1 and 2 can be eliminated, and high-frequency harmonics of phase currents also deteriorate significantly. Considering that implementations of CSPWM 1 and 2 are more complex compared with CRPWM due to the carrier switching operation, they are not valuable CMV suppression schemes.

Under CSPWM 3 and 4, INV 1 and INV 2 adopt different carrier allocation rulers. Carriers in INV 1 and INV 2 of the same phase keep consistent. Take sector X for example as shown in Figure 6, sub CMVs $v_{\mathrm{com}1}$ and $v_{\mathrm{com}2}$ can both be suppressed within $V_{\mathrm{dc}}/10$. The amplitude of $v_{\mathrm{com}}$ can be suppressed to $V_{\mathrm{dc}}/5$ and its step times decline to 11, which are 20% and about 50% respectively compared with that under traditional CPWM.

Figure 6. Switching state in (a) INV 1, (b) INV 2 and the (c) CMV under the CRPWM.

Carriers in INV 1 and INV 2 of the same phase keep consistent under CSPWM 3 and 4, which will not cause significant high-frequency current harmonics like that under CRPWM. However, it is necessary to discuss the effects of the carrier switching operation on current quality.

Firstly, in a switching period, bridge leg voltages in INV 1 and INV 2 of phase k before and after the carrier switching operation, $v_{\mathrm{leg}\_k+},v_{\mathrm{leg}\_k-}$ and $v_{\mathrm{leg}\_k+}^{\prime },v_{\mathrm{leg}\_k-}^{\prime }$, are shown in Figure 7. It can be seen that value of $v_{\mathrm{leg}\_k+}-v_{\mathrm{leg}\_k+}^{\prime }$ is consistent with that of $v_{\mathrm{leg}\_k-}-v_{\mathrm{leg}\_k-}^{\prime }$. It indicates the injected voltage harmonics in the $v_{\mathrm{leg}\_k+}$ and $v_{\mathrm{leg}\_k-}$ are the same after the carrier switching operation.

Figure 7. Comparison of the bridge leg voltages after the carriers switching in (a) INV 1 and (b) INV 2.

Further, in a fundamental period, carriers in INV 1 and INV 2 of phase k will switch at the same time due to the antiphase voltage references as shown in Figure 8. Hence, consistent harmonics will be injected into $v_{\mathrm{leg}\_k+}$ and $v_{\mathrm{leg}\_k-}$ simultaneously, which causes no voltage difference on the winding. Consequently, carrier switching operations under CSPWM do not affect the winding current quality.

Figure 8. The (a) PWM state in two inverters and (b) injected harmonics of the bridge legs voltage and the winding voltage.

As a conclusion, CSPWM 3 and 4 are CMV suppression schemes which compromise CMV suppression effects and the winding current quality. It should be noted that the CSPWM 3 and CSPWM 4 are actually equivalent with no essence difference. In the following sections, CSPWM 3 is regarded as a representative of CSPWM with further discussion and investigation.

3. Dead-Time Effects on CMV Suppression

The above sections analysis the CMV in ideal conditions, supposing the bridge voltage waveform is consistent with the switching function. Actually, the turn-on and turn-off processes of the switches cannot complete instantaneously. Dead time delay is required at rising edges of the switching functions to avoid short-circuit problems. The dead time delay will cause phase shift of the bridge voltage pulses, which might break their complementary states and then affect the CMV suppression effects of the improved PWM methods. In this section, the dead-time effects on CMV suppression are analyzed.

As shown in Figure 9,

Figure 9. Dead-time effects on the bridge leg voltages when (a) $i_{\mathrm{leg}\_k+}>0$ and (b) $i_{\mathrm{leg}\_k+}<0$.

(1)

if $i_{\mathrm{leg}\_k+}>0$ (define the bridge leg current $i_{\mathrm{leg}\_k+}>0$ when it flows out of the bridge leg, otherwise $i_{\mathrm{leg}\_k+}<0$), when the upper switch turns on, $i_{\mathrm{leg}\_k+}$ flows through the upper switch and the bridge leg $v_{\mathrm{leg}\_k+}$ equals $V_{\mathrm{dc}}/2$. When the upper switch turns off, $i_{\mathrm{leg}\_k+}$ flows through the lower diodes and $v_{\mathrm{leg}\_k+}$ equals $-V_{\mathrm{dc}}/2$. That is, waveform of the bridge leg voltage is consistent with the upper switch’s function $s_{\mathrm{u}\_k+}$.

(2)

if $i_{\mathrm{leg}\_k+}<0$, when the lower switch turns on, $i_{\mathrm{leg}\_k+}$ will flow through the lower switch and the bridge leg $v_{\mathrm{leg}\_k+}$ equals $-V_{\mathrm{dc}}/2$. When the lower switch turns off, $i_{\mathrm{leg}\_k+}$ flows through the upper diodes and $v_{\mathrm{leg}\_k+}$ equals $V_{\mathrm{dc}}/2$. That is, waveform of the bridge leg voltage is the inversion of its lower switch’s function $s_{\mathrm{l}\_k+}$.

3.1. Dead-Time Effects in Carrier-Reversed PWM

With the above analysis, bridge legs voltages $v_{\mathrm{leg}\_k+}$ and $v_{\mathrm{leg}\_k-}$ under CRPWM are as shown in Figure 10. When the winding current $i_{\mathrm{ph}\_k}>0$, there will be $i_{\mathrm{leg}\_k+}>0$ and $i_{\mathrm{leg}\_k-}<0$. Hence, the waveform of $v_{\mathrm{leg}\_k+}$ is consistent with $s_{\mathrm{u}\_k+}$, and the waveform of $v_{\mathrm{leg}\_k-}$ is the inversion of $s_{\mathrm{l}\_k+}$ as shown in Figure 10a. Obviously, edges of $v_{\mathrm{leg}\_k+}$ and $v_{\mathrm{leg}\_k-}$ are shifted simultaneously and the complementary state remains.

Figure 10. Complementation state of bridge leg voltages of the same phase with the dead-time effects when (a) $i_{\mathrm{ph}\_k+}>0$ and (b) $i_{\mathrm{ph}\_k+}<0$.

Similarly, the complementary state of $v_{\mathrm{leg}\_k+}$ and $v_{\mathrm{leg}\_k-}$ remains when $i_{ph}<0$ as shown in Figure 10b. CMV contributions of the bridge legs belonging to the same phase can still be cancelled. The dead-time delay will not affect the CMV suppression effect of CRPWM.

3.2. Dead-Time Effects of Carrier-Switching PWM

In Ref [24], dead-time effects of CSPWM on the CMV are analyzed for half-bridge topologies. In this section, dead-time effects on the CMV for open-winding topologies are further analyzed. Discussions of dead-time effects on CMV under CSPWM can be divided into two parts.

(1)

dead-time effects in the switching period without carrier changing

Under CSPWM 3, allocation ruler A and B are adopted respectively in INV 1 and INV2. As analyzed in Ref. [24], under both allocation ruler A and B, only step edges of some sub CMV pulses will be shifted due to the dead time delay. Take sector X for example, in INV 1, rising voltage references $u_{1+},u_{2+}$ and $u_{3+}$ employ positive carriers, and falling $u_{4+},u_{5+}$ employ negative carriers. With the inductive characteristic of the motor load, it is assuming $i_{\mathrm{ph}\_1},\hspace{0.17em}{i}_{\mathrm{ph}\_5}>0$ and $i_{\mathrm{ph}\_2},\hspace{0.17em}{i}_{\mathrm{ph}\_3}\hspace{0.17em},\hspace{0.17em}{i}_{\mathrm{ph}\_4}<0$. Hence, the bridge leg voltages and sub CMV in INV 1 are shown in Figure 11a. Shifted edges of $v_{\mathrm{com}1}$ are marked by red circle. The amplitude and step times of $v_{\mathrm{com}1}$ are still $V_{\mathrm{dc}}/10$ and 11 respectively in a switching period. Similarly, waveform of $v_{\mathrm{com}2}$ can be obtained as shown in Figure 11b. When summing $v_{\mathrm{com}1}$ and $v_{\mathrm{com}2}$, the amplitude and step times of $v_{\mathrm{com}}$ are unchanged as shown in Figure 11c.

Figure 11. Dead-time effects on the sub CMV in (a) INV 1, (b) INV 2 and the (c) CMV in the switching period without carriers switching under CSPWM 3.

(2)

dead-time effects in the switching period with carrier changing

When the sector switches, dead-time ripples of sub CMV will appear in the inverter which adopts the carrier allocation ruler A [24]. Assuming the sector switches from sector X to sector I, as shown in Figure 12, the up-down state of phase A voltage reference changes, and the carrier of phase A changes from the positive triangular waveform to the negative one in two inverters simultaneously. In INV 1, it leads to a disappeared low voltage level in the bridge voltage of phase A (marked by black cycle). Hence, a ripple in $v_{\mathrm{com}1}$ appear (marked by purple cycle) which reaches $3V_{dc}/10$ and lasts a dead time $T_{\mathrm{d}}$. However, in INV 2, the bridge leg voltage of phase D is low at the same time due to the dead-time delay. It causes a low CMV level in $v_{\mathrm{com}2}$, which can opportunely cancel the ripple in $v_{\mathrm{com}1}$. After summing $v_{\mathrm{com}1}$ and $v_{\mathrm{com}2}$, the amplitude of $v_{\mathrm{com}}$ still do not exceed $V_{dc}/5$ and its step times remain unchanged.

Figure 12. Dead-time effects on the sub CMV in (a) INV 1, (b) INV 2 and the (c) CMV in the switching period with carriers switching under CSPWM 3.

As a conclusion, in open-winding topologies, the dead-time delay might cause ripples in sub CMVs and shift the edges of some CMV pulses, but do not affect the CMV suppression effects.

4. Experiment Verification

In this part, experiments are implemented on an open-winding five-phase machine system whose photograph is shown in Figure 13. INV 1 and INV 2 both have six bridge legs and ten of them are employed here, which are controlled by one same Digital Signal Processor (DSP TMS320F28377). Parameters of the induction machine and the experiments setting are listed in Table 2. It should be noted that due to the limited testbed, the CMV, winding currents and EMI characteristics are tested and compared in this part; however, the shaft voltage and bearing current issues are not examined.

Figure 13. Photograph of the experiment platform.

Table 2. Parameters of the machine and experiment settings.

Machine Parameters				Converter Parameters
$P_N$	4 kW	$L_{m1}$	203.3 mH	$f_{\mathrm{switching}}$	10 kHz
$R_s$	1.554 $\mathsf{\Omega }$	$L_{ls}$	14.8 mH	$T_{\mathrm{d}}$	1 uS
$R_r$	1.582 $\mathsf{\Omega }$	$L_{lr}$	7.6 mH	$V_{\mathrm{dc}}$	200 V
$p_{\mathrm{n}}$	1

4.1. CMV Comparison under Different PWM Methods

In this part, the machine operates at the speed of 1500 rpm with on load. Since there is no winding neutral point in open-winding topologies, the CMV cannot be measured directly. Considering that the shell voltage will be induced due to the CMV, whose waveform is almost identical to the CMV, but the amplitude slightly declines, the shell voltage $v_{\mathrm{s}}$ is measured here to reflect the CMV.

The winding current of phase A and the shell voltage $v_{\mathrm{s}}$ under the traditional PWM are shown in Figure 14. Obviously, the CMV has 11 levels and steps 20 times with the amplitude of 80 V. After employing the CRPWM method, the shell voltage is effectively suppressed whose amplitude is close to zero.

Figure 14. Winding current and shell voltage under the traditional CPWM (a) and the CRPWM (b).

The shell voltage under the CSPWM 3 is shown in Figure 15. Clearly, $v_{\mathrm{s}}$ varies between three levels with the amplitude of 16 V and step 11 times in a switching period, which declines 80% and about 50% corresponding the analysis in Section 2.3. Additionally, there appears no dead-time ripple in $v_{\mathrm{s}}$.

Figure 15. Winding current and shell voltage under the CSPWM.

4.2. Comparison of the Current Quality under Different PWM Methods

As shown in Figure 14 and Figure 15, the current deteriorates obviously under the CRPWM, and the level of current ripples under the traditional PWM and CSPWM 3 are closed. The current fast Fourier transform (FFT) results under the above three PWM methods are shown in Figure 16. Additionally, the current FFT result under the PWM method in which unchanged sawtooth carriers employed is also shown in Figure 16, to show the carrier switching effects on the current quality.

Figure 16. FFT results of the winding current under different PWM methods.

It can be seen that, compared with the traditional CPWM methods, the current harmonics near the switching frequency (10 kHz) increases significantly under the CRPWM, whose maximum amplitude increases from 0.002A to 0.32 A, and the current THD increases from 6.85% to 22.74%. Under the CSPWM and the PWM employing unchanged sawtooth carriers, current FFT results are highly consistent. Their THD are 9.07% and 9.05% respectively. It verifies the conclusion that carrier switching operations do not affect the current harmonics. However, due to the employment of sawtooth carriers, the amplitude of current harmonic around 10 kHz slightly increases by 0.08 A compared with that under the traditional CPWM method. The THD increases by 2.22%.

4.3. Common-Mode EMI (CM EMI) Characteristic Comparison under Different PWM Methods

The system CM EMI characteristics under different PWM methods are further tested here. In the experiment, the DC power are in series with two line impedance stabilization networks (NNBM 8126 A890, 0.1–150 MHz, 600 V, 100 A) to isolate the noise from the DC power. A piece of copper sheet (2000 × 1200 × 0.50 mm) are utilized to provide a common ground for two inverters and the machine. The frequency spectrum of the conducted CM EMI ranging from 150 kHz to 30 MHz is tested with the EMI receiver Rohde-Schwarz ESL 3.

As shown in Figure 17, CM EMI characteristics under different PWM methods show obvious differences within 10 MHz. Generally, the CM EMI is at the highest level under the traditional CPWM, and at the middle level under the CSWPM. With the eliminated CMV, the EMI characteristic is the most optimal under CRWPM.

Figure 17. CM EMI characteristics under different PWM methods.

Table 3 shows the comparison of CM EMI peaks in different frequency bands. In the frequency bands of 200 kHz–300 kHz, 300 kHz–500 kHz and 500 kHz–1 MHz, compared with the traditional CPWM, the CM EMI peaks under the CSWPM decreases by 5.27 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$, 5.24 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$ and 2.14 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$ respectively, and that under the CRPWM decreases by 7.74 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$, 11.89 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$ and 7.00 $\mathrm{dB}\mathsf{\mu }\mathrm{A}$. In the frequency band beyond 10 MHz, differences of CM EMI under different PWM methods are not obvious.

Table 3. CM EMI peaks in different frequency band under different PWM methods.

Frequency Band/kHz	CM PWM Peak/$\mathbf{dB}\mathsf{\mu }\mathbf{A}$
	Traditional CPWM	CRPWM	CSPWM 3
150–200	80.36	78.05	77.06
200–300	78.68	70.95	73.41
300–500	77.28	65.39	72.04
500–1000	74.66	67.67	72.53
1 × 103–2 × 103	71.56	72.09	73.61
2 × 103–4 × 103	75.06	75.18	74.19
4 × 103–10 × 103	52.57	50.29	49.11
10 × 103–20 × 103	35.32	39.70	36.09
20 × 103–30 × 103	25.59	26.13	22.53

5. Conclusions

This paper introduces two improved carrier-based PWM methods with the CMV suppression effect for the five-phase open-winding topologies. Conclusions of this paper are as follows.

(1)

Compared with the traditional CPWM, by employing reversed carriers for the INV2, the CMV can be eliminated under the CRPWM. Due to dynamically switching of the inverted carriers under the CSPWM, sub CMV in two inverters can be effectively suppressed, leading to an 80% and 50% decline of the CMV amplitude and step times.

(2)

Under the CRPWM, odd-order high frequency harmonics increase, and winding currents clearly deteriorate. Under the CSPWM, current distortion is slight due to the employment of sawtooth carriers. The CSPWM is a compromise method between the CMV suppression effect and the current quality.

(3)

The dead-time delay does not affect the CMV suppression effects of the CRPWM method. Under the CSPWM, ripples and low voltage level caused by the dead-time delay exist in pairs in sub CMVs, and the suppression effects of CMV amplitude and step times remain unchanged.