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Article

Balanced Charging Algorithm for CHB in an EV Powertrain

1
Department of Electrical, Computer and Biomedical Engineering, University of Pavia, 27100 Pavia, Italy
2
Department of Marine, Electrical, Electronics and Telecommunication Engineering, University of Genova, 16126 Genova, Italy
3
Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham NG7 2RD, UK
*
Author to whom correspondence should be addressed.
Energies 2023, 16(14), 5565; https://doi.org/10.3390/en16145565
Submission received: 29 May 2023 / Revised: 10 July 2023 / Accepted: 21 July 2023 / Published: 23 July 2023
(This article belongs to the Section E: Electric Vehicles)

Abstract

:
The scientific literature acknowledges cascaded H-bridge (CHB) converters as a viable alternative to two-level inverters in electric vehicle (EV) powertrain applications. In the context of an electric vehicle engine connected to a DC charger, this study introduces a state of charge (SOC)-governed method for charging li-ion battery modules using a cascaded H-bridge converter. The key strength of this algorithm lies in its ability to achieve balanced charging of battery modules across all three-phase submodules while simultaneously controlling the DC charger, eliminating the need for an additional intermediate converter. Moreover, the algorithm is highly customizable, allowing adaptation to various configurations involving different numbers of submodules per phase. Simulative and experimental results are presented to demonstrate the effectiveness of the proposed charging algorithm, validating its practical application.

1. Introduction

In Europe, the transportation sector is responsible for a significant portion, approximately one-third, of the total CO2 emissions. To address this issue and promote a greener environment, battery electric vehicles (BEVs) are considered the most promising solution.
However, the widespread adoption of BEVs faces several obstacles. These include high costs, limited battery pack lifespan, and lengthy charging times. Furthermore, as the desired charging time decreases, establishing a charging infrastructure becomes more expensive and complex.
To overcome these challenges, multilevel converters (MCs) have emerged as leading electrical powertrain topologies. MCs offer modularity, which brings about key advantages such as fault tolerance, improved efficiency at partial loads, and design flexibility. The efficiency and power density of a cascaded H-bridge inverter are comparable to those of an IGBT and a SiC 2-level inverter [1,2,3]. Additionally, MCs deliver high-quality output voltage with reduced total harmonic distortion (THD), contributing to overall efficiency improvement. A modular multilevel converter (MMC) in an electrical powertrain yields better efficiency results under low power conditions [4]. Furthermore, combining a multilevel converter with a reconfigurable architecture effectively manages each battery cell, resulting in comparable efficiency to more conventional solutions [5]. Lastly, the architecture of MCs enables reduced device stress and enhanced power quality, aligning with the current trend of increasing the DC link voltage for electrical powertrains [6].
In addition to studies focusing on the motoring phase, in which the CHB has already been extensively analyzed [7], there has been a growing area of research dedicated to the charging processes of battery modules in multilevel architectures. Multilevel converters, known for their ability to handle high voltages due to their modular design, have been widely suggested as the preferred topology for charging stations in various research works [8,9]. However, there is a relatively smaller body of research addressing battery charging algorithms specifically designed for multilevel converters in electrical powertrains.
Primarily, researchers propose a direct connection between the grid and the multilevel converter phases [9,10,11,12,13,14]. This involves coupling the converters and grid phases to charge the battery modules using customized modulations, such as utilizing the state of charge (SOC) and power factors of the batteries to determine the optimal switching condition [9]. To improve performance and battery pack lifespan, it is possible to incorporate an external circuit to monitor and balance the battery cells’ voltages [10]. Furthermore, two additional methods to enhance the effectiveness of the charging process are investigated: one method predicts the ideal switching state to balance SOC by calculating the active power exchanged between the grid and the converter, while the second method calculates the best switching state using the AC input current [11]. However, the practical implementation of the methods previously proposed may encounter challenges related to complexity, communication requirements, and scalability [11].
While recent research has mainly focused on the direct link between the grid and converter, known as vehicle to grid (V2G), the most prevalent charging infrastructure still relies on DC chargers, which control the entire power flow to the battery pack [15]. Consequently, determining the DC charging algorithm for multilevel converters has become an urgent topic. A configurable modular multilevel converter (CMMC) is proposed for both motoring and charging phases in EV powertrains [16]. Specifically, the battery system is divided into multiple submodules, and the motor windings act as filters during the charging operations. However, electronic components and the resulting power losses are greater compared to the cascaded H-bridge (CHB) topology.
This paper introduces a novel state of charge (SOC)-governed algorithm for a CHB connected in parallel to a DC charger. The algorithm is fully customizable because the number of battery modules is an algorithm variable; in this way, it is possible to test different configurations with a personalized number of submodules and battery voltages. The charging process of the connected battery units within the converter is carried out using a single DC source. The proposed charging algorithm enables simultaneous control of the DC charger and all submodules within the converter, eliminating the need for an external middle-stage converter, and ensuring low charging times. Moreover, the algorithm is designed to minimize the switching dynamics of the devices, resulting in a further reduction of power losses compared to the motoring phase.
The output voltage and current of the DC charger are controlled to ensure the maximum allowed charging current within the most discharged phase, while the SOC values of the battery modules are utilized as a prioritization parameter to activate or bypass the corresponding submodules. Overall, the combined control is designed to address initial SOC imbalances and guarantee a balanced and time-efficient charging process. Cell balancing is a crucial aspect of EV battery pack operation, as it plays a vital role in maximizing performance, extending lifespan, enhancing safety, optimizing energy utilization, and maintaining consistent power delivery [17]. By addressing cell imbalances, significant improvements can be made to the overall functionality and longevity of the battery pack. Recent research trends have shifted towards finding solutions that simplify the system structure by replacing traditional active and passive balancing methods [18] with techniques integrated into the charging/discharging algorithm [19,20]. For instance, [19] proposes a three-level strategy for maintaining SOC equilibrium, which aims to address battery capacity inconsistencies and balance the energy across batteries. Another approach utilizes the half-bridge topology to insert or bypass the battery, ensuring balancing at the completion of the charging process [20]. Based on the current research trend, the proposed algorithm leverages the H-bridge architecture to charge or bypass the batteries. This approach ensures a balanced state of charge at the completion of the charging protocol while avoiding the need for extra components that would otherwise add complexity and weight to the system.
Moreover, the proposed algorithm offers high customizability, allowing for the simulation of scenarios with varying numbers of submodules. This versatility empowers researchers and practitioners to explore a wide range of cases, accommodating different system configurations and facilitating comprehensive analysis and evaluation.
The paper is structured as follows. Section 2 gives an overview of the converter structure and the charging protocol adopted, and explains in detail the charging algorithm implemented. In Section 3, the simulation results and the charging time comparison are shown, while in Section 4, the experimental results are presented. Section 5 concludes the paper.

2. CHB Structure and Charging Protocol

Figure 1 illustrates the structure of the cascaded H-bridge, where each submodule consists of an H-bridge connected to a battery module. In the motoring phase, switches K1, K2, K3, and K4 are turned on, while K5, K6, and K7 are turned off. The charging phase requires the opposite configuration of the switches.
An efficient charging procedure relies on optimized capacity utilization, high energy efficiency, and competitive charging time. Among the various charging protocols studied, the constant current–constant voltage (CC–CV) protocol serves as the reference for this algorithm [21]. In the CC phase, the battery cell is charged with a constant current value (Ich) until it reaches a predetermined voltage. Subsequently, in the CV phase, the battery cell is charged with a constant voltage (Vch), typically equal to the highest voltage of the battery cells. Consequently, the charging current gradually decreases exponentially. The CV phase concludes either after reaching the maximum predetermined charging time or when the charging current falls below a predefined value specified in the datasheet. The protocol phases are illustrated in Figure 2.
The state of charge (SOC) of the battery modules serves as a crucial parameter for identifying the two stages of the charging process. A common practice is to maintain a constant current phase until the SOC value of the battery module reaches a predetermined threshold value (SOCth = 0.80 p.u.). The constant voltage phase continues until the current falls below a predefined level ( I c h   l i m ). The choice of the SOCth value ensures that the initial charging current in the constant voltage phase is equal to or lower than the one used in the constant current phase.
The charging algorithm combines the utilization of H-bridge configurations with the simultaneous management of the DC charger’s current and voltage. Active or bypass configurations are employed to charge or bypass the battery, respectively. As depicted in Figure 1, recharging the battery involves activating switches S1 and S4, while bypassing the battery requires turning on switches S1 and S3.
The initial SOC values are determined by measuring the battery modules’ initial open-circuit voltage and referring to the SOC–Open circuit voltage (SOC-VOCP) curve provided in the battery datasheet. Once the initial SOC is known, its evolution is calculated using Coulomb counting [22] according to the following equation:
S O C k + 1 = S O C k + I k · η 3600 · C n · T S
where TS represents the discretized period between time k and k + 1, I(k) is the current flowing through the battery module at the k instant, Cn is the capacity of the battery module, and η represents the charging transformation’s efficiency.

2.1. Proposed Control Algorithm

The SOC value of the battery modules determines the algorithm procedure [23] as follows:
  • All SOC values are lower than SOCth. The constant current stage begins. The output voltage of the DC charger is controlled to ensure that the maximum current flowing in the less charged phase is equal to I c h . As a result, smaller currents pass through the other two phases, with their values depending on the SOC values of the installed battery modules. During this phase, all H-bridges are set to the active mode to charge their respective battery modules, as shown in Figure 3.
  • At least one SOC value reaches the SOCth value. Modules that have already reached this limit are configured in the bypass mode and excluded from the constant current phase. To achieve a balanced charging process, it is essential to ensure an equal number of bypassed submodules in each phase. Otherwise, the charging current would become highly unbalanced, favoring the phase with fewer active submodules and undermining the overall balance of the charging process. Consequently, continuous submodule alternation is necessary to maintain SOC balance among all submodules, as depicted in Figure 4a,b.
  • All SOC values are equal to SOCth. After the completion of the constant current phase, the charging process transitions into the constant voltage phase. In this phase, the DC charger supplies a constant voltage, and all submodules are charged concurrently, as shown in Figure 5. As a result, the overall charging current gradually decreases exponentially until it reaches a predetermined value that serves as the termination criterion for the constant voltage phase.
Overall, the state of charge (SOC) value of each battery module serves as a key parameter for transitioning between different stages of the algorithm. The constant current (CC) phase is further divided into substages based on the number of battery modules with SOC values equal to the threshold SOCth. Once all battery modules reach the threshold, the constant voltage (CV) phase is activated. For a detailed explanation of the stages, Figure 6 provides a summary flowchart.

2.2. DC Charger Control

Managing the output variables of the DC charger poses a significant challenge in the proposed algorithm. Specifically, the allocation of the DC charger’s output current among the three phases is determined by the SOC values of the battery modules. Controlling all four currents simultaneously (charger and phase currents) would be exceedingly complex due to their strong interdependence.
To address this complexity, the algorithm focuses solely on controlling the maximum phase current, as illustrated in Figure 7a. This approach offers two key advantages:
  • The maximum current is directed to the least charged phase, taking advantage of its lower equivalent impedance compared to the other two phases. Consequently, the less charged modules receive a faster charging rate compared to the other phases;
  • The algorithm effectively eliminates overcurrent occurrences.
During the constant voltage phase, voltage control replaces current control, as shown in Figure 7b. The DC output voltage of the charger is set to match the highest voltage among all the battery submodules connected within a single phase. The CV phase concludes when all phase currents drop below a certain predefined value (Ich) specified in the datasheet.

3. Simulation Results

The simulations were conducted using Simulink in MATLAB. Three different cascaded H-bridge (CHB) architectures were examined, consisting of three, four, and five submodules per phase, respectively. This allows for the validation of the algorithm across various electric vehicle (EV) applications, including both light vehicles [24] and heavy transportation [25].
The simulated battery module is based on the MOLICEL battery cell, which serves as the fundamental component. The characteristics of the MOLICEL cell are provided in Table 1. The charging process of the MOLICEL cell was simulated using the discharging curves from its datasheet. To account for variations in the mechanical parameters of the batteries, the resistance and capacity were varied according to a normal distribution with respect to a standard deviation.
The starting SOC values are listed in Table 2 and their behavior through the charging stages is shown in Figure 8a–c (three submodules per phase), Figure 8d–f (four submodules per phase), Figure 8g–i (five submodules per phase).
As the initial SOC values for all battery modules are below the threshold (SOCth), each module starts its operation in the constant current phase. Once one or more modules reach the SOCth level, they are bypassed, and the algorithm initiates the alternation of the remaining modules. Despite performing the alternation between modules with similar SOC values, there is a slight ripple in the charging current, as depicted in Figure 9b,e,h, due to the voltage value changes.
Furthermore, it is noteworthy to observe that the initial imbalance, characterized by a SOC gap among the submodules exceeding 40%, is significantly reduced during the charging process. This reduction can be attributed to the dynamic redistribution of the charging current, with the largest current flowing in the least charged cell. Consequently, the initial imbalance is effectively smoothed out, leading to a maximum difference of only 0.3% among the submodules by the end of the charging process. These findings demonstrate that the initial imbalance is practically canceled in all the simulated cases, as can be seen from the trends of the SOCs in Figure 8. This emphasizes the effectiveness of the recharging process itself in mitigating the initial imbalance, eliminating the need for additional passive elements.
Additionally, Figure 9a,d,g illustrates the adaptability of the DC charger voltage to the number of connected submodules. As the number of submodules changes, the DC charger voltage adjusts accordingly, ensuring an optimized charging process.
The constant voltage phase begins when all battery modules reach the SOCth level. During this phase, the charging process is regulated to maintain a constant voltage, resulting in a gradual decrease in the charging current. Through the combined effects of the CC and CV phases, the charging algorithm successfully achieves a balanced SOC level among the submodules, effectively reducing the initial SOC gap.
These comprehensive results provide valuable insights into the behavior and performance of the simulated algorithm, shedding light on the underlying mechanisms that enable the mitigation of initial imbalances during the recharging process. The inclusion of the number of battery modules as an algorithm variable, the observed cancellation of the initial imbalance, the adaptability of the DC charger voltage, and the achievement of balanced SOC levels showcase the effectiveness of the proposed charging algorithm in promoting battery pack performance and longevity.

Charging Time Comparison

To assess the time efficiency of the proposed algorithm, a comparison is made between the charging times of the standard powertrain (consisting of a two-level inverter coupled with a battery pack) and the cascaded H-bridge. The objective is to determine the charging time required to increase the state of charge value by 30% for a 55 kWh battery pack.
The comparison neglects the CV phase and considers only the CC phase, during which the active management of the submodules may interfere with the charging time.
a.
Two-level Inverter
Assuming 400 V as the rated voltage for a standard battery pack, its capacity can be calculated as:
C = B a t t e r y   p a c k   e n e r g y V o l t a g e = 55   kWh 400   V = 138   Ah  
The charging time is obtained applying the Coulomb counting equation:
T = S O C 3600 C I = 0.30 3600 138 104   A = 1434   s  
b.
Cascaded H-bridge
The time analysis for the CHB is conducted by examining various simulation scenarios. The charging time in these scenarios is significantly influenced by the number of submodules per phase and the initial SOC imbalances among the battery modules. The specific case scenarios considered in the analysis are provided in Table 3.
The proposed algorithm is capable of achieving lower or comparable charging times compared to conventional battery packs, even when starting with significant SOC imbalances. On the other hand, the charging process for a battery pack necessitates the intervention of a battery management system (BMS), wherein each string must be discharged to an equal level. Ultimately, the CHB algorithm enables competitive charging times by effectively handling initial imbalances and implementing maximum current control.

4. Experimental Results

The experimental activities were carried out in RT-LAB using an OP4510, hardware from OPAL-RT technologies. The hardware in the loop (HIL) used a Kintex-7 FPGA and processor up to 3.5 GHz.
The DC charger was designed as a buck converter, while the CHB consisted of three submodules per phase.
The algorithm was implemented in the UCUBE platform [26]; the setup is depicted in Figure 10b.
The experimental scenarios consider initial imbalances among the submodules of each phase and between the phases, respectively. The starting SOCs for both experimental cases are listed in Table 4. In both settings, the algorithm initially aims to eliminate the SOC gaps and subsequently maintain balanced charging dynamics.
In the first scenario, a pronounced imbalance among the phases is observed, leading to an alternation between the battery modules. This phenomenon results in a noticeable current ripple, as depicted in Figure 11b. The fluctuation in current indicates the dynamic redistribution of charging current between the submodules over time. Furthermore, an imbalanced distribution of the DC charging current is evident, with a predominant flow towards the phase possessing the lowest charge level, as highlighted in Figure 11b.
In contrast, the second scenario presents more balanced charging dynamics. The three-phase currents exhibit similar trends, and, during submodule alternation, a minor current ripple is observed. This implies a more even distribution of charging current among the submodules, resulting in a reduced fluctuation in current over time.
During the constant voltage phase, a noteworthy behavior is observed in both scenarios. All three phase currents gradually decrease in an exponential manner, as depicted in Figure 11c,f. This curve can be attributed to the charging process reaching its later stages, where the voltage across the battery terminals is maintained at a constant level. Consequently, the charging current reduces over time as the battery approaches its fully charged state.
In the first scenario, given the initial strong imbalance between the phases and within the battery modules of the same phase (as indicated by the initial state of charge values in Table 4), the SOC behavior exhibits significant differences: the battery modules in phase C (Figure 12c) and phase A (Figure 12a) reach the balance 1000 s after the battery modules in phase B (Figure 12b).
In the second scenario, the initial imbalance is consistent across phases, resulting in similar SOC trends among the different phases, as depicted in Figure 12d–f.

5. Conclusions

The paper proposes an innovative method for EV battery charging using multilevel converters. The proposed approach involves connecting a three-phase cascaded H-bridge to a single DC charger, enabling simultaneous charging of all battery modules within the converter. This novel algorithm effectively controls the charging process for all the installed battery modules, eliminating the need for additional converters and resulting in faster charging times. The results obtained from the simulation studies validate the effectiveness and customization capabilities of the proposed algorithm. The algorithm’s adaptability to different configurations is demonstrated by simulating various scenarios with different CHB architectures, including three, four, and five submodules per phase. This flexibility allows for tailored charging solutions based on specific system requirements and battery characteristics.
Furthermore, an experimental validation was conducted using the OP4510, a hardware-in-the-loop (HIL) platform from OPAL-RT Technologies, driven by the external controller UCube, a customized DSP/FPGA-based architecture. These experiments provided real-world evidence of the algorithm’s performance in terms of charging time and state-of-charge balancing. By validating the algorithm through both simulations and experiments, its reliability and suitability for practical implementation are ensured.
One of the significant advantages of the proposed method is that it enables efficient battery balancing without adding complexity to the overall system topology. Traditionally, achieving proper SOC balancing in multilevel converter-based charging systems required intricate control schemes and additional components, leading to increased weight and material costs. However, with the proposed algorithm, the balancing process becomes inherent to the charging operation itself, partially eliminating the need for extra complexity and reducing costs. This improvement not only enhances the overall system efficiency but also contributes to a more cost-effective and practical solution for EV battery charging. Finally, the proposed algorithm can be extended to other multilevel topologies, because the time performance and the DC charger control are completely independent from the submodule circuitry.
In conclusion, the presented research offers a novel approach to EV battery charging using multilevel converters. The algorithm’s customization capabilities and its effectiveness in terms of charging time and SOC balancing are validated through comprehensive simulation studies and experiments. By eliminating the need for additional converters and complex control schemes, the proposed method paves the way for faster and more cost-efficient charging solutions, further driving the adoption of electric vehicles in the future.

Author Contributions

Investigation, F.G. and G.T.; writing—original draft, F.G., G.T. and P.Z.; supervision P.Z. and A.F. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

Data sharing not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Proposed cascaded H-bridge topology.
Figure 1. Proposed cascaded H-bridge topology.
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Figure 2. Charging protocol CC–CV stages.
Figure 2. Charging protocol CC–CV stages.
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Figure 3. First stage of the algorithm. All submodules are set to active configuration.
Figure 3. First stage of the algorithm. All submodules are set to active configuration.
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Figure 4. Second stage of the algorithm: (a,b) submodules that have reached the limit are set to bypass configuration, while the periodic alternation is made in the less charged phase.
Figure 4. Second stage of the algorithm: (a,b) submodules that have reached the limit are set to bypass configuration, while the periodic alternation is made in the less charged phase.
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Figure 5. Third stage of the algorithm. The CV stage starts for all submodules.
Figure 5. Third stage of the algorithm. The CV stage starts for all submodules.
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Figure 6. Flowchart of the charging algorithm.
Figure 6. Flowchart of the charging algorithm.
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Figure 7. (a) Block diagram of the implemented control in the constant current phase; (b) block diagram of the implemented control in the constant voltage stage.
Figure 7. (a) Block diagram of the implemented control in the constant current phase; (b) block diagram of the implemented control in the constant voltage stage.
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Figure 8. SOCs behavior of 3 submodules per phase case during the charging protocol: (a) SOCs phase A, (b) SOCs phase B, (c) SOCs phase C. SOCs behavior of 4 submodules per phase case during the charging protocol: (d) SOCs phase A, (e) SOCs phase B, (f) SOCs phase C. SOCs behavior of 5 submodules per phase case during the charging protocol: (g) SOCs phase A, (h) SOCs phase B, (i) SOCs phase C.
Figure 8. SOCs behavior of 3 submodules per phase case during the charging protocol: (a) SOCs phase A, (b) SOCs phase B, (c) SOCs phase C. SOCs behavior of 4 submodules per phase case during the charging protocol: (d) SOCs phase A, (e) SOCs phase B, (f) SOCs phase C. SOCs behavior of 5 submodules per phase case during the charging protocol: (g) SOCs phase A, (h) SOCs phase B, (i) SOCs phase C.
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Figure 9. Behaviors of 3 submodules per phase case during the charging protocol: (a) DC charger voltage, (b) phase currents, (c) DC charger current. Behaviors of 4 submodules per phase case during the charging protocol: (d) DC charger voltage, (e) phase currents, (f) DC charger current. Behaviors of 5 submodules per phase case during the charging protocol: (g) DC charger voltage, (h) phase currents, (i) DC charger current.
Figure 9. Behaviors of 3 submodules per phase case during the charging protocol: (a) DC charger voltage, (b) phase currents, (c) DC charger current. Behaviors of 4 submodules per phase case during the charging protocol: (d) DC charger voltage, (e) phase currents, (f) DC charger current. Behaviors of 5 submodules per phase case during the charging protocol: (g) DC charger voltage, (h) phase currents, (i) DC charger current.
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Figure 10. (a) Buck converter to perform the DC voltage charge; (b) experimental set-up: OP4510 and UCUBE platform.
Figure 10. (a) Buck converter to perform the DC voltage charge; (b) experimental set-up: OP4510 and UCUBE platform.
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Figure 11. Behaviors of the first experimental case during the charging protocol: (a) DC charger voltage, (b) phase currents, (c) DC charger current. Behaviors of the second experimental case during the charging protocol: (d) DC charger voltage, (e) phase currents, (f) DC charger current.
Figure 11. Behaviors of the first experimental case during the charging protocol: (a) DC charger voltage, (b) phase currents, (c) DC charger current. Behaviors of the second experimental case during the charging protocol: (d) DC charger voltage, (e) phase currents, (f) DC charger current.
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Figure 12. Battery voltages behavior of 2 experimental cases during the charging protocol. First experimental case: (a) SOC of phase A, (b) SOC of phase B, (c) SOC of phase C; second experimental case: (d) SOC of phase A, (e) SOC of phase B, (f) SOC of phase C.
Figure 12. Battery voltages behavior of 2 experimental cases during the charging protocol. First experimental case: (a) SOC of phase A, (b) SOC of phase B, (c) SOC of phase C; second experimental case: (d) SOC of phase A, (e) SOC of phase B, (f) SOC of phase C.
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Table 1. Simulation parameters.
Table 1. Simulation parameters.
Battery Cell Characteristics
Battery cell capacity2.6 Ah
Battery cell voltage3.6 V
Battery cell maximum voltage4.2 V
Nominal charging current2.6 A
Maximum internal resistance20 mΩ
Battery Module Composition
Number of cells in series16
Number of cells in parallel40
Capacity104 Ah
Nominal voltage57.6 V
Nominal charging current104 A
Maximum voltage67.2 V
Minimum voltage40 V
Table 2. Initial SOCs for each simulation case.
Table 2. Initial SOCs for each simulation case.
SOCs Phase A [p.u.]SOCs Phase B [p.u.]SOCs Phase C [p.u.]
Simulation with 3 submodules per phase0.300.600.20
0.500.400.64
0.700.500.65
Simulation with 4 submodules per phase0.400.450.20
0.300.600.30
0.500.400.64
0.700.500.65
Simulation with 5 submodules per phase0.400.450.22
0.300.600.30
0.520.400.65
0.500.480.41
0.700.580.66
Table 3. Starting conditions and time results for CHB.
Table 3. Starting conditions and time results for CHB.
Number of Submodules per PhaseMaximum Unbalance for Phase [p.u.] Time   to   Reach   S O C t h
[s]
30.101212
0.151242
0.201335
0.251428
40.101261
0.151352
0.201443
0.251505
50.101263
0.151349
0.201445
0.251510
Table 4. Initial SOCs for each experimental case.
Table 4. Initial SOCs for each experimental case.
SOCs Phase A [p.u.]SOCs Phase B [p.u.]SOCs Phase C [p.u.]
Experimental case with 3 submodules per phase0.300.650.20
0.500.400.68
0.700.500.70
Experimental case with 3 submodules per phase0.400.420.40
0.500.500.52
0.600.620.69
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Gemma, F.; Tresca, G.; Formentini, A.; Zanchetta, P. Balanced Charging Algorithm for CHB in an EV Powertrain. Energies 2023, 16, 5565. https://doi.org/10.3390/en16145565

AMA Style

Gemma F, Tresca G, Formentini A, Zanchetta P. Balanced Charging Algorithm for CHB in an EV Powertrain. Energies. 2023; 16(14):5565. https://doi.org/10.3390/en16145565

Chicago/Turabian Style

Gemma, Filippo, Giulia Tresca, Andrea Formentini, and Pericle Zanchetta. 2023. "Balanced Charging Algorithm for CHB in an EV Powertrain" Energies 16, no. 14: 5565. https://doi.org/10.3390/en16145565

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