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Article

Practical Dead-Time Control Methodology of a Three-Phase Dual Active Bridge Converter for a DC Grid System

1
Korea Electronics Technology Institute (KETI), Seongnam 13509, Republic of Korea
2
Department of Electrical Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan 44919, Republic of Korea
*
Author to whom correspondence should be addressed.
Energies 2023, 16(22), 7679; https://doi.org/10.3390/en16227679
Submission received: 16 October 2023 / Revised: 13 November 2023 / Accepted: 16 November 2023 / Published: 20 November 2023

Abstract

:
An effective dead-time control strategy for the three-phase dual active bridge (3P-DAB) converter of a distribution system is studied to reduce the switching losses of power switches and improve the under-light-load power conversion efficiency. Because of the advantages of a dual-active bridge converter, such as an inherent zero-voltage switching (ZVS) capability without any additional resonant tank and a seamless bi-directional power transition, this is an attractive topology for bi-directional application. The 3P-DAB converter is apt for high-power applications such as aircraft due to an interleaved structure, which can reduce conduction losses. However, the design of the dead time depends on engineering experience and empirical methods. In order to overcome the conventional practicality of the dead-time design method, the effective control of dead time is proposed based on the theoretical analysis. In this paper, the overall explanation of the 3P-DAB converter is shown with operation principles. In addition, the dead-time effect of the 3P-DAB converter is examined and the practical variable dead-time control strategy is studied. Finally, experimental results validate the proposed variable dead-time control strategy using a 25 kW prototype 3P-DAB converter.

1. Introduction

With the need for carbon neutrality, there is a growing interest in hybrid grid systems, such as the one shown in Figure 1, that can actively utilize renewable energy. Although the expansion of renewable and sustainable energy can significantly reduce a major cause of CO2 emissions, the large-scale integration of renewable energy sources poses an increasingly significant challenge to power system stability [1]. The reasons for the degradation in grid stability as the power production from renewable energy sources increases are several [2]:
System Flexibility: The large-scale integration of renewable energy sources implies potentially significant power injections during peak load times that require more system flexibility to balance energy supply and demand.
Integration of Inverter-Connected Devices: Another challenge for the energy transition is the mandatory integration of inverter-connected devices. Including these devices can reduce system inertia and fault current, decreasing the overall system stability.
Decreased Grid Inertia: The conventional power grid heavily relies on the inertia of large rotating turbines and generators of traditional power plants to provide this frequency stability. As these sources are replaced with inertia-less renewable energy sources, alternative methods to maintain frequency stability become necessary.
For these reasons, attention is focused on the key concept of grid forming [3]. Grid forming is a technology that gives inverter-based renewable energy power a function similar to a synchronous generator. Grid forming is one of the critical technologies for expanding the acceptability of renewable energy and offers artificial inertia to inverter-based power sources to have control performance similar to that of synchronous generators [4]. An isolated bi-directional DC/DC (IBDC) converter is not essential for grid forming but can be useful since the IBDC converter allows for the flow of energy in both directions between the grid and an energy storage system, such as a battery or an electric vehicle [5]. This can help to regulate the power on the grid, provide reactive power compensation, and smooth out fluctuations in the power grid. Therefore, whereas not essential, the IBDC converter can provide many benefits for grid forming.
One of the apt topologies of the IBDC converter for the power distribution system is a dual active bridge (DAB) converter. This is because DAB converters have the advantage of a zero-voltage switching (ZVS) capability without additional resonant components. The DAB converter operates smooth bi-directional power conversion according to the basic control algorithm [6,7,8]. A three-phase dual active bridge (3P-DAB) converter is an interleaved version of the single-phase dual active bridge (SP-DAB) converter. Due to the interleaved structure, the 3P-DAB converter has merits as the grid-connected IBDC converter because of low peak and RMS currents [9]. The 3P-DAB converter can also reduce the weight and volume of the passive components due to the higher effective frequency than switching frequency [10,11]. Furthermore, the 3P-DAB converter contains a lower harmonic content [12,13].
There are many papers on 3P-DAB converters. In [10], the design methodology for the optimization of coupling inductance was addressed based on the detail loss analysis according to the transmission power. In [11], the triangular/trapezoidal modulations in the 3P-DAB converter were also presented for 3P-DAB converter operation. Reference [13] proposed the auxiliary inductors to be connected in parallel to increase the effective magnetization current of the transformer to extend the ZVS area during light load conditions. In terms of the modulation algorithm, simultaneous pulse width with a fixed asymmetrical duty control modulation was proposed to increase the system efficiency [14]. In [15], a variable switching frequency control algorithm was applied to the 3P-DAB converter to improve power conversion efficiency. In [16], based on the small signal model of the 3P-DAB converter, the design methodology for a practical controller is proposed. Although there are lots of papers on 3P-DAB converters, most of them focus only on hardware design and switching modulation strategies to increase the overall power conversion efficiency. Despite many advantages, the use of 3P-DAB converters has to be implemented carefully. Since the phase shift modulation (PSM) is the basic algorithm for the 3P-DAB converter, the dead time can significantly affect the operation of the 3P-DAB converter in extremely light load conditions. In [8,17], the dead time of SP-DAB converters is analyzed, whereas that of 3P-DAB converters is not presented and analyzed; however, the analysis and control strategy of dead time for 3P-DAB converters are not dealt with in previous papers on 3P-DAB converters.
In this paper, based on the analysis of a 3P-DAB converter, the effective dead-time control methodology of 3P-DAB converters in light load conditions is proposed in order to increase efficiency and protect against abnormal operations. The organization of this paper is as follows: Section 2 briefly explains the basic operation of the 3P-DAB converter. In Section 3, the detailed operation of the 3P-DAB converter according to different dead times is studied. The proposed effective dead-time control strategy is also presented with the comparison between the conventional dead-time control and the proposed one. In Section 4, the experimental results are shown to verify the performance improvement with the proposed dead-time control algorithm. In Section 5, the concerns when this proposed algorithm is adopted are briefly discussed. Finally, Section 6 summarizes the contributions of this study.

2. Analysis of the Three-Phase Dual Active Bridge Converter

2.1. Basic Operation Principles of Three-Phase Dual Active Bridge Converter

Figure 2 shows the 3P-DAB converter. The medium-frequency transformer and coupling inductance of each phase are connected to the three-phase bridge, the high-voltage side (HVS), and the low-voltage side (LVS). Here, the coupling inductance is defined as the sum of external series inductance and leakage inductance in the transformer of each phase. The PSM uses a fixed duty ratio of 50%, except the soft-start operation is common in 3P-DAB converters. In Figure 3, the steady-state operating waveforms of the 3P-DAB converter under PSM are presented. In this paper, the phase shift difference between two bridges, the HVS, and the LVS is defined to the normalized term ɸPSM (=ɸ/π), and this term controls the transmission power. A six-step phase voltage waveform of each bridge, the HVS, and LVS is generated under the steady-state operation [10,16]. In this paper, several assumptions are also considered for the analysis as follows:
The input and output voltage are constant.
All the coupling inductances are the same in each leg.
The parasitics are constant and the same in the same power switches.
The transformer’s magnetizing inductance is infinite.
The winding types of the three-phase transformer should be decided with consideration of the characteristics of each winding. Compared with the Y-Δ connection, even if the RMS of the Y-Δ connection is lower than that of the Y-Y connection, the Y-Y connection has low reactive power due to the natural feature of the Y-Δ connection, i.e., 30° phase delay. Additionally, the Y-Y connection can make a balance in each phase. Therefore, in this paper, the Y-Y connection is selected for three-phase transformers [18].
The coupling inductance is the most important component in the 3P-DAB converter because the coupling inductance is designed to store the electric energy and transfer it. Furthermore, the shape of the phase current in the HVS and the LVS is determined by the value of coupling inductance, which is relative to the conduction losses. Each phase current through can be stated as follows:
L C , x d i L c , x ( t ) d t = v a p , x ( t ) v a s , x ( t ) n
where LC,x is the coupling inductance of each phase, vH is the phase voltage of HVS, vL is the phase voltage of LVS, and n is the turn ratio. Under the steady state, because the initial current value of coupling inductance in iLc,x(0) is the same value in -iL(π) according to the flux balancing law, the initial phase current of iLc,x(0) can be expressed as follows:
i L c , x ( 0 ) = n V i n 18 f S w L C , x [ m ( 2 3 ϕ P S M ) 2 n 2 ]
where Vin is the input voltage, m is the voltage gain (=nVout/Vin), and fSw is the switching frequency. Based on (2), the initial phase current and the phase current during the switching period can be expressed mathematically and the transmit power POut under SPS modulation can be expressed as follows:
P O = 3 × [ 1 π 0 π V L s , x ( θ ) i L s , x ( θ ) d ϕ ] = { (3a) n V O V i n 2 f S L C , x m ( 2 3 ϕ P S M 2 ) ϕ P S M , 0 ϕ P S M 1 3 (3b) n V O V i n 2 f S L C , x m [ ϕ P S M ( 1 ϕ P S M 2 ) 1 18 ] , 1 3 ϕ P S M 1 2
As presented in Equations (3a) and (3b), the transmit power of the 3P-DAB converter varies depending on the ɸPSM range. Theoretically, the maximum transmit power of the 3P-DAB converter can be obtained when the ɸPSM is ±1/2, such as for the SP-DAB converter. However, the ɸPSM approaches ±1/2, where the nonlinearity of the output power is greater than that of the lower ɸPSM because the trajectory of the output power from the ɸPSM is parabolic. This means that if the ɸPSM is higher than 1/3, the proportion of reactive power increases so even if the ɸPSM changes from 0 to ±1/2 and the power is transmitted seamlessly, the ɸPSM is usually limited to ±1/3.

2.2. The Analysis of Soft-Switching Mechanism and Dead Time

In the 3P-DAB converter, zero-voltage switching (ZVS) can be achieved without any additional resonant tank. The resonance between coupling inductance and output capacitance determines the direction of current flow and the current commutates to the anti-parallel diode of the power switches before the switch is turned on. In other words, the stored energy of coupling inductance should be higher than the stored energy of the capacitor for the soft-switching mechanism. This is a common principle of the ZVS conditions and can be expressed as follows in the 3P-DAB converter:
{ i L c , x ( 0 ) < 0 f o r   H V S   u p p e r   d e v i c e s i L c . x ( π ) > 0 f o r   H V S   l o w e r   d e v i c e s i L c . x ( ϕ P S M ) > 0 f o r   L V S   u p p e r   d e v i c e s i L c . x ( π + ϕ P S M ) < 0 f o r   L V S   l o w e r   d e v i c e s
The turn-on currents at the HVS and LVS top switches of the bridge are defined as iLc,x(0) and iLc,x(ɸPSM), respectively, in Figure 3. Ideally, the inequalities of (*) enable ZVS conditions on the power switches. However, despite the higher energy of the inductance, the turn-on loss of each bridge can occur depending on individual oscillation and switching timing. The magnitude of the current in (4) is not sufficient to fully charge and discharge the parasitic output capacitance of power switches (Ceos) in practice. Therefore, it is necessary to reconfigure the ZVS condition considering the minimum current for switching activity. The resonance should be analyzed and the ZVS condition can be redefined. Figure 4 shows the equivalent circuit of a 3P-DAB converter when the HVS switches of S3 and S6, the LVS switches of Q1, Q3, and Q6 are on-state, and S1 and S2 is in switching. The resonance occurs between Ceos and LC,1,2,3. Here, the coefficient of Ceos is two because the top and bottom of the same bridge arm are asymmetrically turn-on and turn-off mechanisms. By applying the superposition to the circuit, the resonance can be analyzed and the ZVS condition can be redefined as follows [10]:
i L c , x ( 0 ) = n V i n 18 f S w L C , x [ m ( 2 3 ϕ P S M ) 2 n 2 ] 3 V i n V o u t C e O S 2 L C . x i L c , x ( ϕ p s ) = n V i n 18 f S w L c . x { 2 n 2 + m ( 3 ϕ P S M 2 ) } 3 V i n V o u t C e O S 2 n L C . x
One of the design challenges of 3P-DAB converters is the limited ZVS area under light load conditions that makes them less efficient. In order to guarantee the soft-switching mechanism, the proper dead time should be calculated as well as taking into account the minimum current of Equation (5). Typically, the dead time should be longer to fully charge and discharge the parasitics on the power switch Ceos and, based on Equation (5), the minimum dead time can be derived.
1 2 L C , x i L c , x 2 1 2 ( 2 C e o s ) v a p , x 2
2 C e o s v a p , x i C e o s t d min ( i L c , x ( 0 ) , i L c , x ( ϕ P S M ) ) t d
Figure 5 shows the theoretical detail switching sequence waveform according to different dead times. Note that, as presented in ②-1 and ②-2 in Figure 5, if the dead time is too long, the resonance current flows back in the reverse direction, which can also increase switching losses by generating capacitor voltage dumping. Therefore, the dead time should be shorter than the resonance period/4. The sufficient conditions for achieving ZVS can be obtained using td expressed in Equation (7).
t d e a d _ min = 36 V i n L C , x C e o s f s w V o u t ( 2 3 ϕ P S M ) 2 n 3 t d e a d t d e a d _ max = π L C , x C e o s 2

3. Dead-Time Effect of Three-Phase Dual Active Bridge Converters

3.1. Analysis of the Dead-Time Effect in Three-Phase Dual Active Bridge Converters

In 3P-DAB converters, the dead time under extremely light load conditions has a significant negative impact on the steady-state operation [10]. Here, an extremely light load condition is defined as a steady-state operation with dead time longer than ɸPSM. Figure 6a presents the gate signal, the phase voltage, and the phase current waveform under extremely light load conditions. When the transmitted power is too small compared with the rated power, the actual ɸPSM is too small and shorter than the dead time, causing an abnormal waveform for the phase current, as shown in Figure 6a, and increasing the reactive power, peak current, and turn-off current. Figure 6b shows the measured waveforms of the phase voltage and phase current waveforms as in the conditions in Figure 6a. In Figure 6b, it is seen that even if the output voltage is well controlled as the reference voltage 278 V, the current waveform is abnormal, which is different from Figure 3. This is because the polarity of effective ɸPSM is negative as shown in red circle on Figure 6b, even though the calculated ɸPSM is positive. This means that the effective phase shift angle under extremely light load conditions is shorter than the dead time as shown in Figure 6a, and it significantly affects the current waveform when the polarity of the switch current is changed during the dead time. When the dead-time effect significantly affects the 3P-DAB converter, as shown in Figure 6, since the effective phase shift is reduced, the practical output power does not match the theoretical Equation (3).

3.2. Proposed Practical Dead-Time Control Methodology

As shown in Figure 7, the case of the switching mechanism is different according to the dead time. ① in Figure 5 shows the case where there is a lack of minimum current with proper dead time for ZVS. ②-1 in Figure 5 shows the case where there is a sufficient current for ZVS with a dead time that is too long. ②-2 in Figure 5 shows the case where there is an insufficient current for ZVS with a dead time that is too long. ③ in Figure 5 shows the situation where these is sufficient current for ZVS with a proper dead time. Figure 7 presents the actual waveform of the 3P-DAB converter, which matches the theoretical waveform in Figure 5, as previously explained. In Figure 7a-d, the measurements are conducted under light load conditions to show the required minimum current for soft commutation of the switching, as expressed in (5). As shown in Figure 7c, even though medium power is transmitted, the soft switching can fail with a dead time that is too long.
Commonly, the dead time is fixed because the power converter can be easily implemented for safety. This is because a short-through phenomenon can occur if the dead time is reduced. Dynamic dead-time control has been proposed to increase the power conversion efficiency and expand the ZVS area compared with fixed dead-time control [19,20,21,22]. In general, a dynamic dead time means that under light load conditions the dead time would be extended to meet the ZVS conditions, for example (7). After the power increases, the dead time is decreased in dynamic dead-time control. This is because the time required for charging and discharging the output capacitance of the power switch is reduced as the switch current is increased. Figure 8 displays the results for a 3P-DAB converter using a PSIM simulation tool with the specifications in Table 1. In Figure 8, the phase voltage and phase current waveforms of the 3P-DAB converter are shown in the same light load conditions (almost 300W conditions) depending on the different dead times. Even in the same load conditions, the abnormal current waveform presented in Figure 8a could occur when the dead time is even longer. Therefore, as shown in Figure 6 and Figure 8a, if conventional dynamic dead-time control is applied to the 3P-DAB converter, the extended dead time in extremely light load conditions is less efficient due to the high RMS current, high peak current, and high turn-off current, which means that it is negative in terms of power conversion efficiency. Therefore, in this paper, based on the empirical method of power switch implementation, practical dead-time control is proposed.
Figure 9 shows the overall control block diagram of the 3P-DAB converter, including the proposed dead-time control algorithm. The proposed dead time is calculated by using the output terms of the feedback controller and acts as a feedforward controller to adjust the PWM of all switches in the 3P-DAB converter. Figure 10 shows the proposed actual dead-time control methodology of the 3P-DAB converter with consideration of specifications. Soft switching will fail with the conventional fixed dead-time control because the minimum dead time required for ZVS under no load conditions, considering Table 1, was longer than 3 μs. The criteria for the dead time could be obtained by using an empirical method under no load conditions as a minimum value of td_critical. Here, td_critical is defined as a switching transition time in which an arm-short phenomenon does not occur. As the ɸPSM increases, the dead time increases linearly from td_critical to the critical point of the ZVS td_ZVS. From (5), the minimum ɸPSM for soft switching can be derived and calculated as 0.09715 based on Table 1. After passing td_ZVS, the dead time is reduced according to (7). As the dead time decreases, the dead time matches td_critical. Here, the dead time is limited to td_critical in order to prevent short-circuit phenomena.

4. Experimental Results and Analysis of Results

Figure 11 shows a prototype 3P-DAB converter to verify the proposed practical dead-time control methodology. IGBT modules (CM600DX-24S1) manufactured by MITSUBISHI (Tokyo, Japan) were adapted. Three IGBT modules were applied on each bridge. Nano-crystalline toroidal cores (TC-1308040-1) manufactured by AVERTEC (Ilsan, Republic of Korea) are adapted to the Y-Y transformer core material because the nano-crystalline material has merits such as lower core loss, higher Curie temperature, and higher maximum flux density than conventional materials. Three phase inductors based on the high-flux core of CH740060 (LC,1, LC,2, and LC,3) are connected in series to the transformer. Film capacitors (K3490070106K0L155) (KENDEIL, Gallarate, Italy) that have relatively lower ESRs are used for the input and output filters. The TMS320F28335 (Texas Instruments, Dallas, TX, USA) is used as a digital controller. The parameters of the prototype 3P-DAB converter are listed in Table 1.
Based on Faraday’s law, the minimum number of the primary windings of the transformer, NP, can be calculated as 35 turns. Here, ΔB is limited to 0.5 to avoid saturation. In order to bring the voltage gain m as close as possible to 1, the number of turns for the HVS and the LVS were chosen as 39 and 20, respectively. Figure 12 shows the test bench for the experiment, which consists of a bi-directional power supply and a load bank. The power supply was the programmable voltage type from DC 265 to 710V and its current could be supplied up to 200 A. The load bank is a 100-kW/300 V manual resistance load. The WT1800 power analyzer from YOKOGAWA (Tokyo, Japan) was used to measure the efficiency of the 3P-DAB converter.
Figure 13 and Figure 14 show the experimental results of comparing the conventional dead-time control and proposed dead-time control under almost the same load conditions. As shown in red circles on Figure 13, even if the output power is almost same, depending on the dead-time, the effective ɸPSM can be different. As explained in Section 3, since the conventional dead time is longer than ɸPSM, the abnormal current waveform occurs in Figure 13a. Based on the proposed dead-time control algorithm, the experimental waveform is normal under extremely light load conditions. Since the abnormal current increases the reactive power and conduction loss, the efficiency could be improved by using the proposed algorithm. Figure 15 presents the experimental results in steady-state operation according to the output load variations. In Figure 15a, even though the effective ɸPSM is measured very small as about 118 m° under 2 kW, the current waveform is detected as normal operation. The measured output power and the phase shift terms between the phase voltage are given in each figure. The angle of the phase shift changes according to the change in the output power. As the output load increases, the angle of the phase shift increases, as shown in (3a). Through the overall load ranges, the output power voltage is well adjusted to a reference voltage of 278 V. Figure 16 shows the comparison of the efficiency curve depending on the dead-time control. The difference between the conventional dead-time control and the proposed dead-time control is in the extremely light load conditions. The biggest difference in power conversion efficiency between the two dead-time control methods is almost 1% under extremely light load conditions. Since the dead time is the same in light load conditions, the efficiency is almost the same except for the measurement error. The highest efficiency measured is 97.22% at about 6 kW.

5. Discussion

Figure 17 shows the experimental results of the 3P-DAB converter under very light load conditions with the oscilloscope’s single-shot trigger function. The 3P-DAB converter operates under steady-state conditions and has a phase shift angle of 1° to 2°. As shown in Figure 17, regardless of the output power, the output voltage seems to be well adjusted to target 278, but the peak of the phase current changes. This is because the variable dead time was applied to the 3P-DAB converter, causing a slight ringing in the output power. The output of the feedback controller becomes the feedforward input of the dead-time control. It is calculated directly through the microcontroller, as in the conventional dynamic dead-time control method. This means that the converter’s output power could be oscillated. Even if dead-time controllers are applied in a narrow area, instability might be caused during that period. Therefore, a tightly designed controller is needed.

6. Conclusions

In this paper, an effective dead-time control strategy under extremely light load power conversion efficiency for the three-phase dual active bridge (3P-DAB) converter was studied. 3P-DAB converters are one of the useful bi-directional converter topologies due to galvanic isolation, high performance, and ZVS capability; however, their efficiency in extremely light load conditions is lower due to abnormal current waveforms. In this paper, a mathematical analysis of the 3P-DAB converter’s dead time was presented. According to the different dead times, the theoretical and experimental results were explained. With the consideration of the 3P-DAB converter dead-time effect, a practical dead-time control strategy based on the empirical methods was applied to reduce the reactive power and conduction losses. To verify the performance of the proposed dead-time control methodology, a 25 kW prototype 3P-DAB converter was implemented. A comparison between the conventional dead-time control method and the proposed dead-time control method is presented based on the mathematical analysis, simulation results, and experimental results. Finally, an efficiency improvement of about 1% was measured based on the proposed dead-time algorithm under extremely light load conditions.

Author Contributions

Conceptualization, H.-J.C. and J.-H.J.; software, H.-J.C.; validation, H.-J.C.; formal analysis, J.-H.A.; investigation, H.-J.C. and J.-H.A.; witing—original draft preparation, H.-J.C. and S.-G.S.; writing—review and editing, H.-J.C. and S.-G.S.; visualization, H.-J.C.; supervision, S.-G.S.; project administration, S.-G.S. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by a Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government (MOTIE) (No. 20206900000020).

Data Availability Statement

Data available in a publicly accessible repository.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. General structure of a hybrid AC/DC microgrid.
Figure 1. General structure of a hybrid AC/DC microgrid.
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Figure 2. Circuit schematics of three-phase dual active bridge converter.
Figure 2. Circuit schematics of three-phase dual active bridge converter.
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Figure 3. Theoretical waveforms of the 3P-DAB converter under 0 < Φ < π/3.
Figure 3. Theoretical waveforms of the 3P-DAB converter under 0 < Φ < π/3.
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Figure 4. Equivalent circuit of S1 and S2 switching transition.
Figure 4. Equivalent circuit of S1 and S2 switching transition.
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Figure 5. Theoretical switching sequence waveform according to different dead times under the steady-state operation of the 3P-DAB converter: ① a lack of minimum current with proper dead time for ZVS, ②-1 a sufficient current with a long dead time for ZVS, ②-2 an insufficient current with a long dead time for ZVS, and ③ proper current and proper dead time for ZVS.
Figure 5. Theoretical switching sequence waveform according to different dead times under the steady-state operation of the 3P-DAB converter: ① a lack of minimum current with proper dead time for ZVS, ②-1 a sufficient current with a long dead time for ZVS, ②-2 an insufficient current with a long dead time for ZVS, and ③ proper current and proper dead time for ZVS.
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Figure 6. Abnormal phase current waveforms of the 3P-DAB converter under extremely light load conditions. (a) Theoretical waveform. (b) Experimental results of abnormal results.
Figure 6. Abnormal phase current waveforms of the 3P-DAB converter under extremely light load conditions. (a) Theoretical waveform. (b) Experimental results of abnormal results.
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Figure 7. Measured waveform of the switch voltage of the HVS and the LVS depending on different dead times, as in Figure 5, for the 3P-DAB converter: (a) ① in Figure 5, (b) ②-1 in Figure 5, (c) ②-2 in Figure 5, and (d) ③ in Figure 5.
Figure 7. Measured waveform of the switch voltage of the HVS and the LVS depending on different dead times, as in Figure 5, for the 3P-DAB converter: (a) ① in Figure 5, (b) ②-1 in Figure 5, (c) ②-2 in Figure 5, and (d) ③ in Figure 5.
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Figure 8. Simulation results for phase current waveforms of a 3P-DAB converter under the same light load conditions according to dead time: (a) 2 μs and (b) 1.25 μs.
Figure 8. Simulation results for phase current waveforms of a 3P-DAB converter under the same light load conditions according to dead time: (a) 2 μs and (b) 1.25 μs.
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Figure 9. Control algorithm of the overall 3P-DAB converter including proposed dead-time control.
Figure 9. Control algorithm of the overall 3P-DAB converter including proposed dead-time control.
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Figure 10. Comparison of dead-time control between the conventional dynamic dead-time control and proposed practical dead-time control with the theoretical required dead time based on Table 1.
Figure 10. Comparison of dead-time control between the conventional dynamic dead-time control and proposed practical dead-time control with the theoretical required dead time based on Table 1.
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Figure 11. Photograph: Test bench for the experiment and 25 kW prototype 3P-DAB converter.
Figure 11. Photograph: Test bench for the experiment and 25 kW prototype 3P-DAB converter.
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Figure 12. Photographs of experimental set-up: (a) Bi-directional power supply. (b) Resistance load bank.
Figure 12. Photographs of experimental set-up: (a) Bi-directional power supply. (b) Resistance load bank.
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Figure 13. Experimental waveforms of the 3P-DAB converter based on the different dead-time control algorithms under the same power conditions (850 W): (a) conventional dead-time control and (b) proposed dead-time control.
Figure 13. Experimental waveforms of the 3P-DAB converter based on the different dead-time control algorithms under the same power conditions (850 W): (a) conventional dead-time control and (b) proposed dead-time control.
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Figure 14. Efficiency results of the 3P-DAB converter based on the different dead-time control algorithms under the same power conditions (850 W): (a) conventional dead-time control and (b) proposed dead-time control.
Figure 14. Efficiency results of the 3P-DAB converter based on the different dead-time control algorithms under the same power conditions (850 W): (a) conventional dead-time control and (b) proposed dead-time control.
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Figure 15. Experimental waveforms of the 3P-DAB converter in steady-state operation using the proposed controller: (a) 1 kW, (b) 3 kW, (c) 15 kW, and (d) 25 kW.
Figure 15. Experimental waveforms of the 3P-DAB converter in steady-state operation using the proposed controller: (a) 1 kW, (b) 3 kW, (c) 15 kW, and (d) 25 kW.
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Figure 16. Efficiency comparison curve between the conventional dead-time control and the proposed dead-time control algorithm.
Figure 16. Efficiency comparison curve between the conventional dead-time control and the proposed dead-time control algorithm.
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Figure 17. Steady-state operation waveform according to output power under light load conditions: (a) 1 kW and (b) 2.5 kW.
Figure 17. Steady-state operation waveform according to output power under light load conditions: (a) 1 kW and (b) 2.5 kW.
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Table 1. Converter Specification for Experiments.
Table 1. Converter Specification for Experiments.
SymbolQuantityValue
VinInput voltage550 V
VoutOutput voltage278 V
mVoltage gain0.986
fSWSwitching frequency8 kHz
Po,ratedRated power25 kW
Lc,xCoupling inductance43.7 μH (CH740060)
CoesEffective output capacitance of Power switches4 nF
NLTurns13
-Transformer materialNano-crystalline
NP:NSTurn ratio39:20
RS,HVSParasitic resistor on LVS850 mΩ
RS,LVSParasitic resistor on HVS380 mΩ
CofOutput filter capacitance1.4 mF
ESREquivalent series resistance138 mΩ
tdDead timeVariable
-ControllerTMS320F28335
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MDPI and ACS Style

Choi, H.-J.; Ahn, J.-H.; Jung, J.-H.; Song, S.-G. Practical Dead-Time Control Methodology of a Three-Phase Dual Active Bridge Converter for a DC Grid System. Energies 2023, 16, 7679. https://doi.org/10.3390/en16227679

AMA Style

Choi H-J, Ahn J-H, Jung J-H, Song S-G. Practical Dead-Time Control Methodology of a Three-Phase Dual Active Bridge Converter for a DC Grid System. Energies. 2023; 16(22):7679. https://doi.org/10.3390/en16227679

Chicago/Turabian Style

Choi, Hyun-Jun, Jung-Hoon Ahn, Jee-Hoon Jung, and Sung-Geun Song. 2023. "Practical Dead-Time Control Methodology of a Three-Phase Dual Active Bridge Converter for a DC Grid System" Energies 16, no. 22: 7679. https://doi.org/10.3390/en16227679

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