Adaptive Fast Integral Terminal Sliding Mode Control Strategy Based on Four-Switch Buck–Boost Converters

Abstract

With the rapid development of electronic power systems, DC-DC converters are widely used, including the Four-Switch Buck–Boost (FSBB) converter, which has a unique advantage in scenarios with a wide range of voltage inputs. To improve the response speed and anti-interference capability of the FSBB converter, this paper proposes an adaptive global fast integral terminal sliding mode control method. Through an in-depth analysis of the fundamental characteristics of the FSBB converter, this study employed a global fast integral terminal sliding mode controller combined with an adaptive algorithm to significantly improve the dynamic performance and robustness of the FSBB converter. The simulation and experimental results show that the proposed method could track the reference voltage quickly and accurately in different modes, exhibiting excellent system robustness compared to conventional sliding mode control, terminal sliding mode control, and PID control methods.

1. Introduction

With the rapid development of power electronics, the demand for DC-DC converters is increasing in various applications [1,2]. DC-DC converters have been widely used in multiple integrated power systems [3,4], such as photovoltaic and wind power generation [5] and super-capacitor and battery power management in hybrid vehicles [6], electric cars [7], and DC microgrid systems [8] due to their low cost, simple structure, and high power efficiency. However, as the application requirements increase, the limitations of conventional DC-DC converters in terms of efficiency, dynamic response, and stability are gradually becoming apparent.

The traditional DC-DC converter is challenging to drive due to the high number of passive components and the opposite polarity of the input and output, which significantly affect the converter’s efficiency. The Four-Switch Buck–Boost (FSBB) converter [9] addresses these issues with its nonlinear characteristics, simple structure, low voltage stress on the switching components, identical input and output polarity, fewer passive components, and wide input voltage range. These features enhance the system’s efficiency and reliability.

Researchers mainly divide FSBB control strategies into two categories [10,11]. The first is the quadrilateral inductor current control mode [12], which achieves zero-voltage conduction of all switching tubes but produces high switching losses. The second is multi-mode control [13], which is simple to implement and offers high energy transfer efficiency. Multi-mode control methods are subdivided into three-mode, two-mode, and single-mode control, with the converter selecting the appropriate mode of operation by comparing the input and output voltages. The research objectives for FSBB [14] include achieving smooth mode switching and optimal conversion efficiency. To optimize mode switching, researchers typically rely on multi-mode control, focusing on the overall control design to improve both the steady-state and dynamic responses of the system. For efficiency optimization, they generally employ hard-switching and soft-switching control modes [15] to minimize converter losses.

Intelligent algorithms such as PID [16], sliding mode control [17], and fuzzy logic control [18] are widely incorporated in nonlinear systems to prevent environmental factors from affecting the systems’ performance. The FSBB converter also requires the design of an effective control method. Cai, J. et al. [19] proposed a control method that combines PID control with bipolar double-zero compensation applied to the FSBB controller. This method improves the system’s dynamic responses and steady-state accuracy. Komurcugil, H. et al. [20] proposed an FSBB-based Lyapunov function control strategy that employs independent control equations for the two modes. This strategy avoids the mode detection process while enabling smooth mode switching. To facilitate good transient performance and smooth mode switching, Ullah, Q. et al. [21] proposed sliding mode control based on FSBB, which ensures that the FSBB converter can accurately track the output voltage in different operating modes and achieve smooth transitions between them. This proves the feasibility of the sliding mode control method applied to the FSBB converter.

The sliding mode variable structure control method is characterized by structural versatility, control discretization, and system nonlinearity, allowing it to quickly adapt to different operating conditions while ensuring system stability and performance. Tan, S.C. et al. [22] proposed a sliding mode control method with fixed-frequency PWM. The experimental results show that this method can track the reference voltage under large loads and linear disturbances. To improve the steady-state performance, Ardhenta, L. et al. [23] proposed a Buck-converter-based PI-SMC controller to enhance the Buck converter’s accuracy. To mitigate the effects of parameter uncertainty, studies [24,25] have adjusted the switching gain in real time to reduce jitter by combining sliding mode control with an adaptive algorithm. Liu, P. et al. [26] introduced an adaptive discrete sliding mode control method for a Buck converter, which improves the tracking accuracy using a discrete disturbance observer. Zambrano-Prada, D. et al. [27] proposed adaptive sliding mode control for a Boost converter. They combined the switching term of sliding mode control with an adaptive algorithm by tracking the integral of the output voltage error, resulting in a system with a short settling time and good steady-state performance. Linares-Flores et al. [28] proposed an adaptive sliding mode control method that combines a hyperbolic tangent function with an extended state observer and applies them to a Buck–Boost converter to suppress jitter. However, this approach sacrifices some system robustness.

Chang, Y. et al. [29] proposed applying non-vector-terminated sliding mode control to the Boost converter to improve the algorithm’s convergence speed. Based on this, an extended state observer [30] was introduced to further reduce the system jitter and improve the system’s robustness and response speed. Liu, Z. et al. [31] proposed the application of fixed-time, observer-based, non-singular terminal sliding mode control to a Buck converter, which employs a new second-order, fixed-time convergence law to improve the system’s immunity to disturbances. The tracking performance of the output voltage is further enhanced [32] using a continuous, non-singular terminal sliding mode control based on a finite-time disturbance observer. To further improve the convergence speed, Malge, S.V. et al. [33] proposed a global non-singular, fast terminal sliding mode control, which effectively enhances the system’s stability in the face of disturbances and enables fast dynamic responses and stable steady-state performance. To enable the system to converge in a finite time, Kaifei, Z. et al. [34] proposed a fast integral terminal sliding mode control method applied to permanent magnet synchronous motors. This method solves the problems of the terminal sliding mode’s singularity and the integral sliding mode’s inability to converge in a finite time and effectively improves the system’s dynamic characteristics.

Table 1. Performance analysis. Controller performance indicators.

References	Publication Year	Control Methods	Control Model	Challenges
Cai, J. [19]	2021	PID-2p2z	FSBB	More extended system settling times.
Ullah, Q. [21]	2023	Sliding mode control	FSBB	The systematic error can no longer converge in a finite time.
Liu, P. [26]	2023	Adaptive sliding mode control	Buck	Combining observers improves tracking accuracy but increases design complexity.
Zambrano-Prada, D. [27]	2023	Adaptive sliding mode control	Boost	The hyperbolic tracking error slows down the system’s responses.
Liu, Z. [31]	2023	Terminal sliding mode control	Buck	A second-order, fixed-time convergence law improves the algorithm complexity.
Wang, Z. [32]	2020	Terminal sliding mode control	Boost	A finite-time perturbation observer increases the complexity of the design structure.
Kaifei, Z. [34]	2022	Terminal sliding mode control	permanent magnet synchronous motor	Fast integral terminal sliding mode control effectively improves the dynamic characteristics of the system but cannot cope with variable operating environments.

provides a summary analysis of the above literature. The current multi-mode control strategies applied to FSBB converters use mainly PID algorithm control and traditional sliding mode control, which renders the system error unable to complete the convergence in a limited time. The control performance and system stability are affected when encountering unknown disturbances or parameter uncertainty. To address the above problems, this paper proposes combining the global fast integrating terminal sliding mode control with an adaptive algorithm to design an adaptive global fast integrating terminal sliding mode control (ATSMC) to obtain a faster response speed and stronger system robustness. The simulation and experimental results show that this control method can significantly improve the response speed and steady-state performance while achieving smooth mode switching.

2. Working Principle and Modeling of FSBB

2.1. Operational Principle

The FSBB converter is formed by cascading Buck and Boost circuits, as shown in Figure 1. The left bridge arms Q1 and Q2 are the components of the Buck circuit. Q1 is the main controller, with a duty cycle of d1. Q2 is complementary to Q1 and has a duty cycle of 1 – d₁. The right bridge arms Q3 and Q4 form the Boost circuit. Q4 is the main controller, with a duty cycle of d₂, while Q3 and Q4 are complementary. Q3 has a duty cycle of 1 – d₂. According to the principle of volt-second balance, the input–output relationship of FSBB is as follows:

$$\mathrm{M}={\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}}{{\mathrm{V}}_{\mathrm{i}}}}={\displaystyle \frac{{\mathrm{d}}_1}{{1-\mathrm{d}}_2}}$$

(1)

Equation (1) shows that the converter’s voltage ratio is related to d₁ and d₂, and d1 and d₂ are independent of each other. The design expectation is to obtain a stable output voltage over a wide input voltage range.

2.2. Modeling Analysis

The output voltage is lower than the input voltage for the Buck mode. In a steady-state control condition, Q1 = d₁, and Q3 is normally open. Figure 2 shows one cycle of operation in the Buck mode. In Figure 2a, the input voltage source to the inductor-charging IL increases, and in Figure 2b, the inductor to the load-discharging IL decreases. The combination of the two can be used to obtain the Buck circuit, and the KCL, the KVL, and the principle of volt-second balance can be obtained with the following differential equations:

$${\displaystyle \frac{\mathrm{d}{\mathrm{I}}_{\mathrm{L}}}{\mathrm{dt}}}={\displaystyle \frac{1}{\mathrm{L}}}({\mathrm{d}}_1{\mathrm{V}}_{\mathrm{i}} -{\mathrm{V}}_{\mathrm{o}})$$

(2)

$${\displaystyle \frac{\mathrm{d}{\mathrm{V}}_{\mathrm{o}}}{\mathrm{dt}}}={\displaystyle \frac{1}{\mathrm{C}}}({\mathrm{I}}_{\mathrm{L}} -{\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}}{\mathrm{R}}})$$

(3)

The Boost mode is used when the input voltage is lower than the output voltage. In a steady-state control condition, Q4 = d₂, and Q2 is normally off. Figure 3 shows one cycle of operation in the Boost mode. In Figure 3a, the inductor and the power-supply-discharging IL decrease at the same time. In Figure 3b, the capacitor is discharged through the load. The combination of the two can be used to obtain the Boost circuit, and the following differential equations can be obtained from the KCL, KVL, and volt–second equilibrium:

$${\displaystyle \frac{\mathrm{d}{\mathrm{I}}_{\mathrm{L}}}{\mathrm{dt}}}=-{\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}\left(1-{\mathrm{d}}_2\right)}{\mathrm{L}}}+{\displaystyle \frac{{\mathrm{V}}_{\mathrm{i}}}{\mathrm{L}}}$$

(4)

$${\displaystyle \frac{\mathrm{d}{\mathrm{V}}_{\mathrm{o}}}{\mathrm{dt}}}={\displaystyle \frac{{\mathrm{I}}_{\mathrm{L}}\left(1-{\mathrm{d}}_2\right)}{\mathrm{C}}} - {\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}}{\mathrm{RC}}}$$

(5)

3. Controller Design

3.1. Buck Mode

The voltage tracking error is defined as follows:

$$\mathrm{e}={\mathrm{x}}_1-{\mathrm{x}}_{\mathrm{ref}}$$

(6)

where x₁ is the output voltage and x_ref is the reference voltage. By combining Equation (6) with Equations (2) and (3), the derivative of the voltage error (x₂) can be obtained as follows:

$${\mathrm{x}}_2=\dot{\mathrm{e}}=\dot{{\mathrm{x}}_1}={\displaystyle \frac{1}{\mathrm{C}}}({\mathrm{I}}_{\mathrm{L}}–{\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}}{\mathrm{R}}})$$

(7)

Commonly used sliding mode controllers typically use linear sliding mode surfaces:

$${\mathrm{s}}_{\mathrm{t}}\left(\mathrm{t}\right)=\dot{\mathrm{e}\left(\mathrm{t}\right)}+\mathsf{\lambda }\mathrm{e}\left(\mathrm{t}\right)$$

(8)

where λ is a positive constant. Assuming that there is a time t, which makes S_t converge to zero, we can obtain e(t) = e (0)e^λt. When e (0) is not infinite, the error e(t) converges to infinity, but this reduces the dynamic performance of the controller. Therefore, in this paper, a global fast integrating terminal sliding mode surface is used:

$$\mathrm{s}=\dot{\mathrm{e}}+{\mathsf{\lambda }}_1\mathrm{e}+{\mathsf{\lambda }}_{2 }{\int }_0^{\mathrm{t}}{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}(\tau ){\mathrm{d}}_{\tau }$$

(9)

In this equation, λ₁ and λ₂ are constants called sliding mode coefficients, which determine the decay rate of the tracking error, while p and q are positive odd numbers that satisfy 1 < p/q < 2. This sliding mode surface ensures that the voltage error converges to zero in a finite time, resulting in voltage stabilization in a finite time. When the voltage error converges completely, s = 0. Based on Equation (9), we can obtain

$$\dot{\mathrm{e}}+{\mathsf{\lambda }}_1\mathrm{e}+{\mathsf{\lambda }}_{2 }{\int }_0^{\mathrm{t}}{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}(\tau ){\mathrm{d}}_{\tau }=0$$

(10)

which can be collated to obtain

$$\ddot{{\mathrm{e}}_1}=-{\mathsf{\lambda }}_1\dot{{\mathrm{e}}_1}-{\mathsf{\lambda }}_{2 }{\mathrm{e}}_1^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}$$

(11)

where ${\mathrm{e}}_1={\int }_0^{\mathrm{t}}\mathrm{e}(\tau ){\mathrm{d}}_{\tau }$. Further simplification yields

$$\dot{{\mathrm{e}}_1}\mathrm{d}\dot{{\mathrm{e}}_1}=-\left({\mathsf{\lambda }}_1\dot{{\mathrm{e}}_1}-{\mathsf{\lambda }}_{2 }{\mathrm{e}}_1^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}\right)\mathrm{d}{\mathrm{e}}_1$$

(12)

Integrating both sides of the above equation yields:

$${\int }_0^{\dot{{\mathrm{e}}_1\left(0\right)}}\dot{{\mathrm{e}}_1}\mathrm{d}\dot{{\mathrm{e}}_1}={\int }_0^{{\mathrm{e}}_1\left(0\right)}\left(-{\mathsf{\lambda }}_1\dot{{\mathrm{e}}_1}–{\mathsf{\lambda }}_{2 }{\mathrm{e}}_1^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}\right)\mathrm{d}{\mathrm{e}}_1$$

(13)

Assuming that the time for the voltage error to converge to zero is T_s and the initial value of the error is bounded and non-zero, i.e., e₁(0) is bounded, solving Equation (13) yields

$${\int }_0^{{\mathrm{T}}_{\mathrm{s}}}{\mathsf{\lambda }}_2\dot{{\mathrm{e}}_1^2}\mathrm{dt}={0.5\mathsf{\lambda }}_1\dot{{\mathrm{e}}_1^2}\left(0\right)+{\displaystyle \frac{\mathrm{q}{\mathsf{\lambda }}_3}{\mathrm{p}+\mathrm{q}}}{\mathrm{e}}_1^{{\displaystyle \frac{\mathrm{p}+\mathrm{q}}{\mathrm{q}}}}\left(0\right)$$

(14)

Then, the voltage error convergence time (Ts) is

$${\mathrm{T}}_{\mathrm{s}}={\mathsf{\lambda }}_1{\mathrm{e}}^2\left(0\right)/[0.5{\mathrm{e}}^2\left(0\right)+{\displaystyle \frac{\mathrm{q}{\mathsf{\lambda }}_2}{\mathrm{p}+\mathrm{q}}}{\mathrm{e}}_1^{{\displaystyle \frac{\mathrm{p}+\mathrm{q}}{\mathrm{q}}}}\left(0\right)]$$

(15)

Since the initial value of the voltage error is bounded and non-zero, the convergence time is also bounded, i.e., the voltage error satisfies finite-time convergence. The convergence time is adjusted by adjusting the sliding mode parameters. By combining Equation (9) and Equations (2) and (3), the global fast integrating terminal sliding mode control law is obtained as follows:

$${\mathrm{u}}_{\mathrm{eq}}={\displaystyle \frac{\mathrm{CL}}{{\mathrm{V}}_{\mathrm{i}}}}[-{\mathsf{\lambda }}_2{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}-{\mathsf{\lambda }}_1{\mathrm{x}}_2-{\displaystyle \frac{1}{\mathrm{CR}}}{\mathrm{x}}_2+{\displaystyle \frac{{\mathrm{x}}_1}{\mathrm{CL}}}]$$

(16)

where u_eq is the equivalent control quantity when the system works on the sliding mode surface. When the system does not operate on the sliding mode surface, it is necessary to add switching control on this basis. The switching control equation is

$${\mathrm{u}}_{\mathrm{sw}}={\displaystyle \frac{\mathrm{CL}}{{\mathrm{V}}_{\mathrm{i}}}}\mathrm{ksign}\left(\mathrm{s}\right)$$

(17)

where k is a constant, and the duty cycle output for the Buck mode is

$$\mathrm{u}={\mathrm{u}}_{\mathrm{eq}}+{\mathrm{u}}_{\mathrm{sw}}={\displaystyle \frac{\mathrm{CL}}{{\mathrm{V}}_{\mathrm{i}}}}[–{\mathsf{\lambda }}_2{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}–{\mathsf{\lambda }}_1{\mathrm{x}}_2–{\displaystyle \frac{1}{\mathrm{CR}}}{\mathrm{x}}_2+{\displaystyle \frac{{\mathrm{x}}_1}{\mathrm{CL}}}+\mathrm{ksign}\left(\mathrm{s}\right)]$$

(18)

Equation (18) is the control law for the Buck mode, and the output u is the duty cycle, i.e., d1. However, in practical applications, there are often unknown external disturbances.

$$\dot{\mathrm{s}}={\mathsf{\lambda }}_1\dot{\mathrm{e}}+\ddot{\mathrm{e}}+{\mathsf{\lambda }}_{2 }{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}+\mathrm{w}\left(\mathrm{z}\right)$$

(19)

w(z) is defined as the set of all disturbances, including input disturbances, load disturbances, and external disturbances, which need to be corrected using the control law:

$$\mathrm{u}={\mathrm{u}}_{\mathrm{eq}}+{\mathrm{u}}_{\mathrm{asw}}$$

(20)

U_eq is the same as Equation (16), and u_asw is an adaptive control input designed as follows:

$${\mathrm{u}}_{\mathrm{asw}}={\displaystyle \frac{\mathrm{CL}}{{\mathrm{V}}_{\mathrm{i}}}}\widehat{\mathrm{k}}\mathrm{sign}\left(\mathrm{s}\right)$$

(21)

where $\widehat{\mathrm{k}}$ is the adaptive gain, a is the adaptive gain, and it is assumed that there is a positive real number (k_d) such that ${\mathrm{u}}_{\mathrm{asw}}={\displaystyle \frac{\mathrm{CL}}{{\mathrm{V}}_{\mathrm{i}}}}{\mathrm{k}}_{\mathrm{d}}\mathrm{sign}\left(\mathrm{s}\right)$ is the final, i.e., steady-state, value of u_asw. K_d must satisfy the following condition:

k_d > w(z)

(22)

The adaptive gain derivative of the design is

$$\dot{\widehat{\mathrm{k}}}=\mathsf{\eta }\left|\mathrm{s}\right|$$

(23)

where η is called the adaptive gain coefficient and η > 0, which determines the convergence speed of $\widehat{\mathrm{k}}$ when the value of η is reasonable. $\widehat{\mathrm{k}}$ can obtain the steady-state value before the system reaches the sliding mode so as not to affect the steady-state performance of the system.

The purpose of the global fast adaptive integral terminal sliding mode is mainly to make the system function converge to zero in a finite time so that the system can obtain the estimated value of the disturbance boundary ($\widehat{\mathrm{k}}$), enhance its robustness, and achieve a fast and accurate response. Next, the stability of the controller is verified.

The adaptive gain error is defined as follows:

$$\tilde{\mathrm{k}}=\widehat{\mathrm{k}}-{\mathrm{k}}_{\mathrm{d}}$$

(24)

The Lyapunov function derivative is

$$\begin{gathered} \dot{\mathrm{V}}=\mathrm{s}\dot{\mathrm{s} }+{\displaystyle \frac{1}{\mathsf{\eta }}}\tilde{\mathrm{k}}\dot{\tilde{\mathrm{k}}} \\ =\mathrm{s}\left(\mathrm{w}\left(\mathrm{z}\right) -\widehat{\mathrm{k}}\mathrm{sign}\left(\mathrm{s}\right)\right)+\left(\widehat{\mathrm{k}}-{\mathrm{k}}_{\mathrm{d}}\right)\mathrm{s}\mathrm{sign}\left(\mathrm{s}\right) \\ =\mathrm{s}\times \mathrm{w}\left(\mathrm{z}\right)– {\mathrm{k}}_{\mathrm{d}}\left|\mathrm{s}\right| \\ \text{<}0 \end{gathered}$$

(25)

Equation (22) shows that the controller is stable for a finite time and that the sliding variables converge to zero in a finite time, which satisfies the stability requirement.

3.2. Boost Mode

Since the Boost mode of FSBB has the characteristics of a non-minimum phase system, the voltage error cannot be tracked directly. For this paper, we chose the system’s energy storage during the operation as the tracking target to control the voltage indirectly. Since the output voltage is equal to the capacitor voltage, we obtained Equation (26):

$$\mathrm{y}={\displaystyle \frac{1}{2}}\mathrm{C}{\mathrm{V}}_{\mathrm{o}}^2+{\displaystyle \frac{1}{2}}\mathrm{L}{\mathrm{I}}_{\mathrm{L}}^2$$

(26)

When the system reaches the steady state, the stored energy (y) converges to the reference value (y_ref). The inductor current and output voltage also converge to the reference current and reference voltage. At the same time, the output voltage, the inductor current, and the system’s stored energy are constant, and the reference inductor current can be obtained from the reference voltage:

$${\mathrm{I}}_{\mathrm{Lref}}={\displaystyle \frac{{\mathrm{V}}_{\mathrm{ref}}^2}{{\mathrm{V}}_{\mathrm{i}}\mathrm{R}}}$$

(27)

The energy storage error is defined as follows:

$$\mathrm{e}=\mathrm{y}-{\mathrm{y}}_{\mathrm{ref}}$$

(28)

where y_ref is the reference stored energy. The same global fast integrating terminal sliding mode surface used in the Buck mode is adopted:

$$\mathrm{s}=\dot{\mathrm{e}}+{\mathsf{\lambda }}_1\mathrm{e}+{\mathsf{\lambda }}_{2 }\int {\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}{\mathrm{d}}_{\mathrm{t}}$$

(29)

where λ₁ and λ₂ are constants called sliding mode coefficients, which determine the decay rate of the tracking error, while p and q are positive odd numbers that satisfy 1 < p/q < 2. This sliding mode surface is demonstrated in Equation (15). It ensures that the error converges to zero and a stable output voltage is achieved in a finite time.

Combining Equations (4), (5), (28), and (29) yields the equivalent control law:

$${\mathrm{u}}_{\mathrm{eq}}={\displaystyle \frac{\mathrm{CRL}}{(2\mathrm{L}{\mathrm{I}}_{\mathrm{i}}+{\mathrm{V}}_{\mathrm{i}}\mathrm{RC}){\mathrm{V}}_{\mathrm{o}}}}[{\mathsf{\lambda }}_2({\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}})+{\mathsf{\lambda }}_1\left({\mathrm{V}}_{\mathrm{i}}{\mathrm{I}}_{\mathrm{i}}-{\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}^2}{\mathrm{R}}}\right)+{\displaystyle \frac{{\mathrm{V}}_{\mathrm{i}}^2}{\mathrm{L}}}+{\displaystyle \frac{2{\mathrm{V}}_{\mathrm{o}}^2}{{\mathrm{R}}^2\mathrm{C}}}]$$

(30)

When there is an external disturbance in the system, the derivative of the sliding mode surface function is

$$\dot{\mathrm{s}}={\mathsf{\lambda }}_2\dot{\mathrm{e}}+{\mathsf{\lambda }}_1\ddot{\mathrm{e}}+{\mathsf{\lambda }}_{3 }{\mathrm{e}}^{{\displaystyle \frac{\mathrm{p}}{\mathrm{q}}}}\mathrm{+}\mathrm{d}\left(\mathrm{z}\right)$$

(31)

Consistent with the Buck mode, d(z) is the set of all disturbances, including input disturbances, load disturbances, and external disturbances. In order for the system to achieve the sliding mode surface, a switching gain was designed, but a general switching gain is affected by external disturbances, so an adaptive gain was designed as follows:

$${\mathrm{u}}_{\mathrm{asw}}={\displaystyle \frac{\mathrm{CRL}}{\left(2\mathrm{L}{\mathrm{I}}_{\mathrm{i}}+{\mathrm{V}}_{\mathrm{i}}\mathrm{RC}\right){\mathrm{V}}_{\mathrm{o}}}}({\widehat{\mathsf{\eta }}}_1\mathrm{s}+{\widehat{\mathsf{\eta }}}_2\mathrm{sign}(\mathrm{s}))$$

(32)

where ${\widehat{\mathsf{\eta }}}_1$ and ${\widehat{\mathsf{\eta }}}_2$ are adaptive gains. Assuming that η_1d and η_2d are positive real numbers such that ${\mathrm{u}}_{\mathrm{asw}}={\displaystyle \frac{\mathrm{CRL}}{\left(2\mathrm{L}{\mathrm{I}}_{\mathrm{i}}+{\mathrm{V}}_{\mathrm{i}}\mathrm{RC}\right){\mathrm{V}}_{\mathrm{o}}}}({\mathsf{\eta }}_{1\mathrm{d}}\mathrm{s}+{\mathsf{\eta }}_{2\mathrm{d}}\mathrm{sign}(\mathrm{s}))$ is the final, i.e., steady-state, value of uasw, η_1d and η_2d satisfy the following equation:

η_1d − η_2d < d(Z) < η_1d + η_2d

(33)

The adaptive gain derivatives were designed as follows:

$${\dot{\widehat{\mathsf{\eta }}}}_1=\mathsf{\alpha }\mathrm{s}$$

(34)

$${\dot{\widehat{\mathsf{\eta }}}}_2=\mathsf{\beta }|\mathrm{s}|$$

(35)

where α, β > 0, which determines the convergence speed of ${\dot{\widehat{\mathsf{\eta }}}}_1$ and ${\dot{\widehat{\mathsf{\eta }}}}_2$ when the value of α, β is reasonable. ${\dot{\widehat{\mathsf{\eta }}}}_1$ and ${\dot{\widehat{\mathsf{\eta }}}}_2$ are able to obtain the steady-state value before the system reaches the sliding mode. Therefore, they do not affect the steady-state performance of the system.

The error of the adaptive gain is defined as follows:

$${\tilde{\mathsf{\eta }}}_1={\widehat{\mathsf{\eta }}}_1-{\mathsf{\eta }}_{1\mathrm{d}}$$

(36)

$${\tilde{\mathsf{\eta }}}_2={ \widehat{\mathsf{\eta }}}_2-{\mathsf{\eta }}_{2\mathrm{d}}$$

(37)

The derivative of the Lyapunov function was chosen to be

$$\begin{gathered} \dot{\mathrm{V}}=\mathrm{s}\dot{\mathrm{s} }+{\displaystyle \frac{1}{\mathsf{\alpha }}}{\tilde{\mathsf{\eta }}}_1{\dot{\tilde{\mathsf{\eta }}}}_1+{\displaystyle \frac{1}{\mathsf{\beta }}}{\tilde{\mathsf{\eta }}}_2{\dot{\tilde{\mathsf{\eta }}}}_2 \\ =\mathrm{s}\left(\mathrm{d}\left(\mathrm{z}\right)-{\widehat{\mathsf{\eta }}}_1\mathrm{s}-{\widehat{\mathsf{\eta }}}_2\mathrm{sign}\left(\mathrm{s}\right)\right)+(\left({\widehat{\mathsf{\eta }}}_1-{\mathsf{\eta }}_{1\mathrm{d}}\right)\mathrm{s})+\left({\widehat{\mathsf{\eta }}}_2-{\mathsf{\eta }}_{2\mathrm{d}}\right)\mathrm{s} \mathrm{s}\mathrm{i}\mathrm{gn}\left(\mathrm{s}\right) \\ =\mathrm{s}\times \mathrm{d}\left(\mathrm{z}\right)-({\mathsf{\eta }}_{1\mathrm{d}}\mathrm{s}+{\mathsf{\eta }}_{2\mathrm{d}}\left|\mathrm{s}\right|) \\ <0 \end{gathered}$$

(38)

Based on Equation (33), the Lyapunov function is negative and definite, while the Boost mode is asymptotically stable. Meanwhile, the sliding mode function(s) and the adaptive gain error (${\tilde{\mathsf{\eta }}}_1 \mathrm{and} {\tilde{\mathsf{\eta }}}_2$) converge to zero in a finite time, which satisfies the stability requirement.

4. Simulation Results

The proposed control method was validated via simulation using the MATLAB/Simulink R2022a. The conventional PID control was designed in reference [20], and the conventional sliding mode control (SMC) was designed in reference [22]. The simulation results of these two methods were compared with those of the proposed global fast integral terminal sliding mode control (TSMC) and adaptive global fast integral terminal sliding mode control (ATSMC). In order to cope with sudden load changes that may occur during system operation, the load (R) was designed as shown in Equation (39):

$$\mathrm{R}={\displaystyle \frac{{\mathrm{V}}_{\mathrm{o}}}{{\mathrm{I}}_{\mathrm{o}}}}$$

(39)

A block diagram of the Boost mode control based on ATSMC is shown in Figure 4 with the following parameters: λ1 = 12,000, λ2 = 4,000,000, η1 = −6000, η2 = –12,000,000, p = 3, and q = 5.

A block diagram of the Buck mode control based on ATSMC is shown in Figure 5 with the following parameters: λ1 = 8,000,000, λ2 = 2000, k = 8,000,000, p = 3, and q = 5.

Figure 6 shows the output voltage responses of the four control algorithms in Buck mode. When the reference voltage changed, PID and SMC presented ripples and slow responses, while TSMC and ATSMC could smoothly regulate the voltage to the reference value in a shorter time. Figure 7 shows the output voltage responses of TSMC and ATSMC in Boost mode; both had similar response speeds, but voltage regulation with ATSMC was smoother with less overshoot.

The robustness of the Buck mode load mutation was tested when the input voltage was 30 V, the output voltage was 18 V, and the load resistance was adjusted from 40 Ω to 20 Ω in 0.049 s. The experimental results are shown in Figure 8. The PID had the largest voltage fluctuation and the longest settling time, and the conventional SMC had the largest steady-state error. The TSMC and ATSMC had similar voltage fluctuations, but the ATSMC had less ripple.

Figure 9 presents the results of a robustness test with a sudden load change in Boost mode at an input voltage of 20 V and an output voltage of 30 V. Again, the load resistance was adjusted from 40 Ω to 20 Ω at 0.049 s. As shown in Figure 9, the TSMC’s voltage fluctuation and settling time were significant, and the ATSMC had the smallest voltage fluctuation and the shortest settling time.

The robustness of the Buck mode input voltage step change was tested. The input voltage was adjusted from 30 V to 24 V in 0.049 s, and the experimental results are shown in Figure 10. It can be seen that the PID had the largest voltage fluctuation and the longest settling time, while the SMC had a large steady-state error and a large overshoot. The TSMC and ASMC had similar voltage fluctuations, but the ATSMC had a shorter settling time.

The robustness of the step change in the input voltage in Boost mode was tested by regulating the input voltage from 20 V to 24 V at 0.03 s. Then, it was regulated to 18 V at 0.065 s. The experimental results are shown in Figure 11, which shows that the settling time and ripples of the ATSCM were smaller.

To test the performance of the FSBB converter with the ATSMC algorithm during mode switching, we set the output voltage to a constant 25 V and regulated the input voltage from 30 V to 20 V within 0.05 s. The experimental results are shown in Figure 12. The ATSMC algorithm ensured that the converter remained stable and responded quickly during mode switching.

Figure 13 shows the output response of mode switching when the input voltage was constant. When the mode changed, the output response remained fast and stable, tracking the reference voltage. The ATSMC-based converter could achieve smooth mode switching, as shown in Figure 12 and Figure 13.

Performance metrics such as the settling time (ST), load regulation rate, and linear regulation rate were used to evaluate the algorithm’s performance, and the corresponding performance parameters are shown in the table above. The settling time is the time it takes for the output voltage to reach the reference voltage from its initial state. We obtain it by measuring the time it takes for the output voltage to rise from zero volts to the reference voltage. The load regulation rate and linear regulation rate represent the degree of system stability, and the smaller their values, the more robust the system. Equation (40) is the formula for the load regulation rate with the following parameters: Vin = 24 V, R_max = 40 Ω, R_min = 10 Ω, and R_num = 20 Ω, and Equation (41) is the formula for the linear regulation rate with the following parameters: R = 20 Ω, Vin_max = 30 V, Vin_min = 10 V, and Vin_num = 24 V.

$$\mathrm{Load} \mathrm{Regulation}={\displaystyle \frac{{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{R}}_{\max }\right)-{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{R}}_{\min }\right)}{{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{R}}_{\mathrm{num}}\right)}}\times 100\%$$

(40)

$$\mathrm{Line} \mathrm{Regulation}={\displaystyle \frac{{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{Vin}}_{\max }\right)-{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{Vin}}_{\min }\right)}{{\mathrm{V}}_{\mathrm{O}}\left({\mathrm{Vin}}_{\mathrm{num}}\right)}}\times 100\%$$

(41)

The data for the traditional control methods PID and SMC were reproduced and tested based on references [19,21], respectively, while the data for fuzzy logic control (FLC) were calculated based on references [35,36].

Table 2. Controller performance indicators.

Test Algorithm	Mode	ST (ms)	Load Regulation	Line Regulation
FLC [35] PID [19] SMC [21] TSMC	Buck	10	1.84%	0.96%
		21	2.3%	1.04%
		1.31 0.4	1.67% 0.33%	0.77% 0.083%
ATSMC		0.51	0.25%	0.027%
FLC [36] PID [19] SMC [21]	Boost	17	2.3%	1.1%
		19 5	1.6% 0.9%	1.2% 0.6%
TSMC ATSMC		2.5	0.16%	0.083%
		2	0.03%	0.03%

shows that the load regulation rates and linear regulation rates of the traditional control methods PID, FLC, and SMC were all around 1%. Specifically, the settling times (ST) of PID and FLC were approximately 20 ms, while for SMC, the ST was around 1 ms. Compared to the traditional control methods, the proposed ATSMC reduced the ST by at least 1 ms and decreased the load regulation rate and linear regulation rate by at least 1%. Therefore, the ATSMC proposed in this paper had the advantage of a faster response time and demonstrated superior performance in the load regulation and linear regulation.

5. Board Verification

To further verify the superiority of the proposed control algorithm, an experimental platform was built in the laboratory, as shown in Figure 14. This platform consisted of an FSBB development board, a DC power supply, a reference voltage sliding relay, an auxiliary voltage, a sampling circuit, a load resistor, etc., and its parameters are shown in

Table 3. Experimental device circuit parameters.

Description	Symbol	Nominal Value
Output Voltage	Vo	5–48 V
Input Voltage	Vin	10–30 V
Inductance	L	22 uH
Capacitance	C	440 uF
Minimum Load Resistance	R(min)	10 Ω
Maximum Load Resistance	R(max)	30 Ω
Switch Frequency	Fs	200 kHz

.

We compared the settling times (the times spent measuring the output voltage to reach the steady-state value of the reference voltage) of the conventional SMC and the ATSMC, and the results are shown in Figure 15 and Figure 16. The settling time of the traditional SMC was more than 100 ms, while the settling time of the ATSMC was around 60 ms, which was a much quicker response than that of the conventional SMC.

The experimental results of the FSBB switching tube duty cycles with step changes in the reference voltage are shown in Figure 17 and Figure 18. Since Q1 is the reverse of Q2 and Q3 is the reverse of Q4, when working in Buck mode, Q3 was usually disconnected, so only the duty cycle waveform of Q2 was intercepted, as shown in Figure 17. Considering the period with a dead-time setup, it can be seen in Figure 17 that with a change in the reference voltage, the duty cycle could respond quickly. When working in Boost mode, Q1 was usually disconnected, and the duty cycle waveform of Q4 was intercepted. The experimental results are shown in Figure 18, and the combination of Figure 17 and Figure 18 shows that the proposed algorithm had a good response speed.

In Buck mode, the input voltage underwent a step change from 20 V to 25 V, and the output voltage is shown in Figure 19. It can be seen that the proposed algorithm had excellent linear regulation. The load resistance underwent a step change from 20 Ω to 10 Ω, and Figure 20 shows the output voltage versus the duty cycle. It can be seen that the fast-response duty cycle ensured that the converter had good load regulation capability. Based on Figure 19 and Figure 20, the proposed method had excellent transient performance in Buck mode.

In Boost converter mode, when the load resistance changed abruptly from 20 Ω to 10 Ω, the output voltage and duty cycle, as illustrated in Figure 21, demonstrated that the duty cycle could be quickly and stably adjusted, allowing the output voltage to consistently follow the reference voltage. The input voltage was shifted from 20 V to 25 V, and the resulting output voltage, which remained predominantly stable, is depicted in Figure 22. Based on the observations in Figure 21 and Figure 22, it can be concluded that the proposed method displayed excellent transient performance in Boost mode.

While the output voltage was constant at 15 V, the input voltage was changed from 22 V to 12 V to verify the proposed method, and the output response is shown in Figure 23. It can be seen that when mode switching occurred in the converter, the output voltage remained smooth and stable. This also verified that the proposed control method was able to achieve smooth switching in FSBB mode.

Table 4. Board machine verification performance comparison.

Test Algorithm	Mode	ST (ms)	Load Regulation	Line Regulation
PID		188	14.5%	8.2%
SMC	Buck	141	2.2%	1.9%
ATSMC		60	0.8%	0.33%
PID SMC ATSMC	Boost	401 178	9.4% 1.54%	6.3 1.33%
		110	0.16%	0.15%

compares the performance parameters of various algorithms in the hardware-in-the-loop test. It shows that the ATSMC algorithm reduced the settling times by 127 ms and 286 ms in Buck and Boost modes, respectively, compared to the conventional PID. In addition, the ATSMC also reduced the settling time by about 60 ms compared to the traditional SMC. The ATSMC reduced the load regulation and linear regulation rates by about 10% and 5%, respectively, compared to the conventional PID and by about 2% compared to the SMC. Therefore, the proposed ATSMC had superior transient and steady-state performances compared to the traditional control methods.

6. Conclusions

To improve the interference immunity and response speed of the FSBB converter, the main contribution of this work was to design a new global fast integral terminal sliding mode control method for controlling the FSBB converter, which can effectively improve the transient performance and robustness of the system compared with the traditional control method. It can effectively allow the system to converge in a finite time. Combined with the adaptive algorithm and real-time updating of the algorithm’s parameters, it can suppress jitter without affecting the response speed, which can effectively improve the flexibility and robustness of the system under different operating conditions.

The effectiveness of the proposed controller was confirmed via simulation and an experimental setup. By simulating the conventional control algorithms with ATSMC under different operating conditions, the steady-state performance of the output voltage and the system’s output responses in the face of disturbances were tested, which are common application cases of DC-DC converters. The experimental results show that ATSMC has a better anti-interference ability and better transient characteristics than FLC, PID, SMC, and TSMC, but due to the complexity of its algorithmic structure, the execution time of a single operation is too long. The next step is to perform hardware acceleration for the algorithm to reduce the cycle time of a single operation and, at the same time, to apply the algorithm to other DC-DC converters.