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Article

Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET

1
School of Electronics Engineering, Kyungpook National University, Daegu 41566, Korea
2
Center for BioMicroSystems, Brain Science Institute, Korea Institute of Science and Technology (KIST), Seoul 02792, Korea
*
Author to whom correspondence should be addressed.
Micromachines 2019, 10(11), 749; https://doi.org/10.3390/mi10110749
Submission received: 14 October 2019 / Revised: 28 October 2019 / Accepted: 30 October 2019 / Published: 31 October 2019
(This article belongs to the Special Issue Extremely-Low-Power Devices and Their Applications)

Abstract

In this paper, a germanium-based gate-metal-core vertical nanowire tunnel field effect transistor (VNWTFET) has been designed and optimized using the technology computer-aided design (TCAD) simulation. In the proposed structure, by locating the gate-metal as a core of the nanowire, a more extensive band-to-band tunneling (BTBT) area can be achieved compared with the conventional core–shell VNWTFETs. The channel thickness (Tch), the gate-metal height (Hg), and the channel height (Hch) were considered as the design parameters for the optimization of device performances. The designed gate-metal-core VNWTFET exhibits outstanding performance, with an on-state current (Ion) of 80.9 μA/μm, off-state current (Ioff) of 1.09 × 10−12 A/μm, threshold voltage (Vt) of 0.21 V, and subthreshold swing (SS) of 42.8 mV/dec. Therefore, the proposed device was demonstrated to be a promising logic device for low-power applications.
Keywords: tunnel field-effect transistor (TFET); low power; vertical nanowire; core–shell; germanium; technology computer-aided design (TCAD) tunnel field-effect transistor (TFET); low power; vertical nanowire; core–shell; germanium; technology computer-aided design (TCAD)

Share and Cite

MDPI and ACS Style

Jang, W.D.; Yoon, Y.J.; Cho, M.S.; Jung, J.H.; Lee, S.H.; Jang, J.; Bae, J.-H.; Kang, I.M. Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET. Micromachines 2019, 10, 749. https://doi.org/10.3390/mi10110749

AMA Style

Jang WD, Yoon YJ, Cho MS, Jung JH, Lee SH, Jang J, Bae J-H, Kang IM. Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET. Micromachines. 2019; 10(11):749. https://doi.org/10.3390/mi10110749

Chicago/Turabian Style

Jang, Won Douk, Young Jun Yoon, Min Su Cho, Jun Hyeok Jung, Sang Ho Lee, Jaewon Jang, Jin-Hyuk Bae, and In Man Kang. 2019. "Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET" Micromachines 10, no. 11: 749. https://doi.org/10.3390/mi10110749

APA Style

Jang, W. D., Yoon, Y. J., Cho, M. S., Jung, J. H., Lee, S. H., Jang, J., Bae, J.-H., & Kang, I. M. (2019). Design and Optimization of Germanium-Based Gate-Metal-Core Vertical Nanowire Tunnel FET. Micromachines, 10(11), 749. https://doi.org/10.3390/mi10110749

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