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Article

EAAUnet-ILT: A Lightweight and Iterative Mask Optimization Resolution with SRAF Constraint Scheme

1
College of Integrated Circuits, Zhejiang University, Hangzhou 310058, China
2
Zhejiang ICsprout Semiconductor Co., Ltd., Hangzhou 311200, China
*
Author to whom correspondence should be addressed.
Micromachines 2025, 16(10), 1162; https://doi.org/10.3390/mi16101162
Submission received: 14 August 2025 / Revised: 18 September 2025 / Accepted: 21 September 2025 / Published: 14 October 2025
(This article belongs to the Special Issue Recent Advances in Lithography)

Abstract

With the continuous scaling-down of integrated circuit feature sizes, inverse lithography technology (ILT), as the most groundbreaking resolution enhancement technique (RET), has become crucial in advanced semiconductor manufacturing. By directly optimizing mask patterns through inverse computation rather than rule-based local corrections, ILT can more accurately approximate target design patterns while extending the process window. However, current mainstream ILT approaches—whether machine learning-based or gradient descent-based—all face the challenge of balancing mask optimization quality and computational time. Moreover, ILT often faces a trade-off between imaging fidelity and manufacturability; fidelity-prioritized optimization leads to explosive growth in mask complexity, whereas manufacturability constraints require compromising fidelity. To address these challenges, we propose an iterative deep learning-based ILT framework incorporating a lightweight model, ghost and adaptive attention U-net (EAAUnet) to accelerate runtime and reduce computational overhead while progressively improving mask quality through multiple iterations based on the pre-trained network model. Compared to recent state-of-the-art (SOTA) ILT solutions, our approach achieves up to a 39% improvement in mask quality metrics. Additionally, we introduce a mask constraint scheme to regulate complex SRAF (sub-resolution assist feature) patterns on the mask, effectively reducing manufacturing complexity.

1. Introduction

Photolithography, the most complex and costly process in semiconductor manufacturing, refers to the transfer of mask patterns onto photoresist through exposure to specific-wavelength light [1]. The resulting photoresist patterns ultimately define the circuit features etched on wafers, making lithography a pivotal step in advanced semiconductor fabrication. With the relentless progression of Moore’s Law [2], the continual scaling-down of critical dimensions has exacerbated diffraction and interference effects during lithography. These phenomena cause significant deviations between the printed patterns on silicon wafers and the original design [3], manifesting as line-end shortening, corner rounding (where right-angle structures become rounded) [4], and other distortions, as illustrated in Figure 1. Such effects are collectively termed optical proximity effects (OPEs).
To mitigate optical proximity effects (OPEs) in photolithography, optical proximity correction (OPC) techniques have been developed as a compensation strategy during mask design. Mainstream OPC approaches fall into two categories: (1) rule-based OPC [5] and (2) model-based OPC [6,7,8,9]. Rule-based OPC modifies mask patterns using pre-defined empirical rules derived from process test structures and historical data, such as adding serifs to isolated lines or applying edge bias to dense patterns. While deterministic and simulation-free, its reliance on extensive rule libraries becomes a bottleneck for complex masks, especially at advanced nodes. Model-based OPC employs lithography simulation models (e.g., optical and resist models) to predict wafer imaging results and iteratively adjusts mask patterns until simulations match target designs. By leveraging numerical optimization (e.g., gradient descent), it achieves higher accuracy than rule-based OPC for advanced nodes but requires substantial experimental data and computational resources for model calibration, often introducing modeling errors.
In contrast to conventional model-based OPC, inverse lithography technology (ILT) offers superior advantages. Model-based OPC follows a forward optimization approach, segmenting masks into edges for localized corrections, which inherently limits its solution space. ILT, however, inversely computes the optimal mask directly from the target pattern [10], enabling pixel-level optimization with higher fidelity and greater flexibility in generating sub-resolution assist features (SRAFs). This expands the process window and makes ILT particularly effective for high-pattern-repetition devices like DRAM and SRAM, reducing edge placement errors (EPEs), minimizing line-end shortening, and enhancing overall manufacturability.
The evolution of ILT implementations has witnessed a shift in research priorities. Early ILT development primarily addressed fundamental challenges including imaging accuracy, mask manufacturability, SRAF control, and process window stability. However, as ILT methodologies matured, computational efficiency emerged as the predominant bottleneck. Current ILT implementations primarily include gradient descent-based and deep-learning-based methods. In gradient descent ILT, Gao et al. [11] derived gradients for the L2 error between resist and mask images and the process variation band (PVB), formulating edge placement error (EPE) violations as sigmoid functions with closed-form gradients. Sun et al. [12] proposed a multi-resolution gradient descent to accelerate convergence, while Chen et al. [13] reduced simulation time via downsampled grids and sparse Fourier transforms, combined with Nesterov-accelerated gradients. However, gradient descent methods risk local minima convergence and remain computationally demanding.
Deep-learning-based ILT has advanced significantly to address these computational challenges. Ye et al. [14] introduced LithoGAN, an end-to-end GAN framework mapping masks to resist patterns. Jiang et al. [15] proposed Neural-ILT using a U-Net backbone with custom layers for iterative refinement. Zhu et al. [16] enhanced this via L2O-ILT, stacking adaptive custom layers for multi-objective optimization, significantly speeding up convergence. Despite these advances, the computational intensity of deep learning approaches remains a critical limitation.
Trade-offs: Gradient descent ILT relies on physical models without training data but suffers from local minima and slow convergence. Deep-learning ILT is faster but computationally intensive, and its physics-agnostic models may yield suboptimal masks with poor manufacturability. The pursuit of lightweight architectures has therefore become essential for practical ILT implementation.
Our solution: We present an ILT framework combining a lightweight EAAUnet (enhanced from AAUnet [17]) with iterative custom-layer refinement and SRAF constraints. EAAUnet integrates multi-scale convolutions and dual-attention mechanisms (channel + spatial) for efficient feature extraction, while regularization terms in custom layers improve optimization. Mask-filtering techniques enhance smoothness, and SRAF constraints balance complexity with imaging quality, specifically addressing the computational bottleneck while maintaining performance across traditional ILT challenge domains.

2. Preliminaries

2.1. Lithography Simulation Model

In the field of photolithography, Hopkins theory is widely employed for modeling the aerial image—defined as the light intensity distribution at the photoresist surface—within lithography simulation workflows. The imaging process is typically described by the Hopkins equation [18]:
I x , y = T CC f , g ; f , g O f , g O * f , g
e i 2 π [ f f x + g g y ] d f d g d f d g
where O(f′, g′) represents the Fourier transform of the mask pattern, ∗ denotes the complex conjugate operator, and TCC(f′, g′; f″, g″) is the transmission cross coefficient (TCC), which characterizes the joint transfer properties of the illumination source, mask, and projection lens system. The TCC is expressed as:
T CC f , g ; f , g = J ~ ( f ,   g ) H ~ f + f , g   +   g H ~ * f + f , g   +   g d f   d g
where J ~ (f, g) represents the intensity distribution of the partially coherent source, H ~ (f + f′, g + g′) is the pupil function of the projection lens, and f and g denote spatial frequency coordinates. The TCC matrix is large-scale and exhibits significant sparsity, indicating room for further simplification. In practice, the Sum of Coherent Systems (SOCSs) method is widely adopted [19]. Based on singular value decomposition, it approximates the original matrix using a small number of eigenvalues and eigenvectors—effectively replacing a high-order system with a low-order model. As the TCC matrix is positive definite, it can be mathematically decomposed into a series of eigenvalues and corresponding eigenvectors, providing a theoretical basis for this approximation. By retaining the top K largest eigenvalues and their associated eigenvectors, the matrix is compressed, preserving critical information while drastically reducing computational resource consumption. Thus, after SOCS simplification, the TCC matrix remains vectorial and decomposed into a series of low-rank kernels φ k , expressed as:
T CC f , g ; f , g = k = 1 K ω k φ k f ,   g h k * f ,   g
The aerial image calculation can then be expressed as:
I x ,   y = k = 1 K ω k | h k x ,   y  ⮾  M x ,   y | 2  
where h k represents the inverse Fourier transform of φ k (the convolution kernel), ω k denotes the corresponding coefficient, and ⮾ indicates the convolution operation. In our implementation, we use K = 24 for the SOCSs approximation. Finally, the aerial image I is converted to a binary wafer image Z:
Z x ,   y = 1 ,          if   I x , y I t h 0 ,          if   I x ,   y < I t h
where the threshold Ith is set to 0.225 in our implementation. This binary process resists the constant threshold model (CTR). Beyond the constant threshold model (CTM), several other key metrics and models are essential in lithography:
NILS (Normalized Image Log-Slope): Measures the steepness of the aerial image’s intensity gradient. A higher NILS indicates a sharper light-to-dark transition, implying better potential resolution and contrast. It allows early assessment of optical image quality before exposure.
MEEF (Mask Error Enhancement Factor): Quantifies how mask-level dimensional errors are amplified onto the wafer, reflecting the process sensitivity to mask defects and manufacturing constraints.
LER (Line Edge Roughness): Evaluates the nanoscale roughness or irregularity along the edges of printed features on the wafer.
The CTM simplifies the complex photoresist chemistry into a binary physical threshold: resist dissolves where intensity exceeds the threshold (I > Ith) and remains otherwise. Compared to the above metrics/models, the CTM is highly simplified—it ignores photoresist effects such as chemical kinetics and acid diffusion, resulting in poor prediction accuracy and making it unsuitable for advanced nodes. However, its computational efficiency and ease of implementation make it widely adopted in inverse lithography technology (ILT) research, as in this work.

2.2. ILT Evaluation Metrics

In ILT mask optimization, several key metrics are employed to evaluate mask quality and optimization performance. Beyond computational runtime (turnaround time), these metrics primarily assess two critical aspects: printability and manufacturability. Printability metrics include L2-norm error, process variation band (PVB), and edge placement error (EPE), while manufacturability is quantified via shot count (#Shot), representing the number of rectangular exposures required for mask fabrication.
Definition 1 
(L2-Norm error). For a target layout Zt, this metric evaluates the squared Euclidean distance between the nominal wafer image Znom (generated under standard dose and focus conditions Pnom) and Zt:
L L 2 = | |   Z n o m Z t | | 2 2
This quantifies global pattern fidelity, with lower values indicating better mask accuracy.
Definition 2 
(Process Variation Band, PVB). As illustrated in Figure 2b, process variations (e.g., defocus and dose fluctuations) induce morphological deviations in resist patterns. PVB measures the robustness of lithographic performance by calculating the XOR area between the maximum (Zmax) and minimum (Zmin) wafer image contours across process conditions:
L P V B = | |   Z m a x Z m i n | | 2 2
Definition 3 
(Edge Placement Error, EPE). EPE evaluates local edge fidelity (Figure 2a). Detection points are uniformly sampled along vertical/horizontal edges, and violations are flagged when the perpendicular distance D(x,y) between target and printed edges exceeds a threshold thEPE. This method avoids pixel-wise computation, instead using edge-segment sampling for efficiency.
Definition 4 
(Mask Fracturing Shot Count, #Shot). For a given mask M, #Shot counts the minimum number of rectangular VSB (Variable Shaped Beam) exposures needed to reproduce the mask geometry with high fidelity. Fewer shots imply lower mask-writing complexity and cost.

3. Methodology

This section first provides a detailed introduction to the EAAUnet network model adopted in the proposed EAAUnet-ILT scheme, including the specific functions and mechanisms of the modules contained in the model. Then, it explains the selection of optimization objectives and how to design the loss function based on these objectives, covering both the training scheme and the customized layer iteration approach. Subsequently, the paper introduces the specific details of the constraint algorithm applied to the masks generated by the EAAUnet-ILT.
In the complete EAAUnet-ILT workflow, we first train the model and then place the pre-trained model into customized refinement layers for iteration. These refinement layers also consist of trained EAAUnet models but differ from the pre-training phase in their loss function construction. EAAUnet-ILT represents an end-to-end ILT solution, with its workflow illustrated in Figure 3. The iteratively generated masks are Continuous Transmission Masks (CTMs), which are obtained by applying the sigmoid transformation to the intermediate parameter feature maps output by the model. The transformation formula is as follows:
M = 1 1 + e θ × P
In the equation, θ represents the steepness parameter of the sigmoid function transformation, which is a hyperparameter set to 5 in this study. The iteratively generated CTM undergoes binarization processing followed by SRAF (Sub-Resolution Assist Feature) constraints to form the final mask.

3.1. EAAUnet Structure

The EAAUnet is based on the U-Net architecture, with its overall structure illustrated in Figure 4. The number of feature map channels at each resolution level (from high to low) is set to 16, 32, 64, 128, and 256, respectively. Compared to the traditional U-Net, this adjustment reduces computational complexity.
Instead of conventional convolutional layers, EAAUnet employs Hybrid Adaptive Attention Modules (HAAMs). A key improvement lies in replacing some HAAMs with G-E modules, which maintain feature extraction capability while reducing model complexity. Additionally, attention gates [20] are incorporated into the traditional U-Net skip connections. While standard skip connections preserve low-level spatial details to compensate for spatial information loss caused by deep downsampling, the introduction of attention gates dynamically computes importance weights for encoder features, optimizing feature selection. This mechanism selectively emphasizes relevant regions while suppressing irrelevant background, avoiding redundancy from simple concatenation.
The attention gate (AG) functions as follows:
Intelligently fusing encoder features provided by HAAMs: Serving as a bridge between the encoder and decoder, the AG processes features generated jointly by the HAAMs and G-E modules in the encoder. Since these features have already undergone multi-scale extraction and attention-based filtering by HAAMs, the AG receives higher-quality encoder features, enabling more accurate fusion decisions.
Enhancing decoding precision: Through precise feature fusion, the decoder can more effectively integrate high-level semantic context with low-level detailed features during mask image reconstruction. This capability is particularly beneficial for generating accurate sub-resolution assist features (SRAFs) in critical regions such as edges and corners, directly contributing to improved final mask quality.
The collaboration within EAAUnet can be summarized as a well-defined and interlocking workflow with a clear division of labor:
HAAMs—feature mining, it is deployed at the beginning of each encoder and decoder layer. It extracts rich, multi-scale features from inputs, providing a high-quality data foundation for subsequent processing.
G-E Module—lightweight and feature enhancement, it is placed at the later stages of the encoder and decoder. It refines and enhances features extracted by HAAMs while significantly reducing parameters and computational cost, ensuring network efficiency.
Attention Gate (AG)—information fusion coordinator, it operates on skip connections to intelligently filter and fuse detailed features from the encoder with contextual features from the decoder. This ensures that the integrated information is the most relevant and effective, avoiding redundancy.
Ultimately, under the overarching symmetric architecture of U-Net, all these modules work together to achieve accurate and efficient mapping from target regions to optimized masks.

3.2. Hybrid Adaptive Attention Module (HAAM)

The HAAM enhances feature extraction by adaptively selecting features through multi-scale convolution and a dual-attention mechanism (channel attention and spatial attention). Its detailed structure is shown in Figure 5. The HAAM consists of three components: multi-scale convolutional layers with different kernel sizes, a channel self-attention block, and a spatial self-attention block. The input feature F i n p u t is first processed by three parallel convolutional layers, generating feature maps with different receptive fields: F 3 : Obtained via a 3 × 3 convolution, F 5 : Obtained via a 5 × 5 convolution, and F D : Obtained via a 3 × 3 dilated convolution (dilation rate = 3). These three convolutions capture features at different scales: The 5 × 5 convolution provides a receptive field equivalent to two stacked 3 × 3 convolutions, The dilated convolution expands the receptive field to that of five 3 × 3 convolutions, enhancing multi-scale feature extraction.

3.2.1. Channel Self-Attention Block

The channel self-attention block is designed to extract the most effective features from feature maps with receptive fields of varying sizes. As illustrated in Figure 5a, this block recalibrates channel feature responses by modeling interdependencies among channels, thereby screening out the most representative features. First, global average pooling (GAP) compresses F 5 R C × H × W and F D R C × H × W into a new feature R 2 C × 1 × 1 with dimensions 1 × 1:
F G = G A P F 5 + F D
The feature map F G is then fed into two cascaded fully connected layers, followed by a batch normalization layer and a ReLU activation layer, to generate a new feature map:
F f G = σ R e L u ( B N ω f c 1 ω f c 2   ·   F G )
Subsequently, the sigmoid activation is applied to F f G to normalize the weights of each channel into probabilistic form, yielding the channel attention map:
α = σ F f G
Here, α [ 0 ,   1 ] C × 1 × 1 and α [ 0 ,   1 ] C × 1 × 1 represent the channel attention maps for F D and F 5 , respectively, with each value indicating the importance of the corresponding channel in the feature map. α is derived from α as 1 α . The feature maps are then calibrated using the channel attention maps:
F C D = α F D
F C 5 = α F 5

3.2.2. Spatial Self-Attention Block

The spatial self-attention block focuses on the spatial locations of features, taking as input the features from 3 × 3 convolutions and the output feature maps from the channel self-attention block, as shown in Figure 5b. First, a 1 × 1 convolution is applied to the input feature maps to facilitate the subsequent processing of spatial information:
F S 1 = C o n v 1 × 1 F 3
F C S 1 = C o n v 1 × 1 F C D + F C 5
The convolved features F S 1 and F C S 1 are summed, then processed through ReLU activation σ R e L u ( · ) , 1 × 1 convolution, and sigmoid activation σ ( · ) to obtain the spatial attention map β:
β = σ ( C o n v 1 × 1 σ R e L u ( F S 1 + F C S 1 ) )
Here, β [ 0 ,   1 ] denotes the spatial attention map for F C S 1 , while β [ 0 ,   1 ] represents the spatial attention map for F S 1 , with β = 1 β . β and β resampled, and the resampled versions are used to calibrate the feature maps, yielding F C S 1 and F S 1 , respectively. Finally, the two are summed up and convolved to produce the output F o u t p u t :
F o u t p u t = C o n v 1 × 1 F S 1 + F C S 1
In summary, the HAAM performs as follows:
Providing preprocessed rich features for the G-E module: Positioned at the front end of each level, the HAAM performs preliminary yet powerful feature extraction and filtering. It delivers the processed feature maps ( F o u t p u t ), rich in multi-scale information, to the G-E module at the same level. This allows the G-E module to perform subsequent lightweight operations based on higher-quality features, achieving better results with greater efficiency.
Supplying high-quality encoder features for the attention gate: The features extracted by HAAM in the encoder path are transmitted to the decoder via skip connections. These features, refined by the attention mechanism, contain more effective information, laying a solid foundation for the precise decision-making of the attention gate.

3.3. G-E Module

The G-E module is a lightweight block designed to enhance feature extraction capabilities while minimizing parameter count and computational resource consumption. As illustrated in Figure 6, the G-E block consists of a main path and a shortcut path. The main path incorporates a Ghost module [21] and an ECA module [22]. Compared to traditional convolution, the Ghost module significantly reduces computational costs by leveraging feature redundancy and channel correlations to generate effective features. The ECA module further enhances the feature maps from the Ghost module through adaptive channel calibration, enabling the module to focus more on critical information while maintaining low computational overhead and improving ILT performance.
Figure 7 illustrates the mechanism of the Ghost module, which simplifies traditional convolution via a three-stage hierarchical decomposition. First, pointwise convolution compresses the input Finput along channels to extract intrinsic feature representations. Next, two consecutive asymmetric convolutions (a combination of 3 × 1 and 1 × 3 convolutions, denoted as AsymConv) replace depthwise convolution to generate additional features, termed “ghost features,” based on these intrinsic representations. Finally, the ghost features are concatenated with the intrinsic features to form a composite tensor FGhost1, produced by the first Ghost module. The computation process is described by Equations (18)–(20):
F p r i m   c o n v = B N ( LReLU PWConv ( F i n p u t ) )
F c h e a p   o p = B N ( LReLU DWConv ( F p r i m   c o n v ) )
F G h o s t 1 = Concat ( F p r i m   c o n v ,     F c h e a p   o p )
After batch normalization (BN) and LeakyReLU (LReLU) activation, F G h o s t 1 is mapped to a dimension-preserved tensor P, which is then processed by the ECA module for global text-aware channel adaptation. The equation is as follows:
P = BN LReLU ( F G h o s t 1 )
The tensor P undergoes squeeze-and-excitation operations in the ECA module, eliminating the side effects of dimensionality reduction in SE blocks. A 1D convolution captures inter-channel relationships, with the kernel size k automatically determined based on the number of channels. The output is a channel-attention-enhanced feature map F E C A 1 . An additional Ghost module is appended after the ECA module to compress the channel dimensions of F E C A 1 , further reducing computational costs. Notably, only batch normalization (BN) is applied after the second Ghost module, omitting LReLU activation to prevent excessive information loss due to reduced channel dimensions. The second ECA module yields another channel-attention-enhanced feature map F E C A 2 .
Meanwhile, the initial feature map on the shortcut path undergoes depthwise separable convolution to produce F i n i t i a l , aligning its channel count with the output of the main path. The final output of the G-E module is obtained by element-wise addition of F E C A 2 and F i n i t i a l . This approach preserves original information without altering feature dimensions or introducing extra parameters, ensuring low computational complexity.
In summary, The G-E block functions as follows:
It receives and refines the output from the HAAM: Positioned right after HAAM, the G-E module takes in the multi-scale features that have been preliminarily filtered by the HAAM’s attention mechanism. It then performs two key operations:
Ghost operation: Significantly reduces the channel dimensionality and computational cost of the feature maps, achieving model lightweighting.
ECA attention: Further “purifies” the compressed features at the channel level, ensuring that critical information is preserved and even enhanced.
It supplies efficient features to the next layer: The processed features retain high representational capacity while being highly lightweight. These features are passed to the next downsampling or upsampling layer, enabling efficient information propagation throughout the deep network.

3.4. Model Pretrain and Iteration

The proposed EAAUnet-ILT framework employs a two-stage process: (1) pretraining via supervised learning to improve convergence efficiency, and (2) refinement training for precise pattern optimization. The pretraining phase uses a composite loss function derived from lithography performance metrics:
L p r e = L L 2 + L P V B + L l a b e l
L l a b e l = | | M M l a b e l * | | 2 2
Here, L l a b e l is a constraint term ensuring rapid convergence by steering the model’s output mask M toward the target mask M l a b e l * . After pretraining, the EAAUnet model undergoes refinement training with customized layers to further enhance ILT performance. The refinement loss function is defined as:
L r e f i n e = L L 2 + L P V B + γ   ·   L r e g u l
L r e g u l = e k   ·   n N | | P | | 2 2
where L r e g u l is a regularization term with exponential decay, and k is a decay weight, N is the total number of refinement layers (iterations), and n is the current refinement layer (iteration). This strategy helps avoid overfitting, escape local optima, and improve mask optimization. As refinement progresses, the regularization coefficient γ approaches zero, preventing stagnation in local optima. To achieve this effect—specifically decaying to one-thousandth of its initial value—the decay weight k is set to ln ( 1000 ) = 6.9. The complete EAAUnet-ILT framework integrates these steps, as detailed in Algorithm 1.
Algorithm 1 EAAUnet-ILT Application Process
Require: target layout Z t , labeled mask M l a b e l * , kernels h k , dose d, weight ω k , pretrained model EAAUnet_model
Ensure: SRAF constrain mask M c o n
1:   function GMUNet -ILT( Z t , h k , d, μ k )
2:       load_model(EAAUnet_model)
3:           for i = 1, …, thiter
4:              M ← EAAUnet( Z t )
5:               Z ← litho_sim(M)
6:               L r e f i n e ← calculate_loss( Z , Z t   , M l a b e l * )
7:              G ← calculate_gradient(L)
8:              update parameters(EAAUnet_model)
9:           end for
10:          M b i n a r y Binary ( M )
11:          M c o n SRAF _ constrain ( M b i n a r y )
12:      return  M c o n
13:  end function

3.5. SRAF Constrain Algorithm

The mask M output by EAAUnet-ILT contains irregular and complex SRAFs. Considering the manufacturability of the mask, we employ a rectangular decomposition-based constraint algorithm to regulate the SRAF patterns. Specifically, given the binary mask M b i n a r y and the target pattern Z t , we first dilate the contour of Z t by a certain distance to create a protected region M P . This protected region envelops the main pattern of M b i n a r y while preserving the original features within it. The remaining region M R is used to extract SRAFs for constraint operations.
First, portions of M R exceeding a certain threshold are extracted as the SRAF constraint region M S R A F . M S R A F is then segmented into connected components, each of which undergoes grid decomposition. Rectangles are generated based on the decomposed grids by setting all pixel values within each grid to 1. If a connected component is too small, rectangles are directly generated according to the minimum size constraint. The formulation is as follows:
W g r i d = m i n ( S m a x , m a x ( S m i n ,   w ) )
H g r i d = m i n ( S m a x ,   m a x ( S m i n ,   h ) )
W s t e p = m a x ( 1 ,   W g r i d   ·   ( 1 r ) )
H s t e p = m a x ( 1 ,   H g r i d   ·   ( 1 r ) )
Here, W g r i d and H g r i d denote the width and height of the grid, respectively; S m a x and S m i n represent the maximum and minimum allowable side lengths of the rectangles; w and h correspond to the width and height of the extracted connected component; W s t e p and H s t e p are the overlap dimensions, meaning generated rectangles overlap by these parameters; and r is the lower bound for the pixel percentage of the constrained SRAF pattern relative to the originally extracted SRAF region in the CTM, ensuring the coverage of the constrained pattern exceeds this value. A higher r makes the result closer to the original SRAF pattern, but an excessively high value may compromise algorithmic efficiency—hence, we set r = 0.5 in this work.
After generating the rectangles, they are merged to reduce the complexity of the SRAF pattern. The merged rectangles must still satisfy size constraints, with the maximum axial pixel distance difference between merged patterns in vertical or horizontal directions not exceeding 1.5 × S m a x . Finally, the merged rectangles are combined with the protected region M_P to form the complete mask. Figure 8 illustrates the rules for rectangle generation and merging based on grids, and Algorithm 2 outlines the SRAF constraint process.
Algorithm 2 Mask SRAF Constrain
Require: Binary mask M b i n a r y , target layout Z t , max size S m a x , min size S m i n , overlap ratio r
Ensure: Constrained mask M c o n
1:    function SRAF_constrain( M b i n a r y , Z t , S m a x , S m i n , r)
2:        M P d i l a t e ( Z t )
3:        M R M b i n a r y   n o t   M P
4:       { M 1 , …, M n } ← findConnectedRegions( M R )
5:           for i = 1, …, n
6:                    G i ← getGrid( M i )
7:                    R i ← generateRectangle( G i )
8:           end for
9:            M S R A F ← mergeRectangles( R 1 , …, R n )
10:          M c o n M S R A F  or  M P
11:         return  M c o n
12:  end function

4. Experiments and Discussion

4.1. Experimental Materials

The proposed EAAUnet-ILT framework is implemented using PyTorch 2.4.1 with CUDA acceleration and runs on a Linux-based computing platform equipped with a 2.6 GHz Intel Xeon processor and an NVIDIA RTX 4090 GPU. Performance benchmarking was conducted using the ICCAD 2013 CAD Contest benchmark suite [23], which includes ten 2048 × 2048 industrial-grade M1 layer designs at the 32 nm technology node, along with its integrated lithography simulation engine. For the ICCAD 2013 lithography simulation engine: Wavelength: 193 nm; NA: 1.35; Partial coherence factors: the inner σ = 0.3, the outer σ = 0.9; Annular illumination (exact parameters unspecified in documentation/engine code); Pupil apodization (PSF) corresponds to optical kernel h k in Equation (4), with ω k as the weight; Polarization: TE (electric field perpendicular to the plane of incidence) and TM (magnetic field perpendicular to the plane of incidence); Imaging grid resolution: 1 nm/pixel; Mask type: binary; Photoresist model: constant threshold resist (CTR), details provided in Section 2.1. It should be noted that mask binarization was implemented according to Equation (5), without employing any smoothing techniques prior to binarization. The binarization threshold was set to 0.5. Since the CTM is a continuous pixel matrix constrained by a steep sigmoid function (making it nearly binarized), and the lithography simulation uses the CTM for the final binarization of the aerial image results, the choice of binarization threshold has no impact on the lithography simulation or ILT outcomes.
The training dataset, provided by the authors of GAN-OPC [24], consists of 4875 M1 layer layout patterns compliant with 32 nm design rules. For PV band computation, an exposure dose range of ±2% and a defocus range of ±25 nm is considered. Actually, we only consider three scenarios for the process window grid: standard dose and focus condition, +2% dose and +25 nm defocus condition, −2% dose and −25 nm defocus condition, which is also configured according to the protocols adopted by most studies [12,24,25], aiming to simplify the experimental variables and facilitate the quantitative comparison of PVB metrics. The coefficient of regularization term is set to 0.3, and for the SRAF constrain algorithm, max_size is set to 36 nm and min_size is set to 20 nm.
To enhance training effectiveness, we followed the approach in UNeXt-ILT [26] by replacing the original labels in the GAN-OPC dataset with CTM (Continuous Transmission Mask) labels generated via gradient descent, incorporating SRAF patterns. As illustrated in Figure 9, Figure 9a shows the original label mask, while Figure 9b presents our gradient-descent-generated label mask. During both CTM label generation and model inference/refinement, all test target layouts are resized to 1024 × 1024 to balance optimization effectiveness and computational efficiency. While larger lithography simulations improve accuracy, they require excessive time, whereas smaller layouts significantly reduce precision. For CTM label generation via gradient descent: 10 iterations with step size 0.5; input training images are smoothed using Equation (8) (steepness = 4.0) to facilitate differentiation; the loss function matches Equation (24) with identical regularization; SGD optimizer with γ = 0.3. For EAAUnet refinement: Adam optimizer (initial learning rate = 2 × 10−3), step decay scheduler (step size = 7 epochs, decay factor = 0.1), batch size = 2. The iteration count was experimentally determined, as discussed later.
To determine the appropriate number of iterations, we initially set the regularization coefficient in the loss function (Equation (24)) for model refinement to a relatively small yet moderate value of 0.2 to observe the convergence trend. Since the number of iterations and the strength of regularization are highly coupled, strong regularization tends to force the loss function to reach a plateau more quickly. However, this may result from excessive suppression by regularization rather than indicating a truly optimal solution. Therefore, we first employe weak regularization to explore and understand the inherent optimization difficulty of the primary loss function itself. We first investigated the relationship between the number of iterations and average ILT metrics (L2, PVB, EPE) of the ten benchmarks. As shown in Figure 10, after the number of iterations reaches 10, the metrics generally stabilize—with the exception of minor fluctuations in EPE—indicating that the model parameters have also reached a convergent state. Based on the observed trend, we set the model refinement iteration count to 15. After establishing the suitable iteration count, we proceeded to conduct ablation studies on the regularization coefficient in the work presented in Section 4.3.
We also analyzed the SOCS approximation order in a Hopkins equation-based lithography system, testing orders from K = 6 to K = 24 in steps of two. The results (Figure 11) show that the order has no significant impact on lithographic metrics, confirming the effectiveness and rationality of SOCSs—even a low order (K = 6) sufficiently approximates the complex TCC-based Hopkins model. Moreover, as the approximation order decreases, the model runtime is nearly reduced linearly. However, to align with the widely prevalent use of K = 24 in current research, we retain this setting for fair comparison.
Finally, we experimentally investigated the imaging threshold of the photoresist CTM. The threshold was adjusted from 0.125 to 0.325, and the results are summarized in Table 1 and Figure 12. From Figure 12, as the threshold increases, the lithographic pattern develops more extensively, resulting in larger and wider features (i.e., larger CD); conversely, lower thresholds lead to less development and narrower lines (i.e., smaller CD). Correspondingly, Table 1 shows that when the threshold is either too high or too low, the L2 error and EPE increase significantly due to substantial deviation in the contour. In contrast, the PVB decreases under these conditions, since over- or under-development limits the sensitivity of the contour to process variations. Furthermore, it can be observed that a threshold within the range of 0.21–0.24 ensures relatively stable lithography quality, and 0.225 is identified as the optimal value within this range, yielding the best overall performance metrics.

4.2. Results and Analysis

First, to validate the effectiveness of the improvements in the adopted EAAUnet compared to the original AAUnet architecture, we designed controlled experiments with the following variants:
  • AAUnet enhanced with an attention gate (AG) (i.e., EAAUnet without the G-E block improvement);
  • AAUnet enhanced with a G-E block (i.e., EAAUnet without the attention gate mechanism);
  • AAUnet with a modified G-E block where the ghost module was replaced with a standard convolution and the ECA module was removed (denoted as variant0 in Table 1).
Additionally, to demonstrate the effectiveness of the HAAM in the original model, we conducted comparative experiments between a pure standard convolutional structure (conv stage, equivalent to U-Net), and AAUnet (where the HAAM replaces part of the standard convolutions). The results are summarized in Table 1, in which TAT represents the average inference time of the ten benchmark single tiles.
The data in Table 2 demonstrate that our enhanced EAAUnet achieves comprehensive optimization in ILT performance, runtime, and model parameter efficiency, resulting in a more lightweight yet feature-rich model.
Next, we compared EAAUnet-ILT with state-of-the-art (SOTA) ILT methods, including Neural-ILT [25], A2-ILT [27], and Multi-ILT [12]. Table 3 and Table 4 present comparisons in terms of L2 squared error, PV band (Process Variation Band), and turnaround time, while Table 5 compares EPE (Edge Placement Error) and Mask Fracturing Shot Count (#Shot).
Compared to these SOTA ILT methods, our EAAUnet-ILT achieves superior performance across all metrics—L2 error, PV band, EPE, and runtime—while our proposed SRAF constraint scheme significantly improves mask manufacturability. Specifically, against Neural-ILT, EAAUnet-ILT reduces L2 error by 39%, PV band by 27%, EPE by 36%, and 6.13× speedup; compared with A2-ILT, it reduces L2 error by 36%, PV band by 26%, and 3.02× speedup; compared with Multi-ILT, it reduces L2 error by 6%, PV band by 5%, and 1.77× speedup, while all referenced comparative schemes have open-source implementations, which we executed on our hardware and platform with their configurations preserved intact. Furthermore, we provide a visual comparison between EAAUnet-ILT and several state-of-the-art (SOTA) ILT methods on benchmark cases, as shown in Figure 13. Figure 13a displays the mask generated by EAAUnet-ILT, while Figure 13b presents the lithography simulation result of this mask. Figure 13c shows the mask generated by Neural-ILT, with its corresponding lithography simulation result in Figure 13d. Similarly, Figure 13e illustrates the mask produced by A2-ILT, and Figure 13f demonstrates the lithography simulation outcome of this mask. As evident from Figure 13, our EAAUnet-ILT method generates masks with stable and high-quality multi-loop Sub-Resolution Assist Features (SRAF), and the resulting wafer image from lithography simulation also achieves the highest quality.
Furthermore, with the SRAF constraint scheme applied, EAAUnet-ILT achieves an average 76% reduction in #Shot while incurring only a 12% degradation in lithographic L2 performance and a 9% loss in PV band performance. The runtime remains competitive, with the SRAF constraint algorithm accounting for 21% of the total computation time, demonstrating its feasibility and superiority. Table 6 presents the runtime breakdown by stage for EAAUnet-ILT.

4.3. Ablation Study

To further validate the effectiveness of the regularization term and the SRAF constraint algorithm, we conducted ablation experiments on EAAUnet-ILT, examining the impact of adjusting the regularization coefficient and SRAF constraint parameters. Table 7 quantifies the influence of different regularization coefficients on ILT performance when the SRAF constraint is disabled. Figure 14 illustrates the mask patterns generated under varying regularization strengths, showing that higher γ values lead to more SRAFs and more complex mask geometries. While increasing γ within a certain range reduces L2 error and PV band, excessive values hinder optimization. Thus, we set γ = 0.3 in this work, same as the CTM label gradient descent generation.
Table 8 and Table 9 jointly analyze the effect of SRAF constraint parameters on mask quality. Results indicate that smaller constraint sizes yield masks closer to the original unconstrained version, improving ILT metrics at the cost of higher #Shot (reduced manufacturability) and longer runtime. Figure 15 visually demonstrates how constraint size affects SRAF patterns—smaller constraints produce finer, more densely packed rectangles that better approximate the original SRAFs.

5. Conclusions

We proposed EAAUnet-ILT, a deep learning-based ILT framework built on an improved lightweight model. By leveraging spatial and channel self-attention mechanisms and optimized convolutional modules, the model enhances feature extraction while reducing computational overhead and accelerating inference. Pretrained model fine-tuning enables efficient mask optimization for target layouts. Additionally, regularization techniques dynamically adjust SRAF generation, further improving optimization. Our SRAF constraint algorithm significantly enhances mask manufacturability without compromising lithographic performance. Experimental results confirm that this ILT flow, combined with the SRAF constraint scheme, generates high-quality masks efficiently while ensuring manufacturability.

Author Contributions

Conceptualization, K.W.; formal analysis, K.W. and K.R.; software, K.W.; writing—original draft preparation, K.W.; writing—review and editing, K.W. and K.R.; supervision, K.W. and K.R. All authors have read and agreed to the published version of the manuscript.

Funding

This paper was supported by Zhejiang key R&D project (2023C01017).

Data Availability Statement

All data are included in the study.

Conflicts of Interest

The authors declare no conflicts of interest. K.W. and K.R. are employees of Zhejiang ICsprout Semiconductor Co., Ltd. The paper reflects the views of the scientists, and not the company.

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Figure 1. Line-end shortening and corner rounding resulted by optical proximity effect.
Figure 1. Line-end shortening and corner rounding resulted by optical proximity effect.
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Figure 2. Edge placement error (EPE) and process variation band (PVB) schematic representations: (a) EPE; (b) PVB.
Figure 2. Edge placement error (EPE) and process variation band (PVB) schematic representations: (a) EPE; (b) PVB.
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Figure 3. End-to-end ILT workflow of integrating a pre-trained model and customized refinement iteration.
Figure 3. End-to-end ILT workflow of integrating a pre-trained model and customized refinement iteration.
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Figure 4. Schematic of the EAAU-net architecture. The network retains a U-shaped structure, consisting of four downsampling and four upsampling stages (five levels in total). Each level contains a Hybrid Adaptive Attention Module (HAAM) and a G-E optimized convolution module.
Figure 4. Schematic of the EAAU-net architecture. The network retains a U-shaped structure, consisting of four downsampling and four upsampling stages (five levels in total). Each level contains a Hybrid Adaptive Attention Module (HAAM) and a G-E optimized convolution module.
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Figure 5. Structure of the Hybrid Adaptive Attention Module (HAAM): (a) channel self-attention block; (b) spatial self-attention block.
Figure 5. Structure of the Hybrid Adaptive Attention Module (HAAM): (a) channel self-attention block; (b) spatial self-attention block.
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Figure 6. Structure of the G-E module.
Figure 6. Structure of the G-E module.
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Figure 7. Mechanism of the Ghost module.
Figure 7. Mechanism of the Ghost module.
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Figure 8. Mechanism of the SRAF constraint algorithm: (a) when the grid size of a connected component lies between the maximum and minimum size limits, the generated rectangle matches the grid dimensions; (b) if a connected component is too small to accommodate the minimum grid size, the generated rectangle is fixed as a square with the minimum allowable size; (c) when the maximum axial distance between two merged rectangles in any direction exceeds 1.5× the maximum size limit, the merged rectangle is constrained within the permissible range.
Figure 8. Mechanism of the SRAF constraint algorithm: (a) when the grid size of a connected component lies between the maximum and minimum size limits, the generated rectangle matches the grid dimensions; (b) if a connected component is too small to accommodate the minimum grid size, the generated rectangle is fixed as a square with the minimum allowable size; (c) when the maximum axial distance between two merged rectangles in any direction exceeds 1.5× the maximum size limit, the merged rectangle is constrained within the permissible range.
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Figure 9. Illustration of label datasets: (a) original label data from GAN-OPC [24]; (b) CTM label data generated via our gradient descent optimization.
Figure 9. Illustration of label datasets: (a) original label data from GAN-OPC [24]; (b) CTM label data generated via our gradient descent optimization.
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Figure 10. Schematic diagram of the variation trends of average key ILT metrics with model iteration.
Figure 10. Schematic diagram of the variation trends of average key ILT metrics with model iteration.
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Figure 11. Schematic diagram of the impact of SOCS order K on lithography performance metrics.
Figure 11. Schematic diagram of the impact of SOCS order K on lithography performance metrics.
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Figure 12. Impact of different photoresist imaging thresholds on simulated wafer patterns in lithography.
Figure 12. Impact of different photoresist imaging thresholds on simulated wafer patterns in lithography.
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Figure 13. Visual comparison of the mask patterns and simulated wafer prints across different ILT methods: (a) masks of ours; (b) wafer images of (a); (c) masks of Neural-ILT [25]; (d) wafer images of (c); (e) masks of A2-ILT [27]; (f) wafer images of (e).
Figure 13. Visual comparison of the mask patterns and simulated wafer prints across different ILT methods: (a) masks of ours; (b) wafer images of (a); (c) masks of Neural-ILT [25]; (d) wafer images of (c); (e) masks of A2-ILT [27]; (f) wafer images of (e).
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Figure 14. Comparison of masks generated by EAAUnet-ILT under different regularization coefficients: (a) masks of γ = 0; (b) masks of γ = 0.1; (c) masks of γ = 0.2; (d) masks of γ = 0.3; (e) masks of γ = 0.4.
Figure 14. Comparison of masks generated by EAAUnet-ILT under different regularization coefficients: (a) masks of γ = 0; (b) masks of γ = 0.1; (c) masks of γ = 0.2; (d) masks of γ = 0.3; (e) masks of γ = 0.4.
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Figure 15. Comparison of constrained SRAF patterns under different input parameters: (a) masks of min_size = 12 nm, max_size = 28 nm; (b) masks of min_size = 16 nm, max_size = 32 nm; (c) masks of min_size = 20 nm, max_size = 36 nm; (d) masks of min_size = 24 nm, max_size = 40 nm; (e) masks of min_size = 28 nm, max_size = 44 nm.
Figure 15. Comparison of constrained SRAF patterns under different input parameters: (a) masks of min_size = 12 nm, max_size = 28 nm; (b) masks of min_size = 16 nm, max_size = 32 nm; (c) masks of min_size = 20 nm, max_size = 36 nm; (d) masks of min_size = 24 nm, max_size = 40 nm; (e) masks of min_size = 28 nm, max_size = 44 nm.
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Table 1. Performance comparison between different resist threshold in ILT metrics.
Table 1. Performance comparison between different resist threshold in ILT metrics.
Resist ThresholdL2 Error
(nm2)
PV Band
(nm2)
EPE
0.12597,26330,366107.9
0.1553,81332,72831.2
0.17542,96835,72023.1
0.231,07138,5538.2
0.2128,47939,6288.0
0.2227,39240,4077.6
0.22527,03340,2657.5
0.2327,42941,2677.5
0.2428,23242,2557.6
0.2529,21143,1388.3
0.27543,64148,31210.8
0.362,44545,39622.6
0.325113,26339,49854.4
Table 2. Performance comparison between the improved EAAUnet, the original AAUnet, and other AAUnet variants in ILT metrics.
Table 2. Performance comparison between the improved EAAUnet, the original AAUnet, and other AAUnet variants in ILT metrics.
ILT ModelL2 Error
(nm2)
PV Band
(nm2)
TAT
(s)
GFLOPsModel Params (K)
U - Net   ( Conv   stage )42,18651,4533.89770.4931,042
AAU net (HAAM)37,01345,9642.21282.7510,493
AAU net + AG36,14745,3742.22284.4210,611
Variant 033,91144,2761.73272.898497
AAU net + G-E block w/o AG27,56940,8371.51231.377629
EAAUnet 27,03340,2651.50224.167520
Table 3. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in L2, PVB, and runtime.
Table 3. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in L2, PVB, and runtime.
Bench-MarksNeutal-ILT [25]A2-ILT [27]Multi-ILT [12]
IDL2PVBTATL2PVBTATL2PVBTAT
Case 149,81755,97510.6745,28759,9404.5340,77950,6612.61
Case 238,17437,16012.0334,04451,9884.5234,20144,3222.71
Case 389,41174,3879.7692,50591,2614.5666,48671,5272.68
Case 416,74423,3579.3321,64429,0174.4810,94221,5002.59
Case 545,59848,6866.3738,08261,6014.6130,23151,2772.68
Case 643,83642,6736.4442,06853,6204.5030,74144,9822.72
Case 720,32435,8628.7721,94749,0534.5617,10140,2942.63
Case 813,33718,0018.8715,66823,8534.4811,93520,3572.61
Case 949,40156,86710.3246,97368,4424.5535,80557,9302.62
Case 10851115,3059.4010,45019,9504.50882518,4702.64
Average37,51550,9649.2036,86750,8734.5328,70542,1322.65
Ratio1.391.276.131.361.263.021.061.051.77
Table 4. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in L2, PVB, and runtime.
Table 4. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in L2, PVB, and runtime.
Bench-MarksEAAUnet-ILTEAAUnet-ILT+
SRAF Constrain
IDL2PVBTATL2PVBTAT
Case 137,87245,1101.5040,99647,1311.81
Case 228,85038,4901.4831,72541,4771.79
Case 365,60172,1001.5067,61677,1111.82
Case 412,54222,3191.5117,52529,4421.85
Case 527,66849,7991.4931,23052,3661.82
Case 628,91844,7301.5233,03848,6061.81
Case 710,64637,4941.5412,99139,8391.78
Case 813,69720,3101.4617,57324,8721.84
Case 935,23755,0331.5638,23657,9081.83
Case 10929517,2661.4411,74521,3901.85
Average27,03340,2651.5030,26844,0141.82
Ratio1111.121.091.21
Table 5. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in EPE and #Shot.
Table 5. Performance comparison of EAAUnet-ILT (with SRAF constraint) vs. SOTA ILT methods in EPE and #Shot.
Bench-MarksNeutal-ILT [25]A2-ILT [27]Multi-ILT [12]EAAUnet-ILTEAAUnet-ILT+
SRAF Constrain
IDEPE#ShotsEPE#ShotsEPE#ShotsEPE#ShotsEPE#Shots
Case 18428— *304338584284304
Case 23256258228432561258
Case 352557493223165255741493
Case 42136218024121362218
Case 53380351041133800351
Case 65383301041553830301
Case 70244245038202440245
Case 80285177027102850177
Case 92444382049024440382
Case 100208152016402080152
Average7.53322882.73367.53324.8288
Ratio2.340.200.170.840.202.340.201.50.17
* Metric data are not reported in original paper.
Table 6. Schematic illustration of the runtime breakdown by stage in EAAUnet-ILT.
Table 6. Schematic illustration of the runtime breakdown by stage in EAAUnet-ILT.
StageTime Cost(s)
Model inference0.102
Lithography simulation0.00176
SRAF constraint0.32
Table 7. Impact of different regularization coefficients on EAAUnet-ILT’s L2 and PVB metrics.
Table 7. Impact of different regularization coefficients on EAAUnet-ILT’s L2 and PVB metrics.
Regularization AdjustL2 Error (nm2)PV Band (nm2)
γ = 029,56445,244
γ = 0.128,31741,593
γ = 0.227,43139,315
γ = 0.327,03338,965
γ = 0.427,63239,158
Table 8. Impact of SRAF constraint parameters on ILT performance.
Table 8. Impact of SRAF constraint parameters on ILT performance.
BenchmarksMin_Size = 12, Max_Size = 28Min_Size = 16, Max_Size = 32Min_Size = 20, Max_Size = 36
IDL2PVB#ShotsTATL2PVB#ShotsTATL2PVB#ShotsTAT
Case 137,86345,3435441.8539,00546,9505131.8340,99647,1314501.79
Case 228,55737,5174881.8529,45038,1204431.8531,72541,4774251.80
Case 375,75968,0016581.9176,65973,6866271.8767,61677,1115611.80
Case 412,49525,4523341.8913,32926,3233181.8717,52529,4423081.79
Case 529,03450,2125961.9030,88950,5745741.8631,23052,3665371.86
Case 629,16744,4605781.8730,94045,6785531.9033,03848,6064891.88
Case 713,93339,9735831.8914,49338,3765691.8115,99139,8394531.83
Case 810,86721,2744771.8912,08322,1924561.7514,57324,8724021.82
Case 936,80757,1318091.8638,08457,7257961.7738,23657,9086511.87
Case 1010,01318,5664341.8410,03920,0874111.8311,74521,3903171.85
Average27,85340,5025501.8729,49741,9715261.8330,26844,0144591.82
Ratio1.031.040.331.251.091.080.321.221.121.130.281.21
Table 9. Impact of SRAF constraint parameters on ILT performance.
Table 9. Impact of SRAF constraint parameters on ILT performance.
BenchmarksMin_Size = 24, Max_Size = 40Min_Size = 28, Max_Size = 44NO SRAF Constrain
IDL2PVB#ShotsTATL2PVB#ShotsTATL2PVB#ShotsTAT
Case 141,59748,4024001.8242,75449,7273611.8637,87226,11019341.50
Case 237,05342,9594191.7538,00145,8783511.8528,85036,49016431.48
Case 375,93077,6765411.8176,14780,3724961.8265,60175,10016491.50
Case 417,62631,1983011.8019,37833,8502871.8012,54225,31914521.51
Case 531,83152,8845251.8633,06254,0244901.7827,66849,79918431.49
Case 633,63949,5234181.8034,99851,1363841.7728,91844,73019751.52
Case 725,33642,0354131.7727,56943,5033881.7510,64637,49416101.54
Case 814,67427,3173821.7915,33429,3813551.7513,69721,31014651.46
Case 938,83758,0926091.8639,92656,4595621.7335,23755,03318391.56
Case 1012,91723,0463031.7814,92824,7072711.72929518,26610571.44
Average32,44445,3134311.8034,21046,9033951.7827,03338,96516471.50
Ratio1.201.160.261.201.271.200.241.191111
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Wang, K.; Ren, K. EAAUnet-ILT: A Lightweight and Iterative Mask Optimization Resolution with SRAF Constraint Scheme. Micromachines 2025, 16, 1162. https://doi.org/10.3390/mi16101162

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Wang K, Ren K. EAAUnet-ILT: A Lightweight and Iterative Mask Optimization Resolution with SRAF Constraint Scheme. Micromachines. 2025; 16(10):1162. https://doi.org/10.3390/mi16101162

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Wang, Ke, and Kun Ren. 2025. "EAAUnet-ILT: A Lightweight and Iterative Mask Optimization Resolution with SRAF Constraint Scheme" Micromachines 16, no. 10: 1162. https://doi.org/10.3390/mi16101162

APA Style

Wang, K., & Ren, K. (2025). EAAUnet-ILT: A Lightweight and Iterative Mask Optimization Resolution with SRAF Constraint Scheme. Micromachines, 16(10), 1162. https://doi.org/10.3390/mi16101162

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