Automatic PLC Control Logic Generation Method Based on SysML System Design Model
Abstract
:1. Introduction
2. Materials and Methods
3. Results
3.1. Automatic Generation of PLC Control Logic Based on System Design Models
3.1.1. System Design Model
3.1.2. Association and Mapping of System Design and PLC Control Logic Model Elements
PLC Profile
Algorithm 1: SysML-PLC mapping conversion algorithm |
1. Initialization: Initialize the SysML model element set EsysML and the PLC control program element set EPLC. 2. Feature Extraction: Extract key features {a1, a2, …, an} of SysML model elements. Extract key features {b1, b2, …, bn} of PLC control program elements. 3. Matching rule definition: Define a set of matching rules R. Each rule ri∈R denotes the relationship between the attributes of a SysML element and the attributes of a PLC element. Example rule: If eSysML is a state machine and contains state transitions, it is mapped to the logical control section in ePLC. If eSysML is an input interface, it maps to an input module in the ePLC. 4. Mapping process: For each eSysML ∈ EsysML, apply the matching rule R to find the corresponding ePLC. The specific steps are as follows: for e_sysml in E_sysml. for r in R. if r.matches(e_sysml). e_plc = r.map_to_plc(e_sysml) E_plc.add(e_plc) |
Ladder Diagram Extension
State Diagram to Structured Text Extension
3.1.3. Control Program Automatically Generated
3.2. Implementation and Case Studies
3.2.1. Construction of Functional and System Models
3.2.2. System Model Conversion and Analysis
- Updating the address mapping rules to establish the conversion relationship from abstract variables to concrete hardware addresses;
- Adjusting the data type system to ensure that the data type definitions in the model are compatible with the target platform;
- Reconfiguring the code generation templates to output the source code that conforms to the syntax specification of the target platform.
4. Discussion
- This study presented a method aimed at automating the conversion of SysML models into PLC control programs. The objective was to enhance the systematization and integration of electromechanical system design methods by seamlessly incorporating SysML system design models into the PLC control program generation process.
- This study extended the SysML modeling platform and PLC programming environment through the development of plug-ins, fostering enhanced integration and collaboration. This expansion paves the way for future integration possibilities and broader development.
- This study employed a model-driven development method that integrated system design modeling with control program generation. This approach enhances the maintainability of the system design as any changes made to the model are automatically reflected in the generated control program.
- In this study, only one modeling platform was utilized. Consideration of additional standards and specifications in the future could enhance integration and interaction among diverse modeling tools and PLC programming environments. Furthermore, the development of more robust model validation and analysis tools is recommended to facilitate the early detection of potential issues within the model.
- The current methodology relies solely on a single system model. For enhanced flexibility in the manufacturing process, it is imperative to consider how relationships and mappings between different models can be seamlessly integrated to ensure system-level consistency.
Author Contributions
Funding
Data Availability Statement
Acknowledgments
Conflicts of Interest
Abbreviations
PLC | Programmable Logic Controller |
ST | Structured Text |
SysML | System Modeling Language |
UML | Unified Modeling Language |
SCM | System Component Model |
SPM | System Process Model |
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SyaML Activity Diagram Elements | Corresponding PLC Ladder Diagram Codeelements | Mapping Relations |
---|---|---|
Control Flow | - | No mapping is required, indicating control flow |
Action | - | No mapping is required, representing activities or actions |
Decision Node | - | No mapping is required, representing decision nodes |
Merge Node | - | No mapping is required, indicating merging nodes |
Input Pin | Input module or variable | Input pin represents input signal or data |
Output Pin | Output module or variable | Output pin represents output signal or data |
Call Behavior Action | Call PLC subroutine | Represents calling the corresponding subroutine or function in the PLC |
Constraint | - | No mapping is required, expressing constraints |
Activity Partition | - | No mapping is required, representing active partition or swim lane |
Fork Node | - | No mapping is required, indicating parallel processing |
Join Node | - | No mapping is required, indicating merge processing |
Decision Input Flow | conditional logic | Represents conditional logic and performs different actions based on conditional judgment. |
Object Flow | data transmission | Represents data transfer, used to connect different activities and actions |
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Ling, B.; Chu, C.; Xu, C. Automatic PLC Control Logic Generation Method Based on SysML System Design Model. Actuators 2025, 14, 201. https://doi.org/10.3390/act14050201
Ling B, Chu C, Xu C. Automatic PLC Control Logic Generation Method Based on SysML System Design Model. Actuators. 2025; 14(5):201. https://doi.org/10.3390/act14050201
Chicago/Turabian StyleLing, Bo, Changyong Chu, and Chuan Xu. 2025. "Automatic PLC Control Logic Generation Method Based on SysML System Design Model" Actuators 14, no. 5: 201. https://doi.org/10.3390/act14050201
APA StyleLing, B., Chu, C., & Xu, C. (2025). Automatic PLC Control Logic Generation Method Based on SysML System Design Model. Actuators, 14(5), 201. https://doi.org/10.3390/act14050201