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Applied Sciences
Volume 10
Issue 1
10.3390/app10010126
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Article
Peer-Review Record

Improvement of Electrical Performance in Heterostructure Junctionless TFET Based on Dual Material Gate

Appl. Sci. 2020, 10(1), 126; https://doi.org/10.3390/app10010126
by Haiwu Xie 1,2, Hongxia Liu 1,*, Shulong Wang 1,*, Shupeng Chen 1, Tao Han 1 and Wei Li 1
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Appl. Sci. 2020, 10(1), 126; https://doi.org/10.3390/app10010126
Submission received: 1 November 2019 / Revised: 15 December 2019 / Accepted: 19 December 2019 / Published: 23 December 2019

Round 1

Reviewer 1 Report


This paper reports the novel device with tunnel effect device.
However, the concept and effect of the paper is not clear, yet.

The vertual device is complicated structure with the series connection of a few MOSFET, and the effect of N+ source Si is not clear.

The difference between the band-to-band tunneling (BTBT) is not clearly shown in the text.
Because the difference between the calculation with BTBT or not is not shown in the text.
Therefore, the meaning of BTBT for this device is not acceptable, at this stage.

In addition, the position of the device in Figure 2(a)-(d) is not clearly shown in the Figure. Therefore, the concept and the arguement of the Figure is very poor.

Meaning of right hand source region is not clearly shown in the text.
Therefore, text after 3.2 should be evaluated later.

Author Response

Please see the attachment.

Author Response File: Author Response.docx

Reviewer 2 Report

The manuscript studies the origin of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET). The work seems to be interesting and provides DMGE-HJLTFET measurements. However, it lacks some minor issues in the analysis and can be accepted for publication in the present form due to following reasons.

-The manuscript should explain comparing with other DMGE-HJLTFET  research-Appl. Sci. 2019, 9, 4104.

Author Response

Please see the attachment.

Author Response File: Author Response.docx

Reviewer 3 Report

It reports on the simulation study of DMMG-HJLTFET system using Si/SiGe geterostructure. It is well-written and the result is also well-presented. One of may major concern is that it lacks novelty compared with previous publication. They reported a article at Appl. Sci. 2019, 9(19), 4104. It is almost same with this report except the use of InAs/GaAs0.1Sb0.9 hetereojuction.  There is one more publication at Micromachines 2019,10, 424; doi:10.3390/mi10060424, in which Ge/Si0.6Ge0.4/Si heterojunction(H-DLTFET) is presented. Therefore, I want to suggest the authors to extend the introduction to emphasize the significance and distinguishable points of this research. After that, I may be able to recommend its publication.

 

Author Response

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Author Response File: Author Response.docx

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