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Article

Three-Phase Three-Level Neutral Point Clamped Rectifier with Predictive Control Method without Employing Weighting Factor

School of Electrical and Electronics Engineering, Chung-ang University, Seoul 06974, Korea
*
Author to whom correspondence should be addressed.
Appl. Sci. 2020, 10(15), 5149; https://doi.org/10.3390/app10155149
Submission received: 22 June 2020 / Revised: 23 July 2020 / Accepted: 23 July 2020 / Published: 27 July 2020

Abstract

:
A predictive control method using injected offset voltage to achieve neutral point (NP) voltage balance of three-phase three-level neutral point clamped (NP) rectifiers, without employing a weighting factor, is proposed in this study. One of the biggest problems with the three-level NP rectifiers is the dc link capacitor voltage imbalance. Therefore, it is necessary to maintain the balance of the NP voltage in addition to synthesize the three-phase sinusoidal input current by control methods. Conventional predictive control methods for the NP rectifiers have used a weighting factor in a cost function that determines the control ratio of the input currents and the capacitor voltage balance. As a result, it is burdensome to empirically redesign the weighting factor when the rectifiers’ parameter values and control conditions change. Unlike the conventional methods, the proposed approach without the weighting factor can significantly eliminate differences between two DC capacitor voltages by utilizing an offset voltage, which is generated by using the difference between the upper and lower capacitor voltages. Consequently, the proposed approach using the offset voltage injection can control the input currents and retain the balance of NP voltage. Simulation and experiments are presented to verify the correctness of the NP voltage balancing of the proposed control method.

1. Introduction

A recent increase in applications of high voltage systems and equipment in industrial fields has revealed limitations of two-level rectifiers [1,2,3,4]. To resolve the drawbacks of the two-level rectifiers, many multi-level rectifiers have been studied to increase the voltage levels of rectifiers as compared to the two-level rectifiers because of the increased number of switches existing in each phase [5,6,7,8,9,10,11]. This circuit structural feature allows multiple switches to distribute stresses. In addition, due to the increased levels, input current waveforms have a lower total harmonic distortion (THD) than the two-level rectifiers, yielding improved current characteristics without increasing the filter size. Furthermore, the reduced THD eliminates the need for higher switching frequencies, which can increase efficiency more than the two-level rectifiers. Three-phase three-level neutral point clamped (NP) rectifiers have four switches and two clamping diodes per phase, and two additional DC capacitors, in which capacitor voltages should be balanced and three-phase input currents should be synthesized in a sinusoidal form [12,13,14]. The unbalance of capacitor voltages not only reduces control performance, but also increases stresses on the switches, which can increase the probability of the rectifier failing. Therefore, various control methods for controlling both the input current and the capacitor voltage of the three-phase three-level NP rectifiers have been studied [15,16,17,18,19]. Predictive control methods, which select an optimal switching state minimizing a cost function to satisfy rectifier performance, have also been investigated to control the NP rectifier [20,21,22,23]. So as to simultaneously fulfil the sinusoidal input current generation and the NP voltage balancing, a cost function for the NP rectifiers consists of two terms for the input current and the capacitor voltage, which are adjusted by a weighting factor that determines a control ratio between two terms. It is burdensome to empirically redesign the weighting factor in cases that parameters or control conditions change. Thus, this paper addresses a predictive control method which can eliminate this hassle.
In this paper, a predictive control method with offset voltage injection for achieving neutral point (NP) voltage balance of three-phase three-level neutral point clamped (NP) rectifiers is proposed. The proposed algorithm does not use a weighting factor as the cost function of the conventional approach. Instead, the proposed method individually develops an offset voltage which is decided by the difference between the upper capacitor voltage and lower capacitor voltage, in addition to produce a reference voltage which is used to control the three-phase sinusoidal input currents. Then, the offset voltage, which is injected to the reference voltage in the proposed scheme, can successfully reduce the difference between the two capacitor voltages. Consequently, the proposed algorithm using the offset voltage injection can control the input currents and retain the balance of the NP voltage. Validity of the proposed method is verified through simulations and experiments.

2. Conventional Predictive Control Method

Figure 1 shows a three-phase three-level NP rectifier. The ac input side of the circuit structure in Figure 1 gives an equation as
v s x = R i i x + L i d i x d t + v x ( x = a ,   b ,   c )
where v s x , i x , R i , L i and v x represent the source voltage, the input current, the input resistance, the input inductance, and the phase voltage of the rectifier, respectively. Using a constant sampling period T s and Euler’s formula, the Equation (1) is described in the discrete time domain as
v s x ( k ) = R i i x ( k ) + L i i x ( k + 1 ) i x ( k ) T s + v x ( k ) .   ( x = a ,   b ,   c )
By rearranging (2), one can obtain
i x ( k + 1 ) = ( 1 R i T s L i ) i x ( k ) + T s L i ( v s x ( k ) v x ( k ) ) . ( x = a ,   b ,   c )
where v x which is the rectifier pole voltage with respect to the node O in Figure 1, can be determined based on the switching states as presented in Table 1.
The predictive control technique evaluates all switching state combinations to select an optimal switching state. Therefore, computational time included in the evaluation algorithm is compensated in the delay compensation techniques, in which the future current at the (k + 2)th step is used for the predictive control method [24,25]. The future current at the (k + 2)th step is acquired through shifting the model of (3) for one step forward as
i x ( k + 2 ) = ( 1 R i T s L i ) i x ( k + 1 ) + T s L i ( v s x ( k + 1 ) v x ( k + 1 ) ) .   ( x = a ,   b ,   c )
A switching function according to switching operation of each phase in the rectifier can be defined as
S x = { S x = 1           ( S x 1 , S x 2 :     O N )   S x = 0           ( S x 2 , S x 3 :     O N ) S x = 1   ( S x 3 , S x 4 :     O N )   .   ( x = a ,   b ,   c )
where S a x ,   S b x , and S c x   ( x = 1 ,   2 ,   3 ,   4 ) refer to switching states of the four switches located on the a, b and c phase. The rectifier switching states and the input currents can be used to describe the currents flowing through the upper and lower capacitors as shown in (6) and (7).
i c 1 = S a ( S a + 1 ) 2 i a + S b ( S b + 1 ) 2 i b + S c ( S c + 1 ) 2 i c .
i c 2 = S a ( S a 1 ) 2 i a S b ( S b 1 ) 2 i b S c ( S c 1 ) 2 i c .
where i c 1 , and i c 2 represent the currents flowing through the upper and lower capacitors, respectively. In addition, the upper capacitor voltage and the lower capacitor voltage can be expressed as
d v c i d t = 1 C i c i   ( i = 1 ,   2 )
where C is the capacitance of the upper capacitor and lower capacitor. v c 1 and v c 2 represent the voltage of the upper and lower capacitors, respectively. With a sampling period T s , the variation of the capacitor voltage is expressed in the discrete time domain as follows.
d v c i d t v c i ( k + 1 ) v c i ( k ) T s .   ( i = 1 ,   2 )
Using (9), (8) can be expressed as follows, and the capacitor voltage of the next step can be estimated as
v c i ( k + 1 ) = v c i ( k ) + T s C i c i ( k ) .   ( i = 1 ,   2 )
To apply the delay compensation technique, the future capacitor voltage at the (k + 2)th step is acquired through shifting (10) for one step forward as
v c i ( k + 2 ) = v c i ( k + 1 ) + T s C i c i ( k + 1 ) .   ( i = 1 ,   2 )
The cost function of the conventional predictive method is as follows.
g = | i a * ( k + 2 ) i a ( k + 2 ) | + | i b * ( k + 2 ) i b ( k + 2 ) | + | i c * ( k + 2 ) i c ( k + 2 ) | + λ c | v c 1 ( k + 2 ) v c 2 ( k + 2 ) | .
where i a * , i b * and i c * represent the reference input currents for the a, b and c phase, respectively. Moreover, λ c is a weighting factor that defines the control proportion of the input currents and the capacitor voltages. The reference input currents can be obtained from Lagrange extrapolation using previous reference input currents as follows [26]
i a b c * ( k + 2 ) = 3 i a b c * ( k + 1 ) 3 i a b c * ( k ) + i a b c * ( k 1 ) .

3. Proposed Predictive Control Method for NP Voltage Balance by Offset Voltage

Equations (14) and (15) describe the capacitor voltage variations, following (6), (7) and (10), as
Δ v c 1 = T s C i c 1 = T s C ( S a ( S a + 1 ) 2 i a + S b ( S b + 1 ) 2 i b + S c ( S c + 1 ) 2 i c ) .
Δ v c 2 = T s C i c 2 = T s C ( S a ( S a 1 ) 2 i a S b ( S b 1 ) 2 i b S c ( S c 1 ) 2 i c ) .
A difference between the upper and lower capacitor voltages is defined as
v d i f f = v c 1 v c 2 .
The difference between the variation of upper and lower capacitor voltages can be also defined as
Δ v d i f f = Δ v c 1 Δ v c 2 = T s C ( S a 2 i a + S b 2 i b + S c 2 i c ) .
According to Lyapunov stability, the condition for system stability is as [27]
d V d t 0 .   V 0
where V = v d i f f 2 . From (18), the difference between the upper capacitor voltage and the lower capacitor voltage should satisfy the following, in order to maintain capacitor voltage balance:
2 v d i f f d v d i f f d t 0
In the discrete-time domain, (19) can be presented as follows.
v d i f f ( k ) Δ v d i f f ( k ) T s 0
Using (17), (20) can be written by the difference of the two capacitor voltage variations v d i f f and a function related with the input currents and the switching functions of the rectifier M , as
v d i f f C M 0
where M = S a 2 i a + S b 2 i b + S c 2 i c . Therefore, it can be seen from (21) that the capacitor voltage balance can be maintained by adjusting the rectifier switching states, S a ,   S b ,   and   S c , by considering the three-phase input currents and the difference of the two capacitor voltage variations. In order to control the rectifier based on the reference voltage in the proposed method, the Equation (2) can be expressed as follows using the reference currents.
v x * ( k ) = v s x ( k ) R i i x ( k ) L i i x * ( k + 1 ) i x ( k ) T s .   ( x = a ,   b ,   c )
where v x * is the reference voltage for each phase. To apply the delay compensation technique, the future reference voltage at the (k + 2)th step can be obtained by shifting (22) by one step forward as
v x * ( k + 1 ) = v s x ( k + 1 ) R i i x ( k + 1 ) L i i x * ( k + 2 ) i x ( k + 1 ) T s   .   ( x = a ,   b ,   c )
Switching state selections according to positions of the reference voltage is decided as
S x = { 1   ( P   state )   if   V d c 4 v x * V d c 2 0   ( O   state ) if   V d c 4 < v x * < V d c 4 1   ( N   state ) if   V d c 2 v x * V d c 4   ( x = a ,   b ,   c ) .
Figure 2 shows sectors, input current polarity, switching states and maximum and minimum reference voltages of the three-phase NP rectifiers operating with unity power factor, where v m a x * and v m i n * represent the maximum and minimum values of three-phase reference voltages, respectively. As shown in Figure 2, the voltages, v m a x * and v m i n * , change every 120°. Furthermore, the rectifier changes the switching state every 60° on the basis of the position of the reference voltages and (24). It can be known that the rectifier selects six switching states as shown in Figure 2, PNO, PON, OPN, NPO, NOP and ONP, according to (24). In addition to the reference voltage v x * for the reference current tracking in (22), a new reference voltage proposed in this paper is defined with an offset voltage injection as
v x . r e f = v x * + v o f f s e t ( x = a ,   b ,   c )
where v x , r e f and v o f f s e t are a new reference voltage proposed in this paper and an offset voltage to be injected to maintain the capacitor voltage balance, respectively. The range of the offset voltage is, because the new reference voltage v x , r e f with the offset voltage injection must be lower than V d c 2 and higher than V d c 2 , as
V d c 2 v x * v o f f s e t V d c 2 v x *   .   ( x = a ,   b ,   c )
The maximum and minimum values of the offset voltage are defined as
V d c 2 v m i n * v o f f s e t V d c 2 v m a x * .
In cases where the positive offset voltage is injected, the magnitude of the reference voltage increases. For instance, if an initial switching state is N, a new state O can be selected after the positive offset voltage is injected. However, a state P cannot be selected after the offset voltage is injected, because the maximum offset voltage is limited as (27). Similarly, when the injected offset voltage is lower than zero, the reference voltage reduces. For instance, if a switching state before the negative offset voltage injection is P, the negative offset voltage injection enables a new state O to be selected after the injection. In addition, a switching state O without the negative offset voltage injection can change into a new state N after the offset voltage injection.
Table 2 shows the switching states that can be selected after injecting a positive or negative offset voltage, when the rectifier operates at the sector 1 in Figure 2. As shown in Figure 2, the switching state in the sector 1, before the offset voltage is injected, is (PON). After the positive offset voltage is injected to the state (PON) in the sector 1, the two states, (POO) and (PON), can be possible because of the boundary conditions of the offset voltage in (27) and the locations of the reference voltages in Figure 2. Likewise, the negative offset voltage injection in the sector 1 can result in the two states, (OON) and (PNN), from (27) and Figure 2.
In cases where the positive offset voltage is injected into the reference voltage v x * in the sector 1, new switching states can be (POO) and (PON) as shown in Table 2. The function M in (21) for the switching states (PPO) and (PON), by considering the polarity of the input currents in the sector 1, are given by (28) and (29), respectively.
S a 2 i a + S b 2 i b + S c 2 i c = i a + i b > 0
S a 2 i a + S b 2 i b + S c 2 i c = i a + i c > 0
Therefore, when v d i f f < 0 , meaning v c 1 < v c 2 , injecting the offset voltage higher than zero satisfies (21). Figure 3a,b show the capacitor current flow when the switching states are (POO) and (PON). In Figure 3a, the current flows only to the upper capacitor. Thus, the associated capacitor is charged. As shown in Figure 3b with i a = i b + i c , the upper capacitor charges. Thus, the new switching states after injecting the positive offset voltage in the sector 1, when the voltage difference v d i f f is lower than zero, can reduce the voltage difference by increasing the upper capacitor voltage, which can maintain the capacitor voltage balance.
On the other hand, injecting the negative voltage v o f f s e t into the reference voltage v x * in the sector 1 can generate new switching states (ONN) and (PNN) as shown in Table 2. The function M for the switching states (ONN) and (PNN) by considering the polarity of the input currents in the sector 1 are (30) and (31), respectively.
S a 2 i a + S b 2 i b + S c 2 i c = i b + i c < 0
S a 2 i a + S b 2 i b + S c 2 i c = i a + i b + i c = 0
Therefore, if the negative offset voltage is injected when the voltage difference v d i f f > 0 , meaning v c 1 > v c 2 , the new switching states generated after the offset voltage injection satisfies (21). Figure 4a,b show the capacitor current path with the switching states (ONN) and (PNN), respectively. As shown in Figure 4a, the lower capacitor is charged by the current flowing and the voltage v c 2 is increased. As a result, the voltage difference v d i f f , which was greater than zero, can be reduced, leading to the capacitor voltage balancing. Figure 4b shows the switching state (PNN), and the capacitor voltage does not change because no current flows through the neutral point, which gives no harmful effects on the capacitor voltage balancing.
Based on the same approach used in sector 1, relationships between the capacitor voltage difference and the sign of the offset voltage can be established in the other sectors from 2 to 12 in Figure 2. The sign of the offset voltage to retain the balance of the capacitor voltage can be defined, with the opposite sign of the capacitor voltage difference. Using (27) and sign information of the offset voltage, the offset voltage injected to the reference voltage is determined by the reference voltage and the dc-link voltage dependent on the capacitor voltages. Finally, the cost function of the proposed approach, which does not include the weighting factor to adjust the input current generation and the capacitor voltage balancing, is given by
g = | v a , r e f ( k + 1 ) v a ( k + 1 ) | + | v b , r e f ( k + 1 ) v b ( k + 1 ) | + | v c , r e f ( k + 1 ) v c ( k + 1 ) | .

4. Simulation and Experiment Results

In order to verify validity of the proposed predictive control method, simulation and experimental results using the three-phase three-level NP rectifier are presented. In the simulations and experiments, the ac input voltage = 100 (V), the reference output voltage V d c *   = 200 (V), the input resistance R i = 3 (Ω), the input inductance L i = 15 (mH), the sampling period T s = 50 (μs), the dc capacitance C = 2200 (μF) and the fundamental frequency of the input currents = 60 (Hz). Figure 5 shows simulation waveforms obtained by the NP rectifiers with the proposed control method. As shown in Figure 5a, the proposed control method with no weighting factors can produce sinusoidal input current waveforms in phase with the input voltage, leading to the unity power factor. In addition, the line-to-line rectifier voltage waveforms exhibit five levels. The frequency spectrum of the input current is depicted in Figure 5b, where the three-phase three-level NC rectifier yields spread frequency components due to the proposed predictive control algorithm. Figure 5c shows how the capacitor voltages are balanced by the proposed predictive control method with no weighting factor under a condition that the capacitor voltages were intentionally unbalanced, where the proposed control algorithm quickly eliminates capacitor voltage imbalance after the voltage balancing algorithm starts. Furthermore, Figure 5d shows the transient response waveform of the three-phase input currents and the capacitor voltages with a step change of the output reference voltage from 200 to 160 V.
Validity of the proposed algorithm was verified with a prototype of three-phase three-level NP rectifier built in the laboratory, operated with a Digital Signal Processor (DSP) board (TMS320F28335). Figure 6 shows experimental waveforms resulted from the proposed predictive control method employing no weighting factor. In Figure 6a, sinusoidal three-phase input currents are synthesized, which are in phase with the input voltage, leading to the unity power factor. Therefore, it is seen that the proposed method operating without the weighting factor generates sinusoidal input currents. Frequency analysis waveforms of the input currents of the proposed control method is also shown in Figure 6b. The experimental waveform in Figure 6c illustrates how quickly the capacitor voltages are balanced by the proposed method without a weighting factor to make the capacitor voltage balance when the capacitor voltages were intentionally unbalanced. As can be seen from Figure 6c, the proposed control method quickly eliminates capacitor voltage imbalance after the voltage balancing algorithm starts. Figure 6d shows transient response waveforms for the output voltage by the proposed algorithm, where the magnitude of the output voltage was exposed to a step-change from 200 to 160 V.

5. Conclusions

In this paper, the predictive control method that controls the three-phase three-level NP rectifier by adding the offset voltage to the reference voltage was proposed. The proposed predictive method can operate the NP rectifier without employing the weighting factor, whereas the conventional method with the weighting factor term in the cost function is exposed to burdensome redesign procedures of the weighting factor whenever the control conditions are changed. The offset voltage in the proposed method was defined to reduce the voltage difference of the upper and lower capacitor voltages. The generated reference voltages with the injected offset voltage not only generate the sinusoidal input currents with a unity power factor by generating five level line-to-line rectifier voltages, but also maintain the balance of the capacitor voltages when the capacitor voltage unbalance occurs. The validity of the proposed algorithm was verified through the simulation and experiment.

Author Contributions

Conceptualization, S.K.; methodology, S.K., E.-S.J.; software, E.-S.J.; validation, E.-S.J.; formal analysis, E.-S.J.; investigation, S.K., E.-S.J.; resources, S.K.; data curation, E.-S.J., M.H.N.; writing—Original draft preparation, E.-S.J., M.H.N.; writing—Review and editing, M.H.N.; visualization, E.-S.J.; supervision, S.K.; project administration, S.K.; funding acquisition, S.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported by the National Research Foundation of Korea (NRF), grant funded by the Korean government (MSIT) (2020R1A2C1013413).

Acknowledgments

This research was supported by the National Research Foundation of Korea (NRF), grant funded by the Korean government (MSIT) (2020R1A2C1013413).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Three-phase three-level NP rectifier.
Figure 1. Three-phase three-level NP rectifier.
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Figure 2. Sectors, input current polarity, switching states, maximum and minimum reference voltages of the rectifier with unity power factor.
Figure 2. Sectors, input current polarity, switching states, maximum and minimum reference voltages of the rectifier with unity power factor.
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Figure 3. Capacitor current flow of sector 1 with switching status: (a) (POO); (b) (PON).
Figure 3. Capacitor current flow of sector 1 with switching status: (a) (POO); (b) (PON).
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Figure 4. Capacitor current flow of sector 1 with switching status: (a) (ONN); (b) (PNN).
Figure 4. Capacitor current flow of sector 1 with switching status: (a) (ONN); (b) (PNN).
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Figure 5. Simulation results of (a) three-phase input currents, a-phase input voltage, and line-to-line rectifier voltage (b) frequency spectrum of input current (c) capacitor voltages under conditions with intentional voltage unbalances (d) input currents and capacitor voltages with step change of output reference voltage from 200 to 160 V.
Figure 5. Simulation results of (a) three-phase input currents, a-phase input voltage, and line-to-line rectifier voltage (b) frequency spectrum of input current (c) capacitor voltages under conditions with intentional voltage unbalances (d) input currents and capacitor voltages with step change of output reference voltage from 200 to 160 V.
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Figure 6. Experimental results of the proposed predictive control method with no weighting factor (a) three-phase input currents and a-phase input voltage (b) frequency spectrum of input current (c) capacitor voltages and line-to-line rectifier voltage (c) capacitor voltages balancing under voltage unbalanced condition (d) capacitor voltages and input current with step change of reference output voltage from 200 to 160 V.
Figure 6. Experimental results of the proposed predictive control method with no weighting factor (a) three-phase input currents and a-phase input voltage (b) frequency spectrum of input current (c) capacitor voltages and line-to-line rectifier voltage (c) capacitor voltages balancing under voltage unbalanced condition (d) capacitor voltages and input current with step change of reference output voltage from 200 to 160 V.
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Table 1. States and pole voltage of NP rectifier depending on switch status.
Table 1. States and pole voltage of NP rectifier depending on switch status.
Switching
State
Switching Status (x = a,b,c)Pole Voltage
S x 1 S x 2 S x 3 S x 4 v x
PONONOFFOFF V d c / 2
OOFFONONOFF0
NOFFOFFONON V d c / 2
Table 2. States after the offset voltage is injected, the sign of the injected offset voltage, and the sign of input currents in a case of sector 1.
Table 2. States after the offset voltage is injected, the sign of the injected offset voltage, and the sign of input currents in a case of sector 1.
v o f f s e t S a i a S b i b S c i c
+ P + O O
PON
ONN
PNN

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MDPI and ACS Style

Jun, E.-S.; Nguyen, M.H.; Kwak, S. Three-Phase Three-Level Neutral Point Clamped Rectifier with Predictive Control Method without Employing Weighting Factor. Appl. Sci. 2020, 10, 5149. https://doi.org/10.3390/app10155149

AMA Style

Jun E-S, Nguyen MH, Kwak S. Three-Phase Three-Level Neutral Point Clamped Rectifier with Predictive Control Method without Employing Weighting Factor. Applied Sciences. 2020; 10(15):5149. https://doi.org/10.3390/app10155149

Chicago/Turabian Style

Jun, Eun-Su, Minh Hoang Nguyen, and Sangshin Kwak. 2020. "Three-Phase Three-Level Neutral Point Clamped Rectifier with Predictive Control Method without Employing Weighting Factor" Applied Sciences 10, no. 15: 5149. https://doi.org/10.3390/app10155149

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