Capacitor Voltage Balancing with Online Controller Performance-Based Tuning for a Switch-Sharing-Based Multilevel Inverter

Abstract

Switch-sharing-based multilevel inverters offer great advantages in terms of efficiency improvement and output quality enhancement for low-power photovoltaic (PV) applications. However, the capacitor voltage balancing issue may critically deteriorate the output voltages, and thus could nullify the aforementioned benefits. Hence, this paper proposes a capacitor voltage balancing solution based on a buck-boost converter with performance-based tuning controllers to address the issue. The proposed controllers are designed based on the proportional-integral (PI) configuration equipped with an online tuning mechanism. The main purpose of the online tuning mechanism is to fine tune the proportional gain according to the DC input voltage, based on the measured output current total harmonic distortion (THD) performance of the inverter, while at the same time preventing the controller from reaching a state of saturation. By using the actual measurement of current THD performance, online tuning accuracy can be improved since no ideal condition is assumed, and thus, the associated error can be minimized. Simulation and experimental results reveal that the capacitor voltages can be balanced at high modulation indexes with improved current harmonic performance able to be be acquired at the inverter’s output.

1. Introduction

Energy sustainability has gained increasing attention, which has brought about the reinforcement of numerous efforts to utilize renewable energy and improve energy efficiency. One of those efforts includes the application of multilevel inverters in solar PV systems. Multilevel inverters, which come from a family of power electronic converters, have the potential to play an important role. As the central component of a solar PV system, an inverter with high efficiency and good output quality is always favorable. In fact, the prospect of acquiring both high efficiency and high output quality would be better, especially when the inverter is of a multilevel type.

Since the last decades, the presence of multilevel inverters in various applications has grown tremendously as a result of their high power capability with increasing voltage levels [1]. There are at least three well-known classical multilevel inverters—diode-clamped multilevel inverters (DCMI), cascaded multilevel inverters and flying capacitor multilevel inverters [2,3,4,5,6]. These inverters offer several advantages in comparison to the traditional two-level inverters such as low THD and low electromagnetic interference (EMI) [4]. Owing to these advantages, they have been widely used not only in renewable energy systems but also in static compensators (STATCOM), variable speed motor drives, and high-voltage direct current transmission applications [7,8,9,10,11]. The circuit complexity of a classical multilevel inverter typically increases as the number of levels increases. This contributes to reduction in the reliability as well as complicated control of the inverter. As a result, many new multilevel inverter topologies have been proposed [12,13] to overcome the problems encountered in the classical multilevel inverters, and one of them is the switch-sharing-based multilevel inverter.

Figure 1 presents the circuit topology of the three-phase five-level switch-sharing-based multilevel inverter [14]. The switch-sharing-based multilevel inverter is modified from the full-bridge configuration with a switch-sharing capability. The inverter offers advantages for low power solar PV applications including lower harmonic contents and enhanced output quality [15]. However, it has a shortcoming that is quite similar to that of the DCMI. The main problem is the unbalanced capacitor voltages at the DC-link, for voltage levels more than three [16]. This problem deteriorates as the number of levels increases. In a five-level switch-sharing-based multilevel inverter, four DC-link capacitors may experience unbalanced voltage across each of them when they are not charged and discharged accordingly. This voltage-drift phenomenon deteriorates the AC-side voltage waveforms and consequently results in an unsatisfactory performance. Therefore, finding a proper solution is paramount since this affects the operation and performance of the inverter.

As for DCMI, there are two possible solutions that can be adopted to overcome the unbalanced voltage problem. One solution is via the modification of the pulsewidth modulation (PWM) switching pattern [17,18,19,20,21]. The switching pattern is normally selected from the redundant switching states. It is observed that many researchers prefer this method, so as to avoid extra cost since there is no additional circuit needed. However, the limitation of this method lies in the control complexity and the range of the modulation index allowed. Another solution is via the implementation of a voltage balancing circuit on the DC side of the inverter [22]. The use of the voltage balancing circuit based on a buck-boost converter is most commonly employed to balance the capacitor voltages [23,24]. A single-pulse control, which is regarded as one of the easiest methods, has been adopted. Multi-pulse control would also be another option when single-pulse control may seem inappropriate. Another auxiliary circuit is the three-level flying-capacitor-based chopper for a three-phase DCMI [25]. This circuit is well-recognized in reducing voltage stress across chopper switches and in improving reliability. Despite the advantages offered, the control philosophy of the chopper could become complicated and tedious owing to the high number of switches required. Meanwhile, [26] proposes a resonant switched-capacitor converter (RSCC) for a new voltage balancing circuit with new phase shift control, in order to enhance the performance of voltage balancing. As compared to the buck-boost converter, RSCC can reduce the inductor to one tenth in volume. However, the increased number of switches used can be an issue. This would consequently turn the control system to a more complex capacitor voltage balancing scheme. In [27], a parallel switch-based chopper is proposed with the application of hysteresis control scheme. However, the main problem is the fact that additional components are needed, which would result in an increase in cost and circuit complexity.

Various control approaches have been proposed for the capacitor voltage balancing purpose. Among these approaches is the application of a fuzzy controller, model predictive controller and proportional-resonant controller. Fuzzy controller application with a self-tuning capability for capacitor voltage balancing has been revealed to be used with a PI controller to control DC bus voltage and capacitor unbalanced voltage in the three-level boost converter [28]. It is reported that the output capacitor balance voltage is guaranteed with a low quadratic error. In an input-series output-series (ISOS) modular DC-DC converter, a modified model predictive control (MPC) known as the duty cycle-based MPC (DC-MPC) has been proposed to address the capacitor voltage imbalance issue [29]. The difference between the proposed DC-MPC and the conventional MPC is the fact that the proposed DC-MPC optimizes duty cycles with a fixed switching frequency instead of employing optimized switching states with variable switching frequency. By predicting the effects on input voltage sharing (IVS) and output voltage sharing (OVS) of the constituent modules, the optimized duty cycles can be determined. With the optimized duty cycles, the proposed DC-MPC can quickly attempt to achieve IVS and OVS when imbalances exist among the input capacitor and output capacitor voltages of the ISOS converter. In another paper [30], the use of the quasi-proportional-resonant controller has been presented. The controller has been applied in an inter-arm balancing method that would guarantee an even distribution of capacitor voltages without affecting the input/output power quality.

As previously mentioned, the switch-sharing-based multilevel inverter would suffer from the capacitor voltage imbalance problem when no proper voltage balancing solution is put in place. Considering the fact that no such solutions have been properly presented for this type of multilevel inverter, to the best knowledge of the authors, it is the purpose of this paper to present a study on the capacitor voltage balancing solution based on an online tuning-controlled buck-boost converter for a five-level configuration of this type of multilevel inverter, taking into account the inverter’s output performance.

The contributions of this paper can be summarized as follows:

• We propose a capacitor voltage balancing solution based on a buck-boost converter with performance-based-tuning controllers for a five-level switch-sharing-based inverter.
• The proposed controllers are based on the PI configuration that is integrated with an online tuning module to fine tune the proportional gain according to the DC input voltage.
• The online tuning mechanism uses the actual performance of the inverter based on the measured value of the output current THD to execute the tuning process.
• By using the actual measurement of current THD performance, online tuning accuracy can be improved since no ideal condition is assumed, and thus, the associated tuning error can be minimized.
• Both simulation and experimental results confirm that the proposed solution with the proposed controllers improve the step response and steady-state performances while ensuring the quality of the inverter’s output current and the capacitor voltage ripples remain intact.
• Owing to the simplicity of the online tuning mechanism that is equipped in the proposed controllers, real-time implementation issues faced with other controllers such as high computational cost and infinite gain can be prevented, thus making the proposed solution attractive to fill in the gap for practical applications.

In Section 2, the details of the suggested voltage balancing circuit are described. Section 3 and Section 4 present the proposed control strategy with an online tuning mechanism for the proposed PI controllers. Then, Section 5 and Section 6 present the simulation studies of the controllers. Next, Section 7 discusses the experimental results and finally Section 8 provides the concluding remarks.

2. Two-Bidirectional Buck-Boost Converter for Capacitor Voltage Balancing

2.1. Capacitor Voltage Imbalance in a Five-Level Switch-Sharing-Based Multilevel Inverter

A topology of a three-phase five-level switch-sharing-based multilevel inverter is considered here and its circuit configuration is shown in Figure 1. It consists of 12 switches in which six bidirectional switches are used with four DC-link capacitors, wherein each capacitor voltage is equal to V_in/4. V_in is the total DC-link voltage across the four capacitors. To optimize the operation of bidirectional switches, each switch is shared among the three phases. In order to avoid a short circuit across the DC source, only one switch is allowed to be turned ON while the others are turned OFF. The details of the topology structure and operational principles of the inverter can be found in [14]. Due to unequal capacitance leakage currents and unequal delays in semiconductor devices, the inverter suffers from the capacitor voltage imbalance problem. In Figure 2, it can be observed that the outer capacitors (C₁ and C₄) continue to charge (i.e., V₁ and V₄ increase) and the inner capacitors (C₂ and C₃) continue to discharge (i.e., V₂ and V₃ decrease) when the DC source, V_in is set at 200 V and the modulation index is 0.9 during the period of no voltage balancing control in place. This will result in unbalanced voltages with a compromised quality to be observed in the inverter’s output waveforms.

Considering that the switch-sharing-based multilevel inverter has some similarities to DCMI, it would be reasonable that somewhat similar solutions of capacitor voltage balancing in DCMI could be considered and applied in the switch-sharing-based multilevel inverter. Since redundant switching states are not available for this inverter [14], modification of the PWM strategy is therefore not applicable. Hence, the proposed buck-boost converter is considered to serve the purpose of voltage balancing circuit in a five-level switch-sharing-based multilevel inverter. As mentioned in Section 1, the balancing circuit based on the parallel-switch-based chopper uses a smaller number of switches as compared to that of the buck-boost converter. However, a parallel-switch-based chopper is not suitable for the switch-sharing-based multilevel inverter since the simulation study shows that the chopper is not able to balance the capacitor voltages at high modulation indexes. Therefore, the buck-boost converter is considered for capacitor voltage balancing in the switch-sharing-based multilevel inverter.

2.2. Operation of the Buck-Boost Converter in Different Modes

In Figure 3, the circuit configuration of a two-bidirectional buck-boost converter proposed for capacitor voltage balancing in a five-level switch-sharing-based multilevel inverter is presented [24]. In general, the buck-boost converter circuit is the simplest topology, which requires four power switches (S₁, S₂, S₃ and S₄), and two inductors (L₁ and L₂) for connection to four DC-link capacitors (C₁, C₂, C₃ and C₄).

The circuit operates by transferring energy between the capacitors through the switches, inductors and diodes. In this work, the buck-boost converter circuit is divided into two separate parts which are the upper and the lower parts. The power switches in each part are switched ON or OFF in a complementary manner. This is to avoid a short circuit if all switches S₁, S₂, S₃ and S₄ are turned ON simultaneously. In the upper part of the circuit, S₁ and S₂ are complementary switches to allow energy transfer between capacitors C₁ and C₂ through diodes D₁ and D₂ and inductor L₁. In the lower part of the circuit, S₃ and S₄ are also complementary switches. They are used to control the energy transfer between capacitors C₃ and C₄ through inductor L₂ and diodes D₃ and D₄.

Figure 3 also presents different operating modes of the converter for charging and discharging the capacitors in both parts of the circuit. The paths of the current flow in all modes are shown in the figure. A controller controls switches S₁, S₂, S₃, and S₄ accordingly so that four capacitor voltages can be equally balanced. Figure 3a shows that S₂ is turned ON to allow the charging of capacitor C₁ and the discharging of capacitor C₂ while S₁ is turned OFF. In the lower part of the circuit, S₃ is turned ON and S₄ is turned OFF so that capacitor C₄ is charging while capacitor C₃ is discharging.

As S₂ and S₃ are ON during mode 1, they will be OFF during mode 2. Capacitors C₂ and C₃ are starting to charge, while capacitors C₁ and C₄ automatically start to discharge. For mode 3, S₂ and S₄ are turned ON to allow the charging of capacitors C₁ and C₃, and S₁ and S₃ are turned OFF as they are complementary to S₂ and S₄. As a result, capacitor C₂ and C₄ are discharged. During mode 4, capacitors C₂ and C₄ will start charging when S₁ and S₃ are turned ON. Opposite to that, S₂ and S₄ are turned OFF to allow capacitors C₃ and C₁ to discharge. The processes of charging and discharging continue until the capacitors are fully charged and all the capacitor voltages are at their reference values.

3. Control Algorithm

The literature reveals that various controllers have been used for the purpose of capacitor voltage balancing. Examples include a fuzzy controller [28], model predictive controller [29] and proportional-resonant controller [30]. In this work, a PI controller is selected owing to its simple structure and robust performance that can be achieved in a wide range of operating conditions [31,32,33]. Another advantage is that the steady-state error can be reduced or eliminated altogether. Figure 4 presents the block diagram of the PI controllers. Four DC-link capacitors are connected between the converter and the inverter. The voltages across each of the capacitors are denoted by V₁, V₂, V₃ and V₄. In order to achieve voltage balance, each capacitor is set to have a reference voltage of V_in/4. Since there are two separate parts in the converter circuit, two controllers are applied. Each PI controller is used to minimize the error between two capacitor voltages, which then leads to the derivation of the controller output. Here, e₁(t) is the error obtained by subtracting V₂ from V₁. Meanwhile, e₂(t) is the error between two capacitor voltages, V₄ and V₃. In the upper part of the circuit, upper proportional gain K_pU and upper integral gain K_iU are used to minimize e₁(t), and for the lower part of the circuit, lower proportional gain K_pL and lower integral gain K_iL are used to minimize e₂(t). Equations (1) and (2) define the controller outputs y_U(t) and y_L(t) for the upper and lower parts, respectively, which are obtained by summing the proportional and integral terms as follows:

y_U(t) = K_pUe₁(t) + K_iU∫e₁(t) dt

(1)

y_L(t) = K_pLe₂(t) + K_iL∫e₂(t) dt

(2)

The power switches are switched ON or OFF based on the applied switching signals. Here, y_U(t) and y_L(t) are compared with the carrier signal in order to generate the switching signals or the gate signals as shown in Figure 4. The carrier waveform is generated according to certain frequency and amplitude so that the power switches can be properly switched ON or OFF. This is to ensure that the capacitor voltages are always directed to their respective references. The switching pattern depends on the need of either discharging or charging the capacitors. However, it is important to note that until there is an attainment of full charging of the capacitors, the discharging and charging processes would be continuously repeated.

4. Proposed PI Controllers with Online Tuning Mechanism

Assessment of each controller’s performance is carried out under both the steady-state and dynamic conditions. For this purpose, a step change in V_in is introduced in order to investigate the controller’s response. As an approach to improve this response, an online tuning mechanism has been suggested. A number of tuning methods have been proposed in the literature [34,35,36]. In this paper, a different tuning algorithm is proposed to add an online tuning feature to the PI controller. The proposed PI controller is basically modified based on the conventional PI controller described in Section 3. Two proposed PI controllers with the online tuning method are employed to control V_1, V₂, V₃ and V₄, as portrayed in Figure 5. As compared to the conventional PI controller, the proposed PI controller consists of an additional component in its structure, which is the online tuning module. Here, V_in signal is required in the online tuning module, so that proper adjustment can be made according to the change in V_in. In this work, the tuning algorithm is designed to tune K_pU and K_pL. At the same time, K_iU and K_iL, and the anti-windup parameters for both parts remain unchanged. Then, y_U(t) and y_L(t) are compared with the carrier signal to produce the switching signals. As shown in Figure 5, the switching signals of S₁ and S₂ are complementary to each other. The same also goes for S₃ and S₄.

Figure 6 presents the flowchart of the online tuning algorithm for the upper part of the buck-boost converter. Five equations are derived to generate a new K_pU. Derivation of these equations is made based on the correlation between K_pU and V_in that is established after a preliminary testing is carried out. In this testing phase, actual measurement of the output current THD of the inverter is used to build the aforementioned correlation so that tuning error due to the ideal-condition assumption can be minimized. Further details of the preliminary testing are provided in Section 7.

Firstly, the present value of V_in is checked for whether it is similar to its previous value (stored in V_in,old). V_in,old is updated to the present value if it is different from the previous value. The new K_pU is calculated based on the present value of V_in. Then, the previous value of K_pU, K_pU,old is updated to the new K_pU. If V_in is between 0 V and 60 V, the new K_pU is calculated as below:

K_pU = 0.05 V_in − 1

(3)

A new K_pU is constant at 2 if V_in is between 60 V and 80 V. If V_in is between 80 V and 100 V, the new K_pU is given by the equation below:

K_pU = 0.05 V_in − 2

(4)

If V_in is between 100 V and 280 V, the new K_pU is constant at 3. The new K_pU is calculated as below if V_in is between 280 V and 300 V:

K_pU = −0.05 V_in + 17

(5)

If V_in is the same as V_in,old, then K_pU is checked for whether it is within the allowable K_pU band. K_pU band is defined as the range between the maximum and minimum limits of K_pU. The reason K_pU must be within the defined range is to maintain capacitor voltages balanced while ensuring that the lowest output current THD can be achieved. If K_pU is higher than the maximum limit K_pU,high, the new K_pU is evaluated by the equation below:

K_pU = K_pU,old − 0.01

(6)

Then, K_pU,old is updated to the new value of K_pU. The same procedure applies for the case when K_pU is lower than the minimum limit K_pU,low. The new K_pU is calculated by increasing K_pU,old as stated by the equation below:

K_pU = K_pU,old + 0.01

(7)

These steps are repeated in the following iterations until K_pU lies within the K_pU band. For the case when V_in is the same as V_in,old and K_pU is within the defined range, the controller will stop tuning. As for the lower part of the buck-boost converter, the tuning algorithm is presented in Figure 7. The flow of the tuning process for the lower part is the same as that of the upper part except for the different equations of K_pL. As previously stated, derivation of the equations is also based on the correlation between K_pL and V_in, resulting from the preliminary testing described in Section 7. There are five equations to calculate the new K_pL if V_in is not the same as V_in,old.

If V_in is between 0 V and 60 V, the new K_pL is calculated based on the equation below:

K_pL = 0.05 V_in − 1

(8)

If V_in is between 60 V and 80 V, the new K_pL is updated at 2. The new K_pL is given by the equation below if V_in is between 80 V and 100 V.

K_pL = −0.05 V_in + 6

(9)

K_pL is constant at 1 if V_in is between 100 V and 280 V. For V_in between 280 V and 300 V, new K_pL is calculated based on the equation below:

K_pL = 0.05 V_in − 13

(10)

Then, K_pL,old is updated to the new value of K_pL. For the case when V_in is similar to V_in,old, K_pL is checked for whether it is within the allowable K_pL band. If K_pL is higher than K_pL,high, K_pL is calculated by decreasing K_pL,old by 0.01. The same step applies for the case when K_pL is lower than K_pL,low. The new K_pL is evaluated by increasing K_pL,old by 0.01. Then, K_pL,old is updated to the new K_pL. These steps continue until K_pL lies within the acceptable range.

5. Simulation Results

The simulation work was performed using MATLAB/SIMULINK in order to investigate the performance of the proposed and conventional PI controllers. A Y-connected RL load with R = 120 Ω and L = 69 mH was connected to the inverter. V_in was fixed at 200 V; thus, the reference voltage was 50 V (i.e., V_in/4), the inductors were set as L₁ = L₂ = 12 mH, the capacitors were 2200 μF each, the modulation index used was 0.9 and the switching frequency was 5 kHz. The conventional PI controller is designed to have a constant K_pU and K_pL of 2, and a constant K_iU and K_iL of 0.001. The proposed PI controller has varying K_pU and K_pL that is tuned using the online tuning algorithm, while K_iU and K_iL are kept at 0.001. Step responses were investigated as a result of a change in V_in. This is to verify the effectiveness of the online tuning mechanism. V_in changes between 60 V and 200 V with a step response were set to occur at t = 0.03 s. The time duration for the simulation was 0.1 s. The simulation results are presented in Figure 8 and Figure 9 for without and with tuning, respectively. It can be seen that all capacitor voltages are able to be balanced even after a change in V_in. The inverter’s output shows satisfactory results as the line-to-line voltage, V_AB, is able to produce nine voltage levels in the waveform. The output phase voltage, V_AN, and output current, I_A, indicate good results as well. It is observed that the capacitor voltage ripples with the application of the online tuning mechanism is estimated at 2 V, whereas the capacitor voltage ripples without online tuning is around 4 V. In addition, after V_in change, the output current THD is recorded to be lower when there is online tuning employed. The results show that only 3.09% THD when there is online tuning as compared to 3.42% for without online tuning. This verifies that the online tuning algorithm contributes to the improvement made in the capacitor voltages ripples and the output current THD.

6. Analysis of Power Loss and Efficiency

Power loss and efficiency analysis is carried out in order to study the impact of the online tuning mechanism in reducing power loss, improving efficiency and contributing to a uniform distribution of power loss among switches. In order to properly evaluate the effectiveness of the tuning scheme, a comparison is made between the proposed PI controller and the conventional PI controller. Power loss is highlighted in the calculation of conduction loss and switching loss. In this analysis, the power switches chosen are IGBT model IRG4PC40UDPbF from International Rectifier. From the IGBT datasheet, relevant points are extracted to obtain several curves for the calculation of the losses. A MATLAB curve-fitting tool is used to derive the mathematical models for the IGBT as given below:

$${\mathrm{V}}_{\mathrm{CE}}=3.141e^{0.003496i\left(t\right)}-2.296e^{-0.01392i\left(t\right)}$$

(11)

$${\mathrm{V}}_{\mathrm{FW}}=1.396e^{0.009157i\left(t\right)}-0.5844e^{-0.1733i\left(t\right)}$$

(12)

$${\mathrm{E}}_{\mathrm{SL},\mathrm{IGBT}}=15.62(e^{0.009769i\left(t\right)}-e^{0.009764i\left(t\right)})$$

(13)

Here, V_FW is the forward voltage drop, V_CE is the collector-to-emitter voltage, E_SL,IGBT is the sum of the IGBT switching energy loss and i(t) is the current flowing via the IGBT. In order to determine the conduction loss of the IGBT, the following equations are used:

$${\mathrm{P}}_{\mathrm{CL},\mathrm{Diode}}=\frac{1}{T_{PO}} \int {\mathrm{V}}_{\mathrm{FW}} \mathrm{i}(\mathrm{t}) \mathrm{dt}$$

(14)

$${\mathrm{P}}_{\mathrm{CL},\mathrm{IGBT}}=\frac{1}{T_{PO}} \int {\mathrm{V}}_{\mathrm{CE}} \mathrm{i}(\mathrm{t}) \mathrm{dt}$$

(15)

Here, P_CL,Diode and P_CL,IGBT are the conduction losses of diodes and IGBTs, respectively, and T_PO is the period for one cycle. The overall switching power loss of IGBTs, P_SL,IGBT is given as follows:

$${\mathrm{P}}_{\mathrm{SL},\mathrm{IGBT}}=\frac{1}{T_{PO}} \sum {\mathrm{E}}_{\mathrm{SL},\mathrm{IGBT}}$$

(16)

The switching loss of diode, E_SL,DIODE is estimated by multiplying the reverse recovery time with the reverse recovery current as well as the reverse voltage drop resulting in:

$${\mathrm{E}}_{\mathrm{SL},\mathrm{DIODE}}=(16.2e^{0.003252i\left(t\right)}-10.4e^{-0.076497i\left(t\right)}-1.815e^{-0.076441i\left(t\right)}+1.166e^{-0.1562i\left(t\right) })\times {10}^{-6}$$

(17)

Consequently, the total switching power loss of diodes, P_SL,DIODE is determined as below:

$${\mathrm{P}}_{\mathrm{SL},\mathrm{DIODE}}=\frac{1}{T_{PO}} \sum {\mathrm{E}}_{\mathrm{SL},\mathrm{DIODE}}$$

(18)

The total power loss, P_L is the sum of conduction and switching losses, which is represented in the following:

P_L = P_CL,DIODE + P_CL,IGBT + P_SL,DIODE + P_SL,IGBT

(19)

The equation below is used to calculate the efficiency, η of the converter, in which P_O stands for the output power of the converter:

$$\mathsf{\eta }=\frac{{\mathrm{P}}_{\mathrm{O}}}{{\mathrm{P}}_{\mathrm{O}}+{\mathrm{P}}_{\mathrm{L}}} \times 100\%$$

(20)

MATLAB/SIMULINK is utilized to conduct the power loss simulation with the same condition as presented in Section 5. Figure 10 displays the simulation results, which indicate that the higher the modulation index, then the higher the total power loss and efficiency become. The improvement in efficiency is contributed to the rise in the output power, which is more than the increase in power loss. The highest power loss recorded for the proposed controller is 6.14 W at a modulation index of 1.0. This is lower than the power loss when the conventional controller is applied, namely 6.65 W that occurs at 0.9 modulation index. The highest efficiency achieved for the proposed controller is 96.9% at 1.0 modulation index, which is slightly higher than that when the conventional controller is employed. The distribution of the power loss among the power switches that are observed at 0.9 modulation index is shown in Figure 10c. The power loss for every power switch accounts for both conduction and switching losses of the IGBTs. With the application of the proposed controller, each switch records almost identical power loss compared to varying power loss which is observed when the conventional controller is used. In other words, uniform distribution of power loss among the switches can be successfully achieved with the use of the proposed controller.

7. Experimental Investigation

7.1. Hardware Setup

An experimental hardware setup has been built to validate the effectiveness of the voltage balancing circuit based on the buck-boost converter with the proposed controller. It basically consists of an inverter prototype, a buck-boost converter, load of RL type and a single DC source as presented in Figure 11 and Figure 12. Here, the PV source is represented by a single DC supply that provides V_in. Additionally, four DC-link capacitors are connected between the inverter and the converter, and each capacitor reference voltage is equal to V_in/4. The power circuit and the control unit are the two main parts in the hardware construction of the buck-boost converter. The main power circuit comprises the semiconductor power devices, dead band generators and gate drives. Four power switches (IGBT model IRG4PC40UD) are used. In order to prevent voltage surges during turning OFF, each IGBT is connected to an RC (resistive-capacitive) snubber. The value of the RC snubber used in this experiment is 10 Ω and 1 nF. To complete the power circuit, dead band generators and gate drives were added. The dead band generators produce a blanking time of 1 μs to ensure that the power switches are not turned ON at the same time, thus avoiding a short circuit across the DC source. The gate drives provide isolation between the power circuit and the control unit for protection purposes, and also increase the voltage level of the switching signals to +15 V for the IGBTs to operate. To measure the voltages and currents for the control unit to use as inputs, voltage and current sensors of models LV25P and LA25-NP from LEM were used.

The control unit is represented by the controller board eZdsp TMS320F2812. The control algorithm for the capacitor voltage balancing was implemented on a 32-bit fixed-point digital signal processor (DSP) for real-time application. The analogue-to-digital (ADC) module, event manager timers and general input/output ports are special features in eZdsp board, which are used for DSP programming.

To capture the results of the inverter output and capacitor voltages, oscilloscope is used.

Table 1. Values of circuit components.

Component	Values
DC-link capacitor	2200 µF
Inductor of buck-boost converter	12 mH
R load	120 Ω
L load	69 mH

shows the circuit components’ values. The inverter load consisted of a three-phase load of 120 Ω and 69 mH per phase. The experiment was set at a modulation index of 0.9 so that nine voltage levels could be obtained in the line-to-line output voltage waveforms. A switching frequency of 5 kHz was applied.

7.2. Results

The experiments are divided into two stages—preliminary testing and comparative testing. In the preliminary testing stage, experiments were conducted to derive the relationships between K_pU and V_in as well as K_pL and V_in for the online tuning module as described in Section 4. The selection of K_pU and K_pL was made in a manner that would balance the capacitor voltages at a given V_in that is adjusted between 0 V and 300 V. In order to carry out this selection, a trial-and-error method was adopted. This approach is preferred because it involves actual measurement of the output current THD using a power analyzer for a given V_in to derive the optimum values of K_pU and K_pL. The optimum values refer to K_pU and K_pL values that are associated with the lowest output current THD measured for every V_in. The use of actual measurement improves the accuracy and credibility of the K_pU and K_pL selected since no ideal condition is assumed, and thus, the error that is due to the assumptions and estimation made in an ideal condition can be minimized. In addition, when the optimum K_pU and K_pL are used, the controller is able to run at the optimum operating point, which in turn enables the best output performance of the inverter to be retained. This is critical since in most cases, changes in V_in would likely cause the controller to deviate from its optimum operating point since the reference voltages for the capacitors also change. As a result, the performance of the multilevel inverter may deteriorate. While the values of K_pU and K_pL are varied, the values of K_iU and K_iL are not required to be changed. This helps reduce complexity in the proposed tuning scheme. By using the MATLAB curve-fitting tool, the relationships between K_pU and V_in as well as K_pL and V_in are formed. Based on the established relationships, five equations are derived for K_pU in the upper part of the buck-boost converter at every V_in change between 0 V and 300 V, as explained in Section 4. A similar method applies to the lower part of the converter. Hence, with the application of online tuning mechanism, the proposed PI controller attempts to keep V₁, V₂, V₃ and V₄ balanced via the adjustment of the proportional gain only without modifying the integral gain and the anti-windup parameters.

In the comparative testing stage, the performance of the proposed controller and the conventional controller are analyzed and compared. Here, two experimental conditions have been assessed. In the first condition, experiments with the proposed controller were performed. On the other hand, the conventional controller was applied for the second condition. Similar parameters were used in both conditions, as displayed in Table 1. Figure 13 displays the step response and steady-state performances when the online tuning mechanism is applied. The results show that the proposed online tuning mechanism is able to maintain all capacitor voltages around their reference values between 15 V and 50 V when V_in changes between 60 V and 200 V. The rise time, peak time and settling time are recorded as 6, 8 and 12 ms, respectively. For the step-down response, the fall time is measured as 6 ms. The percent overshoot is calculated as 6%. Figure 14c shows the harmonic content of the output current with a THD of 4.46%. V_AB, as presented in Figure 14a,b, displays that nine-level waveforms have been produced. Similarly, V_AN and I_A also reflect satisfactory performances.

In the second condition, the experiment without the tuning scheme was conducted. The conventional controller is designed with constant K_pU and K_pL as well as fixed K_iU and K_iL which are, respectively, 2 and 0.001, regardless of the change in V_in. For further examination of the controller’s performance during the step response and steady-state condition, Figure 15 is provided as an illustration. The results show that all capacitor voltages are able to be kept around their respective references. The rise time, fall time, peak time and settling time are recorded as 9, 13, 12 and 200 ms, respectively.

The percent overshoot is calculated to be around 20%. THD of the output current is 4.92%, as displayed in Figure 16c. It can be noticed that these values are worse than those when the online tuning mechanism is applied.

7.3. Discussion of Main Results and Comparison with Other Control Strategies

The comparison between the simulation results and the experimental results by using the proposed online tuning mechanism are analyzed. Both results are compared in terms of the peak-to-peak capacitor voltage ripples, output current THD and rise time. For the peak-to-peak capacitor voltage ripples, the simulation result shows a value of 2 V while the experimental result indicates a value of 3 V. For the output current THD, the simulation result indicates 3.09% whereas the experimental result records 4.46%. The experimental result also reveals a higher rise time after a V_in change from 60 V to 200 V, namely, 6 ms, as compared with that of the simulation result, which is only 0.1 ms. Overall, the experimental results are observed to have higher readings in the peak-to-peak capacitor voltage ripples, output current THD and rise time as opposed to those of the simulation results. Nonetheless, this difference is expected since the simulation condition normally assumes an ideal case while the experimental condition takes into account various factors in a real environment such as external disturbances, instrument limitations and hardware constraints.

The experiment without the online tuning scheme shows that the capacitor voltage ripples are quite significant during the steady-state condition. Figure 15a,b show that the peak-to-peak capacitor voltage ripples reach up to 15 V. With the proposed online tuning method, the peak-to peak capacitor voltage ripples are able to be reduced to 3 V, as shown in Figure 13a,b. Figure 16 also displays that without the online tuning mechanism, V_AB also takes the form of a nine-level waveform. I_A and V_AN also indicate satisfactory performances. The results show that the dynamic performance with the online tuning mechanism have been improved as compared with the results without tuning. The effectiveness of the proposed PI controller with the proposed online tuning method has been validated through the improved performance achieved. At the same time, the inverter output shows satisfactory results, and the capacitor voltages are able to be balanced at the reference values with less ripples.

As stated in Section 1, various control approaches have been proposed for the purpose of capacitor voltage balancing. These include those that apply a fuzzy controller, model predictive controller and proportional-resonant controller. Despite the fact that these control approaches can also offer desirable solutions, there is still a concern with regard to the real-time implementation issue. The fuzzy controller and model predictive controller may suffer from high computational cost. As for the proportional-resonant controller, the need for infinite gain in order to perform well would lead to a difficulty for practical implementation. On the other hand, the proposed controller is based on the PI configuration and it is well-known that owing to its simplicity, the PI controller has been widely used in industrial applications. Although there is an online tuning module in the proposed controller’s structure, the fact that the tuning mechanism is simple will not result in high computation. Hence, the proposed control strategy that employs the proposed controller is indeed attractive and practical for possible real-time implementation in industry.

8. Conclusions

This paper investigates the effectiveness of the proposed performance-based-tuning controllers for the buck-boost converter to balance the capacitor voltages of a five-level switch-sharing-based multilevel inverter. The buck-boost converter is chosen since it offers the simplest configuration, consisting of four power switches and two inductors, which are connected to four DC-link capacitors. In addition, the complexity of the control approach is considered low since the proposed online tuning mechanism is applied to the proportional gains without the need to adjust the integral gains. With the online tuning module incorporated in the controller’s structure, the proposed PI controller is performed to improve the step response and steady-state performances while ensuring the quality of the inverter’s output current and the capacitor voltage ripples remain intact. The simulation study shows that the proposed online tuning mechanism improves the quality of the output current, voltage ripples and efficiency as compared with those when no online tuning mechanism is applied. The highest efficiency is recorded at 96.9%, which is approximately 1.0% higher than the efficiency attained when no online tuning is employed. Two stages of the experimental investigation have been conducted to verify the efficacy of the proposed online tuning approach. In the preliminary testing stage, the online tuning mechanism that is based on the correlation between the proportional gains and the input voltage has been established considering the actual measured output current THD of the inverter. In the comparative testing stage, the performance of the controller with and without the proposed online tuning scheme has been evaluated. The experimental results reveal good improvement in terms of the dynamic and steady-state performances desired when the proposed tuning algorithm is applied. The capacitor voltages are able to be balanced satisfactorily with lower output current THD achieved at the inverter’s output. Furthermore, capacitor voltage ripples are able to be reduced to 3 V as compared with the result without online tuning, which is 15 V. The rise time, fall time, peak time, settling time and percent overshoot also record encouraging results, denoting the superiority of the controller when the proposed online tuning module is integrated in the controller’s structure. The fact that the online tuning mechanism is simple is a great advantage for real-time implementation. Ease of implementation is an important factor for practical application. Therefore, it can be concluded that better capacitor voltage balancing results and improved inverter output performances can be guaranteed via the application of the proposed tuning strategy, regardless of the change in the input voltage.