Petri Net-Based Semi-Compiled Code Generation for Programmable Logic Controllers
Abstract
:1. Introduction
- Clients arriving or leaving a waiting queue to be attended at a desk.
- A waiter serving two customers, noting requests and serving them in any order.
- Synchronization of traffic lights in road intersections, after expiration of each state temporization (Figure 1).
- Flexible and/or discrete part manufacturing systems, those concerning with robots and programmable machines behaving with concurrent evolution, synchronization and/or shared resources features. In the frame of this set a use case is analyzed in Section 3.
1.1. PN-Based DEDSs Modeling
1.2. PN Implementation in PLC
1.3. GRAFCET: A Particular Case of PN
1.4. PN vs. GRAFCET Comparison
1.5. Related Works and Proposal
- The PN model is constructed, evaluated and simulated in a simple way, which is demanded by authors such as [16]. A visual and intuitive software tool is used to code, generating structural data that are managed by fixed program blocks, and validate part of the implementation. While the tool presented in [27] is exclusively for PN structure and interpretation editing, in this work it is proposed the use of a commercial software that provides structure editing, simulation, and validation.
- Coding workload is reduced to net interpretation: assignment of actions to places and conditions to transitions of the net, thus to process outputs and inputs, respectively. Exclusively the mentioned program section remains to be manually coded and validated.
- Any change in net structure or initial marking is direct and impacts only the controller’s data area, never the program, which remains unmodified. In contrast, literature shows code generation methodologies, transforming complete PNs (structure and interpretation) to PLC standard programming languages. Ref. [28], for instance, automates and accelerates PN to LD conversion supported by characteristic matrices, but without automatically generating them or using validation rules, and any change involves all code to be generated and manually validated.
2. Methodology
2.1. Algorithm for PN Marking Management
- An appropriate program block structure, with a fixed part (related to PN structure and marking evolution) and a customizable or to-be-programmed part (PN interpretation), properly differentiated.
- Apply PN marking evolution rules.
- Coding in ST, due to (i) simple portability regardless of target device vendor, (ii) operating matricially element by element.
- Variables required for algorithm proper operation already pre-declared, and PN structure matrix representation not declared, for its direct transfer by a parser application.
Algorithm 1:Transition firing and marking updating for a general PN. |
Startup
Enabling
Firable
Make a Decision
Marking Update
Actions
2.2. Implementation Procedure
2.2.1. PN Design
2.2.2. Structural Validation
2.2.3. Structural Data Transfer to PLC
2.2.4. Interpretation Coding
2.2.5. System Commissioning
3. Use Case
3.1. Manufacturing Process under Study
3.1.1. Description
3.1.2. Emulation through a DT
3.2. Resources
- An industrial system and process emulation tool or DT. It can support the whole process of development, simulation and validation, connected to the emulated PLC in a software-in-the-loop (SIL) configuration or to the physical controller in HIL.For this study Simumatik3D V1.0.3 (S3D) [33] was used for VC, connected to a physical PLC.
- A PLC programming environment, as well as the device itself and its emulation tool.Two control devices from different vendors were required, with their respective development platforms:
- -
- SIMATIC S7-1500 CPU 1512C-1 PN of Siemens, with TIA Portal V15.1 for coding and PLCSIM Advanced V2.0 SP1 for emulation. The algorithm was available for these tools.
- -
- CPU NX102-1020 of Omron, with Sysmac Studio 1.25 for coding and emulation.
- A PN modeling and analysis tool.The above-mentioned PIPE2 tool was used for (i) PN structure edition, (ii) PN liveness and/or boundedness properties necessary conditions fullfilment verification, and (iii) PN representative matrices generation.
- In addition, an application was developed for converting the data generated by PIPE2 (HTML format) into a text format suitable for insertion in the variable declaration modules of various development environments, including TIA Portal and Sysmac Studio.
3.3. Manufacturing System Automation
3.3.1. PN Implementation by Means of the Proposed Approach
- Project created in the development environment, and the PLC hardware used properly configured.
- In device program memory:
- -
- Created program block structure.
- -
- Coded the content of fixed blocks, corresponding to PN marking evolution management. In Siemens environment, as a result of the first algorithm development and subsequent testing. For Omron, as a result of code transfer. It should be noted that, for a first implementation in a new development environment, compilation errors may occur as a result of the platform-specific editing procedure. Often, PLC program editing task needs variable name recognition, thus it should be written literally at its very first appearance in a programming module. In that case, simple copy-paste does not work properly.
- -
- Blocks related to PN interpretation, empty.
- In device data memory:
- -
- Variables corresponding to inputs and outputs, and specific to algorithm, declared.
- -
- Variables associated with PN structure were not declared, as they were transferred from the design and simulation package through proprietary software.
- Temporary buffer output sensor forced failure, so that no parts were supplied to . Periodic entry of parts into the process. Buffer filling, with a part waiting to be unloaded from , and a part at process input.
- Sensor repair. Periodic entry of parts into the process. Full emptying of temporary buffer.
- Continuous verification that at most only one command is given to the transport system.
3.3.2. Implementation of Other Approaches
- ST: algorithm that processes both net structure and interpretation, by means of IF THEN structures in ST.
- LD: algorithm that processes both net structure and interpretation, by means of set and reset of variables, in LDs.
- SFC: graphic modeling and description method, suitable for GRAFCET and available in TIA Portal.
4. Results
4.1. Results Related to Scan Cycle Time
4.2. Results Related to Portability
5. Conclusions and Future Work
- A PN is designed and formally analyzed, and the matrices representing its structure are obtained through a free license software tool, and these matrices are transferred to data memory of devices from different vendors. Thus, net structure is validated automatically before net implementation.
- Fixed program blocks, independent of both PLC and PN, manage net marking evolution, using the above-mentioned data structure. This is why the approach can be considered semi-compiled. ST programming makes this part standard.
- Consequently, the workload in terms of coding is reduced to associating conditions to transitions and actions to places, i.e., PN interpretation. It can be added in any language supported by the corresponding environment.
- The scan cycle time required by the algorithm does not differ from that of similar, fully interpreted approaches, i.e., with both net marking and net interpretation management integrated into the code itself.
- The portability to the desired PLC is simple and not time-consuming. As far as the code is concerned, fixed program block contents are directly transferred. Regarding variables in data memory, it is necessary to declare and initialize those required for the algorithm to work. Arrays representing net structure are generated in a PN design and simulation software, and adapted by a proprietary parser software to PLC particular variables definition and initialization.
- PN-based automated industrial systems are implemented in a simple way, with a reduced programming workload and, consequently, fewer potential errors in the control device code. The inclusion or modification of a PN is simple, requiring editing, validation, and transfer of new data into the PLC.
- The way to manage several nets (associated with respective subsystems) is to do it as a single one (as a single system), in which some arcs are considered to be zero weight. User-defined data types can be used if larger matrices are required than the limit set by the development tool.
- For technicians used to working with GRAFCET, the paradigm shift to a PN-based approach is not a handicap. Similar modeling skills are needed.
- Net interpretation programming, the only part to be properly coded, is done according to the user’s choice; no user-friendly or visual tool is available, yet.
- The algorithm involves an entire project in the development environment, is not parameterizable. Its portability between platforms can be simplified.
- PNs have as elements of their matrix representation natural numbers, often 0 or 1 for PNs. Extending this approach to high-level PNs, such as Predicate/Transition nets (PrT-nets) [34] or Coloured Petri nets (CPNs) [35], in which information is attached to each token, would increase the description capacity (making the validation process more difficult) and lead to significantly smaller nets.
- Further reduction of the coding workload by making it more systematic to add interpretation to the PN may be an interesting challenge. There is significant research on automatic code generation.
- The parameterization of a program block encapsulating the algorithm can make its handling an easier task. It can also be interesting to implement the model in MatLab, Java, and/or ADA, in order to compare both the cost of development and their performance.
- A high-level PN-based approach, applying object oriented techniques and/or featuring attributes to tokens, places (actions) and transitions (conditions), reducing the size of the model. User defined data types (UDTs) could help in PLC programming.
- Distributed PNs, in which the management of a master net is used to operate over the others, through open communication protocols such as OPC UA or message queue telemetry transport (MQTT).
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Acknowledgments
Conflicts of Interest
Abbreviations
CPN | Coloured Petri net |
DEDS | Discrete event dynamic system |
DT | Digital twin |
GRAFCET | Step transition function chart or |
GRAphe Fonctionnel de Commande Etape Transition | |
HIL | Hardware-in-the-loop |
LD | Ladder diagram |
MQTT | Message queue telemetry transport |
OLE | Object Linking and Embedding |
OPC UA | OLE for Process Control Unified Architecture |
P/T | Place/Transition |
PIPE2 | Platform Independent Petri net Editor 2 |
PLC | Programmable logic controller |
PN | Petri net |
PrT-net | Predicate/Transition net |
RG | Reachability graph |
SFC | Sequential function chart |
SIL | Software-in-the-loop |
ST | Structured text |
VC | Virtual commissioning |
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Place | Action | Description |
---|---|---|
Red light for vehicles. | ||
Green light for vehicles (and timer activation). | ||
Yellow light for vehicles (and timer activation). | ||
Red light for pedestrians. | ||
Green light for pedestrians (and timer activation). | ||
- | Pedestrian green light activation token. | |
- | Vehicle green light activation token. | |
Transition | Condition | Description |
Vehicle yellow light timer expiration. | ||
- | Direct. | |
Vehicle green light timer expiration. | ||
- | Direct. | |
Pedestrian green light timer expiration. |
Place | Action | Description |
---|---|---|
H | - | Buffer free positions. |
M | - | Robot, shared use. |
O | - | Buffer occupied positions. |
- | Wait until station 1 () can be loaded. | |
loading signal. | ||
processing signal. | ||
- | Wait until can be unloaded. | |
unloading signal. | ||
- | Wait until station 2 () can be loaded. | |
loading signal. | ||
processing signal. | ||
- | Wait until can be unloaded. | |
unloading signal. | ||
Transition | Condition | Description |
Part at input point. | ||
Part loaded in . | ||
- | Direct. | |
- | There are resources for unloading . | |
Part in buffer input. | ||
Part in buffer output. | ||
Part loaded in . | ||
- | Direct. | |
- | There are resources for unloading . | |
Part at output point. |
Implementation | CPU: Siemens 1521C-1PN | CPU: Omron NX102-1020 |
---|---|---|
PN | 1.029 ms | 0.285 ms |
ST | 1.035 ms | 0.276 ms |
LD | 1.130 ms | 0.283 ms |
SFC | 1.361 ms | - |
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Azkarate, I.; Ayani, M.; Mugarza, J.C.; Eciolaza, L. Petri Net-Based Semi-Compiled Code Generation for Programmable Logic Controllers. Appl. Sci. 2021, 11, 7161. https://doi.org/10.3390/app11157161
Azkarate I, Ayani M, Mugarza JC, Eciolaza L. Petri Net-Based Semi-Compiled Code Generation for Programmable Logic Controllers. Applied Sciences. 2021; 11(15):7161. https://doi.org/10.3390/app11157161
Chicago/Turabian StyleAzkarate, Igor, Mikel Ayani, Juan Carlos Mugarza, and Luka Eciolaza. 2021. "Petri Net-Based Semi-Compiled Code Generation for Programmable Logic Controllers" Applied Sciences 11, no. 15: 7161. https://doi.org/10.3390/app11157161