Selective Area Epitaxy of Quasi-1-Dimensional Topological Nanostructures and Networks

Abstract

Quasi-one-dimensional (1D) topological insulators hold the potential of forming the basis of novel devices in spintronics and quantum computing. While exposure to ambient conditions and conventional fabrication processes are an obstacle to their technological integration, ultra-high vacuum lithography techniques, such as selective area epitaxy (SAE), provide all the necessary ingredients for their refinement into scalable device architectures. In this work, high-quality SAE of quasi-1D topological insulators on templated Si substrates is demonstrated. After identifying the narrow temperature window for selectivity, the flexibility and scalability of this approach is revealed. Compared to planar growth of macroscopic thin films, selectively grown regions are observed to experience enhanced growth rates in the nanostructured templates. Based on these results, a growth model is deduced, which relates device geometry to effective growth rates. After validating the model experimentally for various three-dimensional topological insulators (3D TIs), the crystal quality of selectively grown nanostructures is optimized by tuning the effective growth rates to 5 nm/h. The high quality of selectively grown nanostructures is confirmed through detailed structural characterization via atomically resolved scanning transmission electron microscopy (STEM).

1. Introduction

Since their experimental discovery in 2007 [1,2,3,4], topological insulators (TIs) have been studied intensively via angle-resolve photoemission spectroscopy (ARPES) [5,6,7], scanning tunneling microscopy (STM) [8,9,10], transmission electron microscopy (TEM) [5,11], magneto-transport [12,13,14,15,16] and many more experimental techniques. Their Dirac surface states are topologically protected and have their spin orientation coupled to their momentum. This exotic property creates the basis for the use of TIs in future spintronics and quantum computing schemes [17,18]. After more than a decade of fundamental research, these materials are well understood and are ready to be implemented into the next generation of quantum devices.

Quasi-1D nanostructures of (Bi,Sb)₂Te₃ are the preferred device geometry, as the enhanced surface-to-bulk ratio at those scales favors highly spin-polarized transport via the topological surface states. Furthermore, quasi-1D nanostructures allow for the creation of localized Majorana zero modes [19,20,21,22] when proximitized by an s-wave superconductor, such as Nb or Al [23,24,25,26,27]. As promising as devices based on quasi-1D TIs may be, their proper fabrication is a challenge in itself. From a pure growth perspective, the most natural way of realizing topological quasi-1D structures of high quality is via vertical growth of nanowires by means of VLS [9,28,29,30], PVD/CVD [31,32,33,34,35,36] or molecular beam epitaxy (MBE) [37,38,39,40]. However, in order to exploit the physics of the surface states in topological devices, a holistic perspective on the fabrication process must be taken, e.g., from growth to nanofabrication to their transfer into a cryostat, where the devices may finally be operated.

While common nanostructures, such as exfoliated flakes and vertical nanowires, possess a high crystalline quality, they need to undergo conventional cleanroom fabrication to ensure they can be further refined into a topological device. This includes the exposure of ambient conditions and chemical solutions, which poses a massive threat to the devices, as their functionality is severely impaired by oxidation and degradation, as has been found in multiple studies [41,42,43,44,45,46].

In this work, a sophisticated study on selective area epitaxy (SAE) is presented that facilitates the realization of laterally grown topological nanostructures. The as-grown nanostructures are fully encapsulated under ultra-high vacuum conditions via a stencil mask that covers the side facets, and an in situ capping layer that is deposited on the top surface. This method allows the patterning of TI epilayers into arbitrary shapes having ultra-low dimensions, without any exposure to chemicals or air [15,16,47], which is almost impossible to realize via conventional lithography of planar TI films without degrading the crystal quality. The protective dielectric materials around the TI structure preserves its delicate surfaces at ambient conditions. Thus, this process not only prevents any structural or atomic defects originating from the etching processes, but also avoids the oxidation of TI’s surfaces at air. Optionally, with a precise alignment accuracy, the in situ fabrication of electrodes can also be implemented into this process [25]. Various devices, such as topological nanoribbons [47], nano-hallbars [16], multi-terminal junctions [15,48] and topological Josephson junction-based transmon qubit [49], etc., that include one or more ultra-high vacuum lithography steps, have already been fabricated and characterized.

SAE is not a new technique. Previously, it has been realized for various material systems, such as III-V compound semiconductors [50,51,52,53], group IV semiconductors [54,55,56] and even carbon nanotubes [57]. SAE is a technique that facilitates epitaxial growth of the desired crystal locally on one of two surfaces belonging to different material systems. Therefore, it can only be achieved on a substrate exposing composite materials. For selectivity, one of these materials needs to favor the epitaxial growth, while the other material should prevent nucleations from stabilizing. The surface of the latter material is called the “blocking surface” and is often amorphous in nature. The surface targeted for the epitaxial growth is usually crystalline and is known as the “epitaxial surface”. SAE is a very temperature-sensitive technique, as it highly depends on the adsorption-to-desorption ratio (ADR), i.e., the sticking coefficient [58,59,60] of adatoms on the blocking vs. epitaxial surfaces. That is why it is impossible to adopt SAE for materials that either crystallize at low-temperatures, such as Bi and Sb, or exhibit a high sticking coefficient, such as Cr and Ti. However, it can easily be applied to materials that crystallize at relatively high temperatures, such as GaN [61,62].

The topological insulators investigated in this work are grown via MBE at moderate temperatures between 200 °C to 300 °C. This low temperature range signifies the importance of selecting the right blocking material for SAE of TIs. While reports on SAE of 3D TIs already exist, they mainly focused on the proof of principle without the comprehension of growth dynamics. Among them, one study discusses SAE of Bi₂Te₃ and Sb₂Te₃ on silicon-on-insulator (SOI) substrates. The proposed approach provides SAE at macroscale and is scalable; however, it does not facilitate the realization of nanostructures as the patterned mesa structures do not contain sidewalls to confine the TI epilayer in the desired shape and dimensions. The tendency of 3D TIs to grow laterally hinders the achievement of well-defined structures and sharp edges in the SOI platform. Eventually, the growth in nanostructures results in randomly shaped free-standing or suspended sheets of TI crystals, as identified by Lanius et al. [63].

In this study, a state-of-the-art SAE approach with an emphasis on understanding the growth dynamics at the nanoscale and on optimizing the crystal quality in selectively grown TI nanostructures, is demonstrated. Contrary to the SOI technique, this approach facilitates the precise fabrication of quasi-1D networks. It also implements additional requirements for integration of topological nanostructures into future device architectures, i.e., design-flexibility and scalability. Variations of straight nanostructures, such as constrictions or arbitrary branching, are possible and are demonstrated in this work. The scalability is validated by fabricating networks of selectively grown nanostructures with a high precision on substrates up to 4” wafers. These findings will provide the community all the necessary information to develop a platform that is capable of delivering fully in situ fabricated nanostructures using standard fabrication tools. Though, the approach presented in this work is developed focusing topological features, BiSbTe alloys are well known for their phase-change mechanism and thermoelectric characteristics. We hope that this platform will provide the respective communities significant fabrication capabilities to prepare fully in situ nanostructured devices for low-power energy applications. While the process is demonstrated on Si substrates, with minor modifications, it can also be adapted for other crystalline substrates, such as sapphire or SiC.

2. Fabrication of Patterned Substrates and Growth Optimization of Planar Films

In the first step, the pattern of the desired nanostructures is transferred onto the stencil mask. For this, the Si substrate must be covered with the blocking material of choice. Various amorphous materials including Al₂O₃, HfO₂, SiO₂ and Si₃N₄ are tested. Taking the thermal treatment during epitaxy and reproducibility of the fabrication steps into account, SiO₂ and Si₃N₄ are found to be the most suitable candidates. Both, however, come with their own unique challenges. Due to isotropic etching in HF based solutions, SiO₂ does not provide the desired dimensional integrity at the nanoscale. The resulting pattern has been observed to widen, and the blocking layer diminishes in thickness, forming pinholes. Si₃N₄, on the other hand, exerts tensile strain onto the Si interface [64,65,66,67] that may introduce unintended defects in the resulting epilayer. Individually, neither SiO₂ nor Si₃N₄ can be utilized as a reliable blocking material; however, a combinational stack containing a thin layer of SiO₂ at the interface with Si (111) followed by a relatively thick Si₃N₄ layer provides a solution for a functional blocking surface. Thereby, SiO₂ acts as a buffer and counters the strain between Si (111) and Si₃N₄, while the stability of Si₃N₄ in HF solution provides the dimensional integrity at the nanoscale. After the successful coverage of the epitaxial surface with the combined layer stack, the desired patterns are transferred to the substrate using e-beam lithography and CHF₃-based reactive-ion etching of Si₃N₄. Thus, trenches in Si₃N₄ are formed to expose the buried Si (111) surfaces that are still covered with a thin layer of SiO₂. Before epitaxy, the substrate is treated with HF solution to release the buried epitaxial surfaces of Si (111) and to passivate the Si dangling bonds with hydrogen [68]. Later, SAE is performed in the transferred patterns. Figure 1 illustrates three major steps involved in realizing SAE from the preparation of the blocking surfaces to the selectively grown crystal. In addition, several examples of patterned substrates can be seen in Figure S2.

After the successful fabrication of patterned substrates and before SAE, the optimum growth conditions for planar TI films are evaluated on plain Si substrates. A systematic study focusing, at first, on the binary TIs i.e., Bi₂Te₃ and Sb₂Te₃ and, later, extended to the ternary alloy Bi_xSb_2−xTe₃, commonly referred to as BST, is conducted. Details on the growth optimization can be found in supplementary Figures S3–S5. Various parameters, such as the surface treatment and surface passivation, etc., are found to impact the crystal quality of the final epilayer. The two key parameters, however, are the substrate/growth temperature (T_sub) and the growth rate of planar thin films (R_TF).

Epilayers were prepared over T_sub, ranging from 250 to 320 °C. The structural characterization of the as-grown epilayers was performed via X-ray diffraction (XRD). The acquired full width at half maximum (FWHM) value from the rocking curve (Δω) analysis of the (0 0 15) peak is utilized as the qualitative figure of merit to compare epilayers prepared with different growth parameters. Based on Δω analysis, the entire T_sub range is categorized into distinct zones, including the high defect density (yellow), the transition (white), the optimum (green) and the deformation zone (red) in Figure 2a. As the names indicate, the crystal quality is observed to be poor (FWHM > 500″) in the high defect density zone. The crystal quality continuously improves with increasing T_sub throughout the transition zone. The optimum zone corresponds to a set of T_sub that resulted in epilayers with FWHM ≤ 150″. The optimum zone is found to be quite narrow, with T_sub = 300 ± 5 °C. The deformation zone indicates T_sub values at which the desorption rate of adatoms supersedes the adsorption rate (ADR < 1). The initial stages of this growth regime result in a non-coalesced epilayer. Further increase in T_sub results in no growth of epilayer as all incoming adatoms desorb from the epitaxial surface (ADR = 0).

After identifying an optimal temperature window for thin film epitaxy, the crystal quality dependency on R_TF is investigated. While keeping T_sub fixed at the optimum value of 300 °C, R_TF is varied between 2 nm/h to 20 nm/h. Lower values of R_TF were found to reduce the density of extended defects (grains, domains, etc.) in the resulting epilayer providing a FWHM as low as 60″. Additionally, epilayers grown with R_TF ≤ 5 nm/h show entirely suppressed rotational twin domains as confirmed via XRD φ–scan of the crystal (1 0 5) peak, the results of which can be seen in Figure S5. After finding optimal T_sub and R_TF for planar thin films, the findings are adapted to enable the selective growth of 3D TIs on patterned macrostructures.

3. Selective Area Epitaxy

As the best crystal quality of the planar TI films is obtained in the optimum zone, the aim is to acquire selective growth within the same temperature window. At T_sub = 300 °C, the beam fluxes of Bi, Sb and Te are adjusted to target R_TF = 5 nm/h and are directed to the pre-patterned substrate. The growth of BST epilayers is successfully achieved in the etched trenches where the Si (111) epitaxial surfaces are exposed. The blocking surface, on the other hand, exhibited a partial selectivity with the formation of randomly distributed crystallites on Si₃N₄ surface, as depicted in Figure 2d. This indicates that the ADR of adatoms on the blocking surface is still finite, and T_sub must be increased to acquire the perfect selectivity. This observation is confirmed via further degraded selectivity (high density of crystallites on the blocking surface) at reduced T_sub of 290 °C and 295 °C, as depicted in Figure 2b,c. Therefore, T_sub is increased in gradual steps of 1 °C and, eventually, at T_sub = 305 °C, a perfect selectivity is achieved where the growth of BST crystals is attained only on the epitaxial surfaces inside the etched trenches, depicted in Figure 2e. The SAE with increasing T_sub is further investigated until the deformation zone is reached as shown in Figure 2f. Thus, the temperature range that facilitates the perfect selectivity is identified and named “the selective zone (T_SZ)”. T_SZ lies within the optimum zone of planar growth and marked with a purple-colored region in Figure 2a. As T_SZ is very narrow, it is highly important to precisely tune T_sub to acquire the perfect selectivity. It has also been identified that the optimum and selective temperature zones differ for each TI material. Examples of Bi₂Te₃ and Sb₂Te₃ as shown in Figure S7.

Challenges at Nanoscale

So far, the patterned substrates contained only macrostructures (dimensions ≥ 1 μm), as depicted in Figure 2b–f. The acquired results have shown no apparent difference in morphology or thickness of the selectively grown layer, with respect to the planar film discussed earlier. As dimensions are scaled down to the quasi-1D limit, apparent changes in nanostructures to macrostructures are observed. While perfect selectivity is also achieved in the nanostructures, differences in the effective growth rate (R_eff), dependent upon the pattern dimensions, are witnessed. Considering the trench depth and the thin film equivalent growth rate, also applied for SAE of macrostructures in Figure 2, the growth duration is adjusted to acquire the nano-trenches half-filled. The trenches, with dimensions in the nanometer range, targeted to be half-filled, are unexpectedly observed to be entirely filled as depicted in Figure 3. This clearly indicates that the effective growth rate (R_eff) inside the nano-trenches is higher than the applied rate (R_eff >> R_TF). Moreover, this effects is observed to vary with dimensional changes of the trench pattern. For example in 500 nm-wide structures, the trenches are observed to be entirely filled, as shown in Figure 3a, whilst, for a width of 200 nm, the epilayers are observed to start growing laterally after filling the trenches, exceeding the boundary of the sidewalls, as demonstrated in Figure 3b. Reducing the dimensionality further to 30 nm wide trenches, excessive lateral growth of the epilayer is witnessed, as shown in Figure 3c. This phenomenon, i.e., R_eff >> R_TF, is not only observed during SAE of BST, it has also been witnessed for Sb₂Te₃, as seen in Figure 3d,e and Bi₂Te₃, shown in Figure 3f. The enhanced R_eff during SAE of Sb₂Te₃ in a 500 nm-wide trench did not only introduce high surface roughness, but also degraded the crystal quality with a clear presence of twin defects. Analogous to planar epilayers prepared with R_TF > 5 nm/h, SAE with a high R_eff results in the formation of rotational twin domains. SAE of Bi₂Te₃ in ultra-low dimensional structures led to the formation of excessive lateral growth that resulted in the formation of a suspended TI sheet supported by TI pillars grown inside the trenches, as depicted in Figure 3f. Some additional defects in ultra-low dimensions, such as the edge effect (see Section 4), are also observed and indicated in Figure 3c. All these defects must be addressed before a reliable growth of nanostructures can be realized.

4. Growth Model

It is evident that R_eff >> R_TF for SAE at the nanoscale. Therefore, to realize high-quality SAE of nanostructures, R_TF needs to be adjusted in such a way that R_eff $\le$ 5 nm/h. This parameter ensures the least defect density of the grown epilayer, as shown in Figures S4 and S5. To gain control over R_eff, a statistical study with hundreds of selective growths of binary TIs, with pattern dimensions ranging from 100 μm down to 30 nm, is conducted. Based on this study, a growth model is developed to formulize how R_eff depends on both material and dimensional parameters. SEM observations have confirmed that R_eff scales inversely proportional to the surface area of the nanostructure, however for a given area, the perimeter also influences R_eff. The lateral diffusion length of the adatoms (L_D) on the blocking surface has been found to be the most important factor that impacts R_eff. The adatoms close to the pattern boundaries diffuse laterally on the blocking surface and contribute to enhance the growth rate of the TI epilayer inside the trench. As a consequence, the accumulative flux within this effective area (A_eff) on the blocking surface in close proximity to the trench contributes to the growth of the TI inside the trench. Hence, within the actual area (A), defined by the geometry of the trench, enhanced effective growth rates (R_eff > R_TF) are observed. For simplicity, refer to Figure 4a where the actual area of the trench is depicted with green color, whilst the effective area (A_eff) is highlighted with orange dotted region, enclosing the actual area (A). This relation can be summarized in form of Equations (1a–c), where W and L are the structure’s width and length.

$$\frac{R_{eff}}{R_{TF}}=\frac{A_{eff}}{A},$$

(1a)

$$R_{eff}=R_{TF}\left[\frac{\left(L+2L_D\right)\left(W+2L_D\right)}{W\times L}\right],$$

(1b)

$$R_{eff}=R_{TF}\left(1+\frac{2L_D}{W}+\frac{2L_D}{L}+\frac{4L_D^2}{W\times L}\right).$$

(1c)

In this study, L is kept in the micrometer range ensuring $2L_D/L<<1$ and, therefore, negligible. Moreover, the term $4L_D^2/A$, in most cases, is so small that it does not have considerable impact on R_eff. The approximate formula for quasi-1D trenches can be simplified to:

$$R_{eff}=R_{TF} \left(1+\frac{2L_D}{W}\right).$$

(2)

Hence, for quasi-1D trenches, the vital parameters affecting R_eff, other than R_TF, are W and L_D. To calculate R_eff for a certain composition, we first need to evaluate L_D of elements which determine the growth rate, i.e., Bi and Sb as Te flux has been found to have no effect on the growth rate, discussed in Figure S6. L_D of rate-controlling elements, i.e., Bi and Sb, is extracted from the measured value of R_eff, using Equation (2). R_eff is determined from the growth duration and the measured thickness of the epilayer in the trench using AFM line scans before and after SAE, as shown in Figures S9–S12. In some cases, the thickness of the epilayer is also confirmed through analyzing the epilayer cross-section using STEM after the samples were prepared via focused ion-beam (FIB). An example is shown in Figure S8. Thus, L_D-Bi and L_D-Sb are extracted using the growth of binary TIs. L_D-Te, however, cannot be measured as the Te flux is always supplied in excess during the epitaxy of 3D TIs. It can only be measured when the Te flux will start to impact R_TF. L_D-Te has been extracted from SAE of Te-based stoichiometric alloys, such as Bi₁Te₁, Bi₄Te₃ and Sb₁Te₁, etc., which is outside the scope of this work [69].

The extracted values have indicated that Bi has much smaller lateral diffusion length (L_D-Bi = 12 ± 0.5 nm) than Sb (L_D-Sb = 20 ± 0.5 nm) on the Si₃N₄ surface, which differs from what is observed on Si (111), as reported in an earlier study [11]. In ternary BST alloys, the value of the averaged L_D (this is the value which enters Equation (2)) depends upon the exact stoichiometry of the material. For example, in the case of Bi₁Sb₁Te₃, the effective values of L_D will be the average of Sb and Bi with L_D = 16 nm > L_D-Bi, which will increase to 19.6 nm for Bi_0.1Sb_1.9Te₃. This is why BST nanostructures show higher R_eff compared to SAE of Bi₂Te₃. Please note, that here only the enhancement of R_eff is considered. Due to the difference in L_D of Bi and Sb, the stoichiometry within the trenches will slightly change and nanostructures will exhibit higher Sb contents compared to the thin films that are grown with identical fluxes.

Equation (2) holds true if L > 1 μm; however, as soon as the length of the pattern drops below 1 μm, the assumption $2L_D/L<<1$ is no longer valid. In that case, R_eff can be described using Equation (3), and the resulting changes in R_eff at nanoscale occur more rapidly. An example of such a change in R_eff can be seen in Figure 3f where, despite the relatively low L_D-Bi, an excessive overgrowth is witnessed as both dimensions, W and L, reach the nanoscale.

$$R_{eff}=R_{TF}\left[1+2L_D\left(\frac{1}{W}+\frac{1}{L}\right)\right].$$

(3)

The L_D values for Bi and Sb are re-evaluated and confirmed by taking all dimensions into account. Figure 4b depicts the trend in R_eff during SAE of Bi₂Te₃, when the trench width (W) is reduced from 250 nm down to 50 nm. The effect of varying R_TF can also be observed. The circular points represent the measured R_eff values from the selectively grown nanostructures, while the dotted lines in the corresponding colors represent the fitting of these measured values according to the model presented in Equation (2), where the length scale ($1/L<<1$) is ignored. With this information, the diffusion length is confirmed to be L_D-Bi = 11.9 ± 0.2 nm. Similarly, Figure 4d represents the information for Sb₂Te₃ confirming L_D-Sb = 19.8 ± 0.2 nm. The trend in R_eff with the decreasing pattern length (L) is also measured and depicted in Figure 4c,e for Bi₂Te₃ and Sb₂Te₃, respectively. In order to observe the effect more prominently, the trench width is fixed at 50 nm, while the trench length is gradually decreased from 250 nm to 50 nm. The dotted lines represent the fitting of the measured values according to Equation (3). It can be seen that the decline in both structural parameters (W and L) simultaneously impacts R_eff more vigorously and pushes it as high as $R_{eff}\ge 3\times R_{TF}$, as shown in Figure 4e. The values of L_D obtained from the fitting of the curves to our predicted model agree well with the L_D calculated from the measured thickness of the epilayer inside the trenches. Thus, the model provides an accurate estimate for any set of pattern dimensions during SAE of Bi, Sb and Te-based TIs. The model is further developed for nonlinear and circular patterns, and the resulting analytical expressions are formulated, shown in Figures S13 and S14. Before proceeding to the optimization of nanostructures, the edge effect, depicted in Figure 3c, which has not been taken into account yet, is discussed. During the evaluation of R_eff, the term $4L_D^2/A$ in the Equation (1c) was ignored as it acts marginally on R_eff. It holds true as long as the smallest dimensional parameter remains larger than $2L_D$. Once this limit is crossed, the term $4L_D^2/A$ cannot be ignored anymore. It influences R_eff at the corners, resulting in the formation of crystallites and other defects due to excessively high R_eff reaching $\ge 5\times R_{TF},$ as witnessed in Figure 3c with W = 30 nm and L_D = 16 nm (BST).

5. Optimization of Nanostructures

The analytical model, as mentioned earlier, provides an accurate estimation of R_eff that allows for the adjustment of growth parameters to given geometries of nanostructures, avoiding vertical overgrowth and lateral extension of the layer above the sidewalls. However, despite obtaining selectively grown structures, the crystal may still exhibit high defect density as R_eff >> 5 nm/h. The growth model can also be used to determine an R_TF that facilitates SAE of defect-free nanostructures with R_eff $\le$ 5 nm/h. An example of such an evaluation for Sb₂Te₃ crystal (L_D = 20 nm) is described in Equation (4) for a pattern having a width and length of 50 nm and 10 μm, respectively.

$$5 \frac{nm}{h}=R_{TF} \left(1+\frac{2\times 20}{50}+\frac{2\times 20}{1000}\right) \Rightarrow R_{TF}=2.7 \frac{nm}{h}.$$

(4)

Hence, for a pattern with dimensions W = 50 nm and L = 1 μm, the applied growth rate (R_TF) must not exceed 2.7 nm/h. Utilizing our model, the defect-free selective growth at R_eff = 5 nm/h for various structures ranging in dimensions from μm to nm scale, is performed where the required values of R_TF are adjusted to the dimensions of the layout of the chip. By adjusting R_eff = 5 nm/h, according to the layout of the chip containing quasi-0D structures, even the edge effect can be fully suppressed. SEM images of several examples of the controlled SAE in nanostructures are shown in Figure 5a–d for Sb₂Te₃ and Figure 5e–h for Bi₂Te₃, where the homogeneous thicknesses and smooth surfaces of the selectively grown nanostructures are evident.

5.1. Multi-Dimensional Structures

Utilizing the analytical model, the modifications in R_TF to acquire R_eff = 5 nm/h is not complex. However, if a pre-patterned substrate contains structures with a variety of dimensions ranging from μm to nm scale, the selection of a suitable R_TF value can be challenging as R_eff varies with the changing dimensions of the pattern. For instance, R_eff can scale by a factor of 3 of the applied R_TF in very narrow trenches, as observed in Figure 3f, while it remains effectively unchanged at the micrometer scale (R_eff ≈ R_TF). For example, if R_TF is optimized to achieve R_eff = 5 nm/h for a structures having W = 1 μm, the defect-free growth should be achieved in all macrostructures; however, the nanostructures will experience the elevated R_eff and will exhibit crystal defects and may also result in overgrown trenches, just as observed in Figure 3. On the other hand, if R_TF is tuned to achieve R_eff = 5 nm/h for a structure having W = 30 nm, the high crystal quality nanostructures will be achieved while macrostructures will exhibit the non-coalesced epilayers with crystal defects, due to significantly reduced growth rates and low ADR. This limitation applies only if the pre-patterned substrate contains structures with a vast range of dimensions. A solution to this problem is to segregate the macro- and nanostructures on different substrates and to conduct SAE separately for each chip with the corresponding modified R_TF to avoid any crystal defects.

An example of this interesting phenomenon, i.e., the dimensional dependence of R_eff, can be observed in Figure 6a, where the pre-patterned substrate contains structures of varying sizes. The R_TF is optimized to achieve R_eff = 5 nm/h of BST in 50 nm-wide trenches; however, 30 nm and 300 nm wide structures are also included and have the corresponding values of 6.25 nm/h and 3.44 nm/h, respectively. This variation in R_eff has led to a difference in the obtained thickness of the nanostructures from 20 nm (W = 30 nm) to almost 11 nm (W = 300 nm) after the growth duration of 3 h. This example highlights the extent of deviation in R_eff, and resulting thicknesses of the epilayers during SAE, if the patterned substrate contains structures of varying sizes. However, as R_TF was modified according to 50 nm-wide trench, all dimensions have exhibited fully-coalesced and smooth growth of nanostructures, which would not have been possible if the substrate would have contained macrostructures.

5.2. Structural Characterization

Due to the small dimensions, structural investigation of selectively grown nanostructures is not possible via XRD. Therefore, structural characterizations are performed via TEM/STEM. The technical details of the system used for these investigations can be found in supplementary Section S6. For TEM characterization, lamellae of 50 nm wide nanoribbon, marked in Figure 6a, are extracted along Si [1−10] orientation. Figure 6b,c depict the bright field TEM images of both ends of the nanoribbon exhibiting the fully coalesced and smooth layers of BST. With the non-aberration corrected TEM, the investigation of high resolution atomic-interface is challenging which increases in complexity if the elements exhibit a high difference of Z-values (atomic number) such as Si and TI elements.

An advantage of aberration corrected HAADF image acquired via STEM is its correlation with the neighboring atoms where a high difference of Z-values offers the advantage to differentiate between elements. Figure 6d depicts both the bright field (BF) and HAADF images of the interface between Si substrate and BST quintuple layers where a Te monolayer terminates the Si dangling bonds and, hence, provides a platform for the van der Waals epitaxy. Moving away from the interface, the central regions of BST, Sb₂Te₃ and Bi₂Te₃ are investigated and depicted in Figure 6e–g. The corresponding lamellae of Sb₂Te₃ and Bi₂Te₃ are extracted from the marked regions in Figure 5. HAADF images confirm the high crystal quality of the selectively grown nanostructures without the presence of any structural defects (domains, stacking faults and dislocations), as the epilayers are prepared with R_eff = 5 nm/h.

6. Conclusions

In this work, it is shown how to optimize the crystal quality of selectively grown nanostructures and networks of (Bi,Sb)₂Te₃ topological insulators. The presented technique meets the demands for exploiting quasi-1D topological nanostructures in advanced quantum devices. The demonstrated fabrication processes are easy to implement and only require conventional CMOS technology. They prevent critical material issues, such as surface oxidation and structural degradation due to chemical exposure, via fully in vacuo patterned and encapsulated structures of ultra-low dimensions. The ability to realize complex and scalable design architectures is the key advantage of the presented technique.

The development of an analytical growth model enables control over selective growth by linking pattern dimensions to the growth parameters. Applying this model allows to transfer the knowledge of high-quality macroscopic planar films to the growth of defect-free nanostructures. However, our model suffers from one limitation, i.e., achieving high crystal quality for structures of different dimensions in one growth run. This limitation, however, can be bypassed by segregating the nano and mesoscopic patterns on different substrates, if possible.

We hope that our findings will stimulate further research on fully in situ fabricated devices on Si and other substrates, e.g., sapphire or SiC. For the future, it is planned to study the difference in diffusion lengths of elements on the blocking surface and the dimensional-dependent effective growth rates in selectively grown ternary and quaternary alloys on various substrates. These experiments can provide additional insights and help to further refine our model.