A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System

Lakshminarayana, Shanthala; Perumalsamy, Revathy; Pan, Chenyun; Jung, Sungyong; Chung, Hoon-Ju; Park, Hyusim

doi:10.3390/jlpea15010003

Open AccessArticle

A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System

by

Shanthala Lakshminarayana

¹

,

Revathy Perumalsamy

²,

Chenyun Pan

¹

,

Sungyong Jung

³

,

Hoon-Ju Chung

^4,*

and

Hyusim Park

^5,*

¹

Department of Electrical Engineering, University of Texas at Arlington, Arlington, TX 76019, USA

²

Sr. Staff ATE Engineer, Movandi, CA 92618, USA

³

Department of Electrical & Computer Engineering, South Dakota State University, Brookings, SD 57007, USA

⁴

School of Electronic Engineering, Kumoh National Institute of Technology, Gumi 39177, Republic of Korea

⁵

Department of Electrical Engineering, University of North Texas, Dallas, TX 75241, USA

^*

Authors to whom correspondence should be addressed.

J. Low Power Electron. Appl. 2025, 15(1), 3; https://doi.org/10.3390/jlpea15010003

Submission received: 9 December 2024 / Revised: 17 January 2025 / Accepted: 18 January 2025 / Published: 19 January 2025

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Abstract

This work presents a potentiometric readout circuit for a pH-sensing system in an oral healthcare device. For in vivo applications, noise, area, and power consumption of the readout electronics play critical roles. While CMOS amplifiers are commonly used in readout circuits for these applications, their applicability is limited due to non-deterministic noises such as flicker and thermal noise. To address these challenges, the Correlated Double Sampler (CDS) topology is widely employed as a sampled-data circuit for potentiometric readout, effectively eliminating DC offset and drift, thereby reducing overall noise. Therefore, this work introduces a novel potentiometric readout circuit realized with CDS and a switched-capacitor-based low-pass filter (SC-LPF) to enhance the noise characteristic of overall circuit. The proposed readout circuit is implemented in an integrated circuit using 0.18 µm CMOS process, which occupies an area of 990 µm × 216 µm. To validate the circuit performances, simulations were conducted with a 5 pF load and a 1 MHz input clock. The readout circuit operates with a supply voltage range ±1.65 V and linearly reproduces the pH sensor output of ±1.5 V. Noise measured with a 1 MHz sampling clock shows 0.683 µ

V_{r m s}

, with a power consumption of 124.1 µW.

Keywords: CDS; SC-LPF; potentiometric readout; CMOS; pH sensing

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MDPI and ACS Style

Lakshminarayana, S.; Perumalsamy, R.; Pan, C.; Jung, S.; Chung, H.-J.; Park, H. A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System. J. Low Power Electron. Appl. 2025, 15, 3. https://doi.org/10.3390/jlpea15010003

AMA Style

Lakshminarayana S, Perumalsamy R, Pan C, Jung S, Chung H-J, Park H. A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System. Journal of Low Power Electronics and Applications. 2025; 15(1):3. https://doi.org/10.3390/jlpea15010003

Chicago/Turabian Style

Lakshminarayana, Shanthala, Revathy Perumalsamy, Chenyun Pan, Sungyong Jung, Hoon-Ju Chung, and Hyusim Park. 2025. "A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System" Journal of Low Power Electronics and Applications 15, no. 1: 3. https://doi.org/10.3390/jlpea15010003

APA Style

Lakshminarayana, S., Perumalsamy, R., Pan, C., Jung, S., Chung, H.-J., & Park, H. (2025). A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System. Journal of Low Power Electronics and Applications, 15(1), 3. https://doi.org/10.3390/jlpea15010003

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A CMOS Switched Capacitor Filter Based Potentiometric Readout Circuit for pH Sensing System

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