A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS
Abstract
:1. Introduction
2. Architecture of the Proposed D-LDO
2.1. Topology
2.2. Transfer Function of the Control Loop
3. Circuit Implementation
3.1. Time-to-Digital Based Converter
3.2. Error Detector
4. Simulation Results and Discussion
5. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Error Levels | Input | Output | |||
---|---|---|---|---|---|
Error[5] | Error[3] | Error[0] | State[1] | State[0] | |
Error ≥ 32 | 1 | X | X | 1 | 1 |
Error ≥ 8 | 0 | 1 | X | 1 | 0 |
Error ≥ 1 | 0 | 0 | 1 | 0 | 1 |
Error = 0 | 0 | 0 | 0 | 0 | 0 |
Input | Output | ||
---|---|---|---|
State[1] | State[0] | P | I |
0 | 0 | Hold on | Hold on |
0 | 1 | 0.8 | 4 |
1 | 0 | 1 | 0.7 |
1 | 1 | 1.2 | 0.1 |
Design | Yuan [15], EDSSC’19 | Yuan [16], TCSII’20 | Chen [17], TPEL’21 | This Work |
---|---|---|---|---|
Process | 180-nm | 180-nm | 110-nm | 180-nm |
(V) | 1 | 0.8–1.1 | 0.8–1.2 | 1–1.2 |
(V) | 0.9 | 0.7–1.0 | 0.7–1.1 | 0.95 |
Load Regulation (mV/mA) | 0.053 | 0.11 | 0.422 | 0.3 |
Current Consumption (A) | 500 | 500 | 188.8–197.9 | 34.68 |
Total | Not available | 390 pF | 40 pF | 0.5 nF |
420 mV @216 mA | 267 mV @160 mA | 360 mV @47.5 mA | 36 mV @40 mA | |
Load Transient Edge Time (ns) | NA | 65 | <1 | 1 |
Recovery Under/Over-shoot Time (ns) | 80/80 | 80/80 | 67/250 | 143/186 |
Peak Current Efficiency (%) | 99.78 | 99.71 | 92.98–99.61 | 99.64 |
Response Time (ns) | 0.95 | 0.52 | 0.2 | 0.18 |
FOM1 (ps) | 2.1 | 2.03 | 1.26 | 0.65 |
FOM2 (pF) | Not available | 0.362 | 0.0706 | 0.068 |
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Lv, S.; Wan, P.; Zhang, H.; Geng, J.; Wen, J.; Yao, Y.; Chen, Z. A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS. Electronics 2021, 10, 1668. https://doi.org/10.3390/electronics10141668
Lv S, Wan P, Zhang H, Geng J, Wen J, Yao Y, Chen Z. A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS. Electronics. 2021; 10(14):1668. https://doi.org/10.3390/electronics10141668
Chicago/Turabian StyleLv, Shengping, Peiyuan Wan, Hongda Zhang, Jiarong Geng, Jiabao Wen, Yiming Yao, and Zhijie Chen. 2021. "A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS" Electronics 10, no. 14: 1668. https://doi.org/10.3390/electronics10141668
APA StyleLv, S., Wan, P., Zhang, H., Geng, J., Wen, J., Yao, Y., & Chen, Z. (2021). A 0.18-ns Response Time Digital LDO Regulator with Adaptive PI Controller in 180-nm CMOS. Electronics, 10(14), 1668. https://doi.org/10.3390/electronics10141668