Modulation Technique for Modified Active Quasi-Z-Source Inverter with Common-Mode Voltage Reduction

Abstract

In Z-source topologies, a high-amplitude common-mode voltage can occur when shoot-through states are inserted. In this study, a new space vector pulse-width modulation for an active quasi-Z-source topology is proposed to operate at a high modulation index and reduce the common-mode voltage to one-third of the DC-link voltage. Moreover, the quality of the output voltage is improved by operation with a high modulation index and decreasing the switching loss of the H-bridge switches. The detailed operating principles of the active quasi-Z-source topology using the proposed space vector modulation (SVM) method are presented. A simulation model was built, and an experimental prototype was verified to correct the theoretical analysis.

1. Introduction

In distributed generation applications, transformerless photovoltaic power inverters have received considerable attention in recent years; this has led to various structural and functional developments in these inverters such as small size, low cost, and efficiency improvements [1,2]. Therefore, transformerless photovoltaic (PV) power inverters are being designed to improve system performance [3,4]. However, galvanic connections between the PV systems and ground through parasitic capacitors can occur causing the leakage current to flow through the power circuit and ground. This leads to electromagnetic interferences such as noise, current and voltage harmonic distortions, and possible safety issues.

Voltage source inverters (VSIs) are widely used in power systems to connect PV systems to the grid. These inverters are also affected by leakage current between the PV system and ground. Instead of conventional VSIs, novel inverters were proposed in [5,6,7,8]. The proposed topologies were innovative and showed considerable potential in reducing the common-mode voltage (CMV) and leakage current. However, they require active switches and additional passive elements that may result in high cost and complexity of the inverter. Moreover, pulse width modulation (PWM) based methods can be achieved by changing the switching state control signal to reduce the CMV of VSIs, which have been introduced without adding active or passive elements [9,10,11,12]. Active zero-state SVM pulse width modulation methods were proposed in [9] to reduce the CMV to less than one-third of the DC bus voltage. In these methods, the traditional zero states are changed by two odd and even opposite vectors simultaneously. The active zero-state SVM PWM methods [10] also operate with a full-range modulation index similar to conventional SVMs. However, these methods may increase the total harmonic distortion (THD) of the output voltage and cause high switching loss in the H-bridge inverter. On the other hand, remote state SVM methods [11] were presented to maintain constant CMV when the odd or even active vectors were used. However, the modulation index achieved using these SVM methods was still lower than 0.57. This leads to a reduction in the output voltage quality of the inverter. Similarly, near-state SVM methods were proposed by synthesizing three adjacent vectors in each switching state. These methods could also give a peak-to-peak CMV value that is one-third of the DC-bus voltage. However, the modulation index of near-state SVM methods linearly increased from 0.66 to 1. This is not suitable for conventional VSIs owing to the boost capability limitation. To improve the performance of VSIs at high-power factor operations and to reduce the frequency and amplitude of the CMV, a new PWM method was introduced in [12]. However, this hybrid SVM method was complex and difficult to execute.

Furthermore, to enhance the boost capability of the VSIs, a conventional boost DC-DC converter might be added before the VSIs when the voltage of the PVs is not higher than the operating voltage. VSIs with dead-time insertion inevitably increase the THD value at the output side. To achieve boost capability and solve dead-time issues, single-stage impedance-source inverters [13,14,15,16,17,18,19] with buck/boost ability have been proposed with some advantages in PV applications. When a high boost capability is considered in PV system applications, the active quasi-Z source inverter (AqZSI) in [18,19] achieves high voltage gain, low voltage stress on components, and low input current ripple. Moreover, none of the CMV reduction methods is ideal for two-level three-phase inverter. In [20,21,22], the CMV reduction methods were proposed for three-level qZSI topology. Consequently, this leads us to obtain a large of component and more complex control system than a two-level inverter system. Similarly, the Z-source inverter with a four-leg inverter [23,24] was proposed to maintain a constant CMV in ZSI. However, these inverters have a complex structure and increase the cost of the inverter system. The qZSI in [25] was introduced to decrease the leakage current of the system. Nevertheless, a notch filter must be used and the CMV of the inverter is not reduced compared with the conventional SVM method. The three-phase ZSI for CMV reduction was proposed in [26] by adding an additional diode to isolate the PV source and inverter when the shoot-through states are inserted. This method is implemented with applying the remote odd vectors SVM method. Then, the modulation index is limited to 0.57. In [27], a three-phase ZSI based on near-state SVM method was presented. In this method, the CMV of three-phase ZSI can reduce to one-third of the DC-link voltage and the modulation index can operate within 0.66 and 1. However, the voltage gain of the ZSI is not high and not competitive for PV application. The CMV reduction three-phase qZ-source inverter [28] was equipped with the remote state SVPWM strategy to maintain constant CMV. However, the modulation index in this case was still lower than 0.57. This reduces the quality of the output voltage. Furthermore, two CMV reduction methods based on active zero-state SVM were proposed in [29] to decrease the CMV and operate in the full range of the modulation index. Thus, the CMV waveform was improved when compared with the conventional SVM method. Nevertheless, this method increased the switching loss in the H-bridge inverter.

The objective of this study is to propose a CMV-SVM reduction method for a modified active quasi-Z-source inverter (MAqZSI). In a MAqZSI, an extra inductor is connected to the negative terminal of the DC power supply. The proposed CMV-SVM reduction method can operate with a high modulation index. In the proposed methods, the ST states are inserted within a zero-vector interval time to guarantee voltage boosting and to reduce the output voltage distortion. The remainder of this article is organized as follows: Section 2 presents an AqZSI with the conventional SVM method. In Section 3, a MAqZSI with the proposed CMV-SVM method is introduced. The passive component selection is presented in Section 4. The simulation and experimental discussion are presented in Section 5. Finally, Section 6 presents the conclusions of the study.

2. AqZSI Using Conventional SVM Method

The three-phase AqZSI using the conventional SVM method is shown in Figure 1. In this case, all eight vectors were implemented. Similar to the other Z-source inverters, the AqZSI was also operated in two modes: the shoot-through mode and the non-shoot-through mode. Figure 2a presents the space vector operation of the three-phase AqZSI while the CMV of the three-phase AqZSI is depicted in Figure 2b. To define the CMV of the AqZSI,

Table 1. CMV values for all vectors of AqZSI using conventional SVM method.

Vector	Common-Mode Voltage
$\overrightarrow{V_1}$$,\overrightarrow{V_3}$$,\overrightarrow{V_5}$ (Odd vectors)	VPN/3
$\overrightarrow{V_2}$$,\overrightarrow{V_4}$$,\overrightarrow{V_6}$ (Even vectors)	2VPN/3
$\overrightarrow{V_0}$ (zero vector)	0
$\overrightarrow{V_7}$ (zero vector)	VPN
$\overrightarrow{V_{sh}}$ (ST vector)	−(1 − D)VPN

presents the CMV values for each vector. From Table 1, it can be seen that the CMV of the AqZSI has five levels, and the peak-to-peak amplitude of CMV using the conventional SVM control is very high and equal to (2 − D)V_PN.

3. Modified Active Quasi-Z-Source Topology with Proposed CMV-SVM Method

3.1. Operating Principle of MAqZS Topology

Figure 3 depicts the reconfiguration of MAqZSI. In this case, a DC power supply was connected to two inductors at the positive and negative nodes. Note that the values of inductors L₁ and L₂ were assumed to be related by L₁ = k × L₂ (k is the inductance ratio). Similar to the conventional Z-source inverter, the MAqZSI also has shoot-through and non-shoot-through modes, as shown in Figure 4b. For the shoot-through mode, the following equations may be derived:

$$\{\begin{array}{l}\left(L_1+L_2\right)\frac{d{i}_{L1}}{dt}=V_i+V_{C1}+V_{C2}\\ L_3\frac{d{i}_{L3}}{dt}=V_{C1}\\ C_1\frac{d{v}_{C1}}{dt}=I_{L1}+I_{L3}\\ C_2\frac{d{v}_{C2}}{dt}=I_{L1},\end{array}$$

(1)

For the non-shoot-through mode, the following equations may be derived:

$$\{\begin{array}{l}\left(L_1+L_2\right)\frac{d{i}_{L1}}{dt}=V_i-V_{C1}\\ L_3\frac{d{i}_{L3}}{dt}=-V_{C2}\\ C_1\frac{d{v}_{C1}}{dt}=I_{L1}-I_{PN}\\ C_2\frac{d{v}_{C2}}{dt}=I_{L3}-I_{PN},\end{array}$$

(2)

Applying the volt-second balance for inductors L₁, L₂, and L₃, we have

$$\{\begin{array}{l}{V}_{PN}=\frac{V_i}{1-3D+D^2}=\frac{V_{C1}}{1-D}=\frac{V_{C2}}{D}\\ I_{L1}=I_{L2}=\frac{\left(1-D\right)I_{PN}}{1-3D+D^2}\\ I_{L3}=\frac{\left(1-2D+D^2\right)I_{PN}}{1-3D+D^2},\end{array}$$

(3)

where D is the shoot-through duty cycle.

Thus, the voltage gain of the MAqZSI can be given

$$G=M\cdot B=\frac{1-D}{1-3D+D^2},$$

(4)

3.2. CMV of MAqZSI

The common-mode loop model of the three-phase MAqZSI PV system is shown in Figure 5. The voltage between nodes M and M’ is the inductor L2 voltage. Moreover, the CMV V_CM is the total voltage of the V_ON and V_NM. From Figure 5, V_CM may be expressed as

$$V_{CM}=V_{OM}=V_{ON}+V_{NM},$$

(5)

According to the operating analysis shown in Figure 4 and Figure 5, the CMV values in the switching states of MAqZSI were calculated in

Table 2. CMV values for MAqZSI with proposed CMV-SVM reduction method.

Vector	Common-Mode Voltage
$\overrightarrow{V_1}$$,\overrightarrow{V_3}$$,\overrightarrow{V_5}$ (Odd vectors)	$\left(\frac{1}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN}$
$\overrightarrow{V_2}$$,\overrightarrow{V_4}$$,\overrightarrow{V_6}$ (Even vectors)	$\left(\frac{2}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN}$
$\overrightarrow{V_{sh}}$ (ST vector)	$\left(-1+D+\frac{2-3D+D^2}{1+k}\right)V_{PN}$

. When the MAqZSI was operated in the non-shoot-through mode, it meant that the inverter operated with odd and event vectors. Thus, the CMV of MAqZSI can be derived as

$$V_{CM}=\{\begin{array}{l}\left(\frac{1}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN}\\ \left(\frac{2}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN},\end{array}$$

(6)

where k = L₁/L₂ and k > 0.

From Equation (6), the peak-to-peak voltage of CMV is V_PN/3 for all values of k. However, when the shoot-through states are inserted, another level of CMV occurs in each shoot-through state. Furthermore, the peak-to-peak CMV can be increased. The CMV of MAqZSI with odd, even, and shoot-through vectors can be obtained as

$$V_{CM}=\{\begin{array}{l}\left(\frac{1}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN}\\ \left(\frac{2}{3}+\frac{-2D+D^2}{1+k}\right)V_{PN}\\ \left(-1+D+\frac{2-3D+D^2}{1+k}\right)V_{PN},\end{array}$$

(7)

From (7), we can show that the variation value of CMV was minimized and equal to V_PN/3 by changing the value of k. Thus, the CMV variation could be maintained at V_PN/3 and the value of k should be 1/(5 − 3D) ≤ k ≤ 2/(4 − 3D). In this case, the value of k = 1/4 was chosen. The peak-to-peak CMV of the MAqZSI with the proposed SVM is approximately one-sixth of the peak-to-peak CMV of the AqZSI using the conventional SVM control.

3.3. Implementation of the Proposed CMR-SVM Method

The proposed CMV-SVM reduction method for MAqZSI is based on the near-state SVM method, as shown in Figure 6. In this case, MAqZSI was operated without shoot-through states. The vector $\overrightarrow{V_1}$, $\overrightarrow{V_2}$, and $\overrightarrow{V_6}$ time intervals were defined as T_a, T_b, and T₀, respectively. The MAqZSI reference voltage vector was derived as

$$\overrightarrow{V_{ref}}=\overrightarrow{V_1}\frac{T_a}{T}+\overrightarrow{V_2}\frac{T_b}{T}+\overrightarrow{V_6}\frac{T_0}{2T},$$

(8)

where T_s is the control cycle.

The values of T_a, T_b, and T can be defined as

$$\{\begin{array}{l}{T}_a=M_i\cdot T\cdot \sin (\frac{\pi }{3}-\delta )\\ T_b=M_i\cdot T\cdot \sin (\delta )\\ T_0=T-T_a-T_b,\end{array}$$

(9)

where δ is the inclined angle, M_i is the modulation index and equals to

$$M_i=\sqrt{3}{V}_{ref}/V_{PN},$$

(10)

where V_ref is the output phase voltage.

In the proposed CMV-SVM reduction method for MA-qZSI, Sector 1 is taken as an example, as shown in Figure 6b. In this case, the proposed CMV-SVM executes with the sequence V₂–V₁–V₆–V₁–V₂ with a commutation step of 60°. It can be seen that the proposed CMV-SVM reduction method for the MAqZSI in the non-ST state was operated as the conventional NS-SVM method, and one vector $\overrightarrow{V_6}$ was used to replace $\overrightarrow{V_0}$. Furthermore, the time interval of $\overrightarrow{V_6}$ was defined as T₆ = T_z. Then, the variation of the CMV was reduced to one-third of the DC-link voltage.

When the boost capability is required, the shoot-through states must be inserted into the switching sequences of the proposed CMV-SVM reduction method for MAqZSI. In this case, the proposed CMV-SVM reduction method for MAqZSI was executed with one more shoot-through vector. The space vector diagram of the proposed CMV-SVM reduction method for MA-qZSI with the shoot-through state insertion is shown in Figure 7a. According to the space vector diagram, the ST states can be inserted into vector $\overrightarrow{V_6}$. The switching sequences in the next sectors of the proposed CMV-SVM reduction method for MA-qZSI can also be obtained following this insertion. Similar to the CMV in the non-shoot-through mode, the variation of CMV with shoot-through insertions was also reduced to one-third of the DC-link voltage, as shown in Figure 7b. The MAqZSI reference voltage vector was rewritten as

$$\{\begin{array}{l}\overrightarrow{V_{ref}}=\overrightarrow{V_1}\frac{T_a}{T}+\overrightarrow{V_2}\frac{T_b}{T}+\overrightarrow{V_6}\frac{T_0}{2T}+\overrightarrow{V_D}\frac{T_D}{T}\\ T=T_a+T_b+T_0+T_D.\end{array}$$

(11)

where $\overrightarrow{V_D}$ and T₀ are the shoot-through voltage vectors and the time interval of $\overrightarrow{V_6}$.

The times of $\overrightarrow{V_1}$, $\overrightarrow{V_2}$, $\overrightarrow{V_6}$ and $\overrightarrow{V_D}$ were rewritten as

$$\{\begin{array}{l}{T}_a=M_i\cdot T\cdot \sin (\frac{\pi }{3}-\theta )\\ T_b=M_i\cdot T\cdot \sin (\theta )\\ T_6=T_{01}=T_0-T_D,\end{array}$$

(12)

where T_D is the interval time of the shoot-through states and equal to D × T.

The modulation index and the shoot-through duty cycle are derived

$$M_i+D\le 1$$

(13)

4. Passive Component Selection

4.1. Inductance Selection

To select the inductance of inductors L₁, L₂, and L₃, only the high-frequency ripple of these inductors is considered. According to Figure 6, the peak-to-peak ripple inductor current with the proposed CMR-SVM method shoot-through state insertion was the highest. From Equation (3), we obtain the following equation:

$$\{\begin{array}{l}\left(k+1\right)L_2\frac{d{i}_{L2}}{dt}=V_i+V_{C1}+V_{C2}\\ L_3\frac{d{i}_{L3}}{dt}=V_{C1},\end{array}$$

(14)

Based on Equations (2) and (3), the inductance values of L₁, L₂, and L₃ in the proposed CMV-SVM reduction method for MA-qZSI were derived

$$\{\begin{array}{l}{L}_1=\frac{D\left(2-3D+D^2\right)\cdot k\cdot V_i\cdot T}{\left(k+1\right)\left(1-3D+D^2\right)\Delta I_{L1}}\\ L_2=\frac{D\left(2-3D+D^2\right)\cdot V_i\cdot T}{\left(k+1\right)\left(1-3D+D^2\right)\Delta I_{L1}}\\ L_3=\frac{D\left(1-D\right)\cdot V_i\cdot T}{\left(1-3D+D^2\right)\Delta I_{L3}},\end{array}$$

(15)

where ΔI_L1 and ΔI_L3 are the current ripples of inductors L₁ and L₃, respectively.

4.2. Capacitance Selection

Similar to the inductor selection, to choose the capacitance of capacitors C₁ and C₂, the selection only considered the high-frequency ripple. The proposed CMV-SVM reduction method for MAqZSI also produced the highest peak-to-peak voltage ripple under the ST state. From Equations (2)–(4), the capacitance of the C₁ and C₂ capacitors of MAqZSI were derived as

$$\{\begin{array}{l}{C}_1=\frac{D\left(2-3D+D^2\right)\cdot I_{PN}\cdot T}{\left(1-3D+D^2\right)\Delta V_{C1}}\\ C_2=\frac{D\left(1-D\right)\cdot I_{PN}\cdot T}{\left(1-3D+D^2\right)\Delta V_{C2}},\end{array}$$

(16)

where ΔV_C1 and ΔV_C2 are the voltage ripples of capacitors C₁ and C₂, respectively. I_PN is the average DC-link current and is defined as:

$$I_{PN}=\frac{\left(1-D\right)\cdot V_{PN}}{R_l},$$

(17)

4.3. Comparison with Other Two-Level Three-Phase Z-Source Inverters

Table 3. Comparison between the MAqZSI with other CMV reduction Z-source inverters.

	Switch	Diode	Inductor	Capacitor	Total	Voltage Gain	Modulation Index	VCMV
ZSI [26]	6	2	2	2	12	$\frac{1-D}{1-2D}$	0 to 0.57	Constant
Modified ZSI [27]	6	1	2	2	11	$\frac{1-D}{1-2D}$	0.66 to 1	VPN/3
qZSI [28]	6	1	2	2	11	$\frac{1-D}{1-2D}$	0 to 0.57	Constant
Modified qSBI [29]	8	1	2	1	12	$\frac{1-D}{1-2D}$	0 to 1	VPN/3
Proposed inverter	7	2	3	2	14	$\frac{1-D}{1-3D+D^2}$	0.66 to 1	VPN/3

presents the comparison between other Z-source inverter with CMV reduction and the MAqZSI with the proposed SVM method. Regarding the component count, the proposed inverter uses more components in the impedance-source network when compared with the ZS/qZS topologies in [26,27,28,29]. When compared with the modified qSBI [29], the proposed inverter uses one less switch and has lower voltage stress on components, as presented in [18,19]. As shown in Table 3, the ZSI [26] and qZSI [28] can offer the constant CMV. However, the modulation index of these inverters is low. This leads to reduce the output voltage quality and increase the voltage stress on components. The CMV of the modified ZSI [27] and qSBI [29] is equal one-third of the DC-link voltage. Moreover, these inverters can operate in high modulation index. As shown in Figure 8, the proposed inverter has the highest voltage boosting capability. Thus, the proposed inverter can use higher modulation index to improve the output voltage quality.

5. Results

5.1. Simulation Results

To validate the effectiveness of the MAqZSI with the proposed CMV-SVM reduction method, a PSIM simulation verification was performed. The system parameters used for the simulation are listed in

Table 4. Parameters of the MAqZSI.

Parameters		Values
DC input voltage		100 V–350 V
Output RMS voltage		110 V
Output power		1 kW
Switching frequency		10 kHz
Inductors	L1	1 mH
	L2	4 mH
	L3	2 mH
Capacitors	C1	680 µF/450 V
	C2	680 µF/100 V
Switching frequency		60 kHz

. The value of k = 1/4 was used for the ratio of inductances L₁ and L₂, and the inductance values of L₁, L₂, and L₃ were selected as 1 mH and 4 mH, and 2 mH, respectively. The two capacitors C₁ and C₂ were 680 µF/450 V and 680 µF/100 V, respectively. The switching frequency was 10 kHz. On the output side, an output filter of 1 mH and 20 μF was used.

Figure 9 shows the simulation and experimental results of the output current, output voltage before the output filter, DC-link voltage, and CMV of the AqZSI using the conventional SVM. An input voltage of 250 V and a shoot-through duty cycle of 0.11 was applied to produce a 363 V DC-link voltage. In this case, the modulation index was selected as 0.78 to generate a 110 Vrms output phase voltage. The power load was 1 kW. The peak-to-peak voltage of CMV in the AqZSI using the conventional SVM method was 686 V, as depicted in Figure 9e.

In the case of the MAqZSI with the proposed CMV-SVM reduction method, the testing parameters were the same as those of the AqZSI using the conventional SVM method. Figure 10 shows the simulation results of the MAqZSI with the proposed CMV-SVM reduction method when an inverter is operated with V_i = 350 V and D = 0. The DC-link voltage is equal to the input voltage and the peak-to-peak voltage is 117 V, as shown in Figure 10e. Moreover, the simulation and experimental results of the MAqZSI with the proposed CMV-SVM reduction method are depicted in Figure 11 when an inverter is operated with V_i = 250 V and D = 0.11. In this case, the DC-link voltage is 363 V and the peak-to-peak voltage of the CMV in the MAqZSI with the proposed CMV-SVM reduction method is 121 V, as shown in Figure 11e. Moreover, to reduce the input voltage of 100 V, the shoot-through duty cycle of 0.28 is applied. In this case, the DC-link voltage is 405 V and the peak-to-peak voltage of the CMV is 135 V, as shown in Figure 12e. It can be seen that the peak-to-peak voltage of the CMV is always equal to one-third of the DC-link voltage in simulations.

5.2. Experimental Results

To verify the characteristics of the proposed CMV-SVM reduction method for the MAqZSI, a 1 KW three-phase test for AqZSI and MAqZSI was executed. Both the experimental test of AqZSI under the conventional SVM method and MAqZSI with the proposed CMV-SVM reduction method were set up in the same manner as in the simulation. The CMV of the AqZSI with the conventional SVM method changed from −315 V to 350 V as shown in Figure 9f, which was approximately double the DC-link voltage and equal 665 V.

Figure 10b, Figure 11b, and Figure 12b depict that the output currents were 3.5 Arms with an input voltage of 350 V, 250 V, and 100 V. As shown in Figure 10d, Figure 11d, and Figure 12d, the voltage across capacitor C1 was 345 V, 315 V, and 290 V. From Figure 10f, Figure 11f, and Figure 12f, the DC-link voltage for each case was 345 V, 360 V, and 390 V. The peak-to-peak voltage of the CMV is 115 V, 120 V, and 130 V. In the case of MAqZSI with the proposed CMV-SVM reduction method, the CMV voltage was one-third of the DC-link voltage in experiment, which was also approximately 16.67% of the peak-to-peak CMV in the case of AqZSI with the conventional SVM method. A good correlation can be seen between the simulation and experimental verifications.

6. Conclusions

In this article, the SVM method has been proposed for a three-phase MAqZSI topology to decrease the CMV. The MAqZSI with the proposed CMR-SVM method can reduce the instantaneous peak-to-peak voltage of the CMV to one-third of the DC-link voltage. In the MAqZSI, the CMV using the proposed CMR-SVM method was approximately equal to one-sixth of the CMV in AqZSI using the conventional SVM method. Then, the implementation of the MAqZSI with the proposed CMR-SVM method was executed with a 1 kW three-phase inverter prototype. The theoretical operating principles were verified using simulation and experimental results.