Integration of Single-Port Memory (ISPM) for Multiprecision Computation in Systolic-Array-Based Accelerators
Round 1
Reviewer 1 Report
This paper presents Integration of single port memory for precision computation in SA based accelerator. They shows detailed improvement data by simulation works. And valuable discussion about computing is presented in this paper. I suggest the publication in this journal.
These are some comments
-In Introduction, the contents about Processing-in-memory(PIM) can be added more for AI computing. Also relevant references can be added. And can be added AI accelerator’s merit over the only deep leaning method.
-Author can add the advantage and disadvantage of on-chip and off-chip leaning in accelerator.
-Figure quality can be improved. For example Figure 11 is blur and font size of Figure 3 is too small to read.
-More explanation about Systolic array can be need.
Author Response
Please see the attachment
Author Response File: 
Author Response.pdf
Reviewer 2 Report
The paper is well organized manuscript from idea to experimental results. This is not crucial but can the authors explain realization of a cache memory. Thus, could this realization use novel memristive technology?
Author Response
Please see the attachment.
Author Response File: Author Response.pdf
