Analytical Approach to Improve the Performance of a Fully Integrated Class-F Power Amplifier with 0.13 µm BiCMOS Technology Using Drain–Bulk Capacitor Modulation
Round 1
Reviewer 1 Report
The manuscript by Traiche et al. describes the design of a tiny (<0.5mm2) cascode-based class F amplifier in BiCMOS technology, with output power in the few mW range. The manuscript is well written overall, but could do with a clearer description of novelty (surely not a simple coupling capacitor?) and main aims (miniaturisation, for what application, role of efficiency vs linearity?). All should be summarised in both abstract and conclusion.
Below is a list of minor issues related to content and format.
page lines comment
1 6-7 meaning of values in brackets unclear - reword for clarity
2 Fig.1 describe function of transistors P1 and M3 in text
3 84f statement incorrect: M2 is also not grounded
3 97 replace capital by small letter in 'The'
3 101 replace capital by small letter in 'Where'
3 106 replace capital by small letter in 'Therefore'
3 106 explain why Z_in 'is strictly positive'
4 Fig. 2 enlarge illegible sub-indices in circuit sketch
4 127 what is meant by 'practically equal'?; ref. at end of line should be to (8) instead of (3)
5 161 what is near by 'modules of instantaneous drain power dissipative'?
5 163 replace capital by small letter in 'Where'
6 167 symbol for efficiency corrupted
10 238 figure reference corrupt
12 275f Details of simulator software should be given earlier (when first used).
14 309 Does efficiency value of 42% refer to output power of final design here?
14 323 what is meant by 'saturated efficiency is worth 29.5% for saturated output power' ?
mostly OK (a few unclear points are included above)
Author Response
Response to Reviewer 1 Comments
We would like as authors to thank the reviewers for the efforts they have made to review this manuscript while pointing out errors of substance and form. Likewise, we are proud to present through this document, responses and clarifications over different raised points.
Also, we would like to calrificate some points that reviewer has demande a description about
- Novelty: as illustrated through the paper, the added capacitor permits to create a seconde harmonic component of drain’s current that well shaped drain waveforms and reduce a dissipative drain power. This lead to improve the PA’s performance on power Back-off region.
- Applications: As mentionned in abstract, introduction and conclusion, this PA targets the low-power I-Q amplitude modulation wireless transceivers as bluetooth/ZigBee, RFID tanks.
- Minaturisation: is the aim of all wireless low-power applications in a way to reduce fabrication’s cost.
- Linearity-Efficiency: is a trade-off in designing wireless autonomous (supplied by battries) systems adopting an amplitude mudulation to send data. Class-F PA among the best way to respect this trade-off.
Point 1:
Page Line Comment
1 6-7 meaning of values in brackets unclear - reword for clarity
Response 1:
The values between brakets mean the PA performances values corresponding to the power back-off region. In fact, we added the uppercase leter “B” to determine such sense as following:
B: indicates the corresponding values in the power back-off region.
(see page 1, line 12).
Point 2:
Page Line Comment
2 Fig.1 describe function of transistors P1 and M3 in text
Response 2:
The two transistors P1 and M3 act as a current mirror that determine in hand, the DC current of power stage by fixing the current gain between current mirror stage and power stage. In the other hand, transistors P1 and M3 act as a voltage divider, that determine gate voltage of transistor M1
(see page 3, line 102-105).
Point 3:
Page Line Comment
3 84 statement incorrect: M2 is also not grounded
Response 3:
As you know, the MOS Transistor have four sides, Gate (G), Source (S), Drain (D) and Bulk or Substrate (B). In fact, the last side (B) is designated to be connected in the ground for transistors NMOS M1, M2 and M3 and connected in VDD for transistor PMOS P1. This side is not appeared in Figure 1.
Point 4:
Page Line Comment
3 97 replace capital by small letter in 'The'
Response 4:
Corrected (see page 3, line 101).
Point 5:
Page Line Comment
3 101 replace capital by small letter in 'Where'
Response 5:
Corrected (see page 3, line 105).
Point 6:
Page Line Comment
3 106 replace capital by small letter in 'Therefore'
Response 6:
Corrected (see page 3, line 110).
Point 7:
Page Line Comment
3 106 explain why Z_in 'is strictly positive'
Response 7:
The real part of impedance Z_in must be strictly positive, because it is the resistive part of an imput impedance of power amplifier that should be unconditionnaly stable. If the real part of an input impedance is negative, the circuit become unstable and it starts to oscillate.
Point 8:
Page Line Comment
4 Fig. 2 enlarge illegible sub-indices in circuit sketch
Response 8:
Sub-indices were enlarged (see Fig.2, page 4).
Point 9:
Page Line Comment
4 127 what is meant by 'practically equal'?; ref. at end of line should be to (8) instead of (3)
Response 9:
RL is the characteristic impedance of the antenna that equal 50 Ω. ZT is given by equation (8) (see page 4, Lines 137 and 138).
Point 10:
Page Line Comment
5 161 what is near by 'modules of instantaneous drain power dissipative'?
Response 10:
Instantanous dissipative power of transistor is the scalar product between instantanous drain voltage and intantanous drain current. The module of instantanous dissipative power is the scalar product of the modules of instantanous voltage-current components multiplied to the cosinus of 2*π, (see [3], pages 54 and 55).
Point 11:
Page Line Comment
5 163 replace capital by small letter in 'Where'
Response 11:
Corrected (see page 5, line 174).
Point 12:
Page Line Comment
6 167 symbol for efficiency corrupted
Response 12:
Corrected (see page 5, line 178).
Point 13:
Page Line Comment
10 238 figure reference corrupt
Response 13:
Corrected (see page 10, line 247).
Point 14:
Page Line Comment
12 275 Details of simulator software should be given earlier (when first used).
Response 14:
For first theoretical equations of class-F PA , we have used Matlab as simulator to interpret the analytical results. However, cadence was employed to express Post-Layout simulations.
Point 15:
Page Line Comment
14 309 Does efficiency value of 42% refer to output power of final design here?
Response 15:
This concens a work presented in article [8]. Here, Iguchi has designed a switshing class-F power amplifier with 40 nm CMOS technology using as an output network, harmonic filter and matching transformer. Drain efficiency of 42 % corresponds to an output power of – 20 dBm as a final result that is extracted from mesures of the fabricated PA.
Point 16:
Page Line Comment
14 323 what is meant by 'saturated efficiency is worth 29.5% for saturated output power' ?
Response 16:
Saturated efficiency is the maximal value of efficiency that corresponds to the saturated (maximal) output power.
Author Response File: 
Author Response.pdf
Reviewer 2 Report
The author presents the new design of class-F power amplifier. It is a very meaningful research and one promising solution to enhance PA performance. In general, the design and simulation results are reasonable, but the description needs to be improved.
(1) On Page 3, equation 1, please define C_db2, C_gd2, C_db1 at the first time appearing.
(2) Please define C_gs1, C_gd1, g_m1, X_net, X_T, ... at first time appearing.
(3) The brain_efficiency symbol is missing on line 167.
(4) I do not understand what is the difference between V_m and V_m3. Please define them first.
(5) The maximal amplitudes symbol is missing on line 181.
(6) Do you mean the drain efficiency is improved from 40% to 45%, as said on line 225?
(7) Please correct the figure number one line 238.
(8) The figure 9 should be re-plotted. Please remake them into 3 separate sub-figures with V_DS difference (without and with 1.3 pF), iD(t) difference, and iL(t) difference. It will be better to demonstrate the improvements.
(9)Please add labels with input port, output port, etc on Figure 11.
Author Response
Response to Reviewer 2 Comments
We would like as authors to thank the reviewers for the efforts they have made to review this manuscript while pointing out errors of substance and form. Likewise, we are pleased to present through this document, responses and clarifications over different raised points.
Point 1:
Page Line Comment
3 - please define C_db2, C_gd2, C_db1 at the first time appearing.
Response 1:
Corrected, (see page 3, lines 99-100).
Point 2:
Page Line Comment
3 - Please define C_gs1, C_gd1, g_m1, X_net, X_T, ... at first time appearing.
Response 2:
Corrected, (see page 4, lines 113), (see page 5, line 143).
Point 3:
Page Line Comment
3 84 The brain_efficiency symbol is missing on line 167.
Response 3:
Corrected (see page 5, line 178).
Point 4:
Page Line Comment
- - I do not understand what is the difference between V_m and V_m3. Please define them first.
Response 4:
V_m is the amplitude of drain voltage’s fundamental component and V_m3 is the amplitude of drain voltage’s third harmonic. It is mentionned (see page 6, line 181).
Point 5:
Page Line Comment
7 181 The maximal amplitudes symbol is missing on line 181.
Response 5:
Corrected (see page 7, line 191).
Point 6:
Page Line Comment
- 225 Do you mean the drain efficiency is improved from 40% to 45%, as said on line 225?
Response 6:
What is improved from 40 % to 45 % is the power added efficiency as considered performance in the designinig of power amplifiers.
Point 7:
Page Line Comment
10 238 Please correct the figure number one line 238.
Response 7:
Corrected (see page 10, line 247).
Point 8:
Page Line Comment
12 Fig. 9
Response 8:
Sub-indices were enlarged (see Fig.2, page 4).
Point 9:
Page Line Comment
4 127 Please add labels with input port, output port, etc on Figure 11.
Response 9:
It is done (see page 12).
Author Response File: Author Response.pdf
