3.1. Frequency-Voltage Conversion Circuit
The principle of the circuit is derived from the structure introduced in Djemouai’s research, which was first published in 1998 [
9]. He proposed a high-performance integrated CMOS frequency-voltage converter in this paper and used it in a frequency-locked loop in 2001 [
10]. The circuit works on the principle of charge redistribution on a capacitor and has a small area, which can be easily integrated into other circuit modules. The formula for frequency-voltage conversion in reference [
9] is as follows:
The circuit structure proposed by Djemouai is slightly improved in this paper, and frequency-voltage conversion is successfully realized. It is applied in the switching control process of PWM and COT mode. The structure in
Figure 2 is the circuit structure proposed in this paper, which also uses charge balance redistribution between C1 and C2, but here, C1 is used to divide half of the charge on C2 in each cycle, and C1 = C2 = C. The following specific mode-switching process illustrates the application principle of the FVC circuit.
Figure 3 is a structural diagram of the automatic mode-switching circuit, which consists of two parts. One is the frequency and voltage conversion circuit FVC, and the other is a logic control circuit. The signals between the Buck circuit and the logic control circuit is also marked in
Figure 3.
The working principle of the automatic mode-switching circuit of the PWM/COT dual-mode control Buck DC-DC converter is as follows. Firstly, the conditions for triggering zero crossing in PWM mode are described by inequality (2):
The conditions for triggering zero crossing in COT mode are described by inequality (3):
where R
L is the load resistor, and Vo is the output voltage of this converter. V
IN is the input voltage of this converter, and L is the inductor. T
s1 is the switching period in PWM mode and is a fixed value. T
s2 is the switching period of continuous current mode (CCM) in COT mode, which varies with the input and output voltages. The formula is as follows:
Here, T
ON is the constant on time, which is fixed in the traditional COT mode. When the output load R
L is large enough, so that the Buck converter triggers zero crossing and operates in discontinuous current mode (DCM), regardless of PWM or COT mode. At this time, there will be a continuous zero-crossing signal ZCD in the logic control circuit, and the counter is started. When the counter has counted 24 switching cycles (T
s1), the counter output signal (high logic level) is sent to MUX2. At this time, MODE = 1, and the Buck converter switches to COT mode and immediately starts the frequency-voltage conversion circuit. The reference current source I is under the control of switching signal HS with the double selector MUX1 to periodically charge and discharge while redistributing the charge and discharge capacitor C1 and C2. The period is T
s2_d when the Buck circuit works in the COT mode of DCM:
The signal on capacitor C2 obtains a DC value after passing through the RC filter circuit. According to
Figure 4, the charging time of the first stage is t
1, and the starting voltage of C2 is V
1. The charging time of the second stage is t
2, and the voltage at the end of t
2 is V
2. The upper electrode plates of the two capacitors C1 and C2 are connected again at the end of t
2, and the charge is redistributed almost instantly. The voltage is reduced from V
2 to V
1, and then the previous charging process is repeated. C1 is equal to C2 is equal to C, so V1 is equal to 1/2 V
2, which means that from V
1 to V
2, the voltage changes by 1/2 V
2. The voltage changes in this process:
Here, .
Since the DC value of a signal is the average of the signal, taking the average of the signal over a period delivers the DC value:
After calculation, the expression formula of the DC value of V
C can be obtained:
Under a light load, T
ON << T
S2_d, and combined with Formula (5), we can obtain:
This DC voltage of VC is fed into a comparator and compared with the reference voltage Vref to obtain the mode-switching signal VF. According to the above two Formulas (9) and (10), the switching period Ts2_d is inversely proportional to the load current Io when the output voltage VO and input voltage Vin are constant. In addition, the conversion of VC and the switching period Ts2_d are in an approximately linear proportional relationship. Thus, an inverse relationship between the conversion voltage VC and the load current Io can be established. Even if the relationship is not linear, it can be used to make a judgment for mode switching as long as it has monotonicity.
3.3. Zero-Crossing Detector with Freewheel Switch
As described in
Section 3.1, if the Buck works under a light load, and the amplitude of the inductor current ripple is greater than the load current, the inductor current will reverse flow into the low side switch M
N and result in a current back-flow phenomenon with a large power loss. In order to prevent the above phenomenon of current inversion in the DC-DC converter and to make the converter work in DCM mode under a light load, a detection and control circuit is needed. This circuit closes the low side switch M
N before the direction of the inductor current is changed. This is the purpose of designing a zero-crossing detection circuit.
The voltage at the switching node SW is negative when MN is open. As the inductor current decreases with a certain slope, the voltage at the SW point gradually increases, but it is usually less than zero. If the voltage at the SW point is greater than zero while MN remains open, this means that current backflow occurs. Therefore, it is necessary to detect when the voltage at the SW point passes through zero and to close MN at the appropriate time.
There are two design ideas for the zero-crossing detection circuit. One is to connect a resistor [
11] in a series on the branch of the synchronous rectifying switch M
N and determine whether the current backflow occurs by detecting the voltage at both ends of the resistor. However, this method will cause additional losses and reduce the conversion efficiency of the converter. The second method is to use the sampling circuit to copy the current on the synchronous rectifying switch, convert it into voltage, and then use the operational amplifier for processing [
12,
13]. This method has higher requirements on the operational amplifier and occupies a large chip area, which increases the complexity of the circuit.
Therefore, a simple zero-crossing detection circuit is designed in this paper that adopts the common gate current comparator structure and uses the substrate replacement circuit to improve the sensitivity of the zero-crossing detection circuit and speed up the turn-off process of the power switch. The structure of the circuit is shown in
Figure 7.
The resistor R
2 is used to sample the current flowing through SW. When M
N is open and SW voltage is negative, then it increases gradually. When SW is small enough, V
GS4 > V
GS3, and since I
1 = I
2 always holds, and M
N3 works in a saturated region, M
N4 must enter a linear region, so that VDS is very small and almost equals to 0 at this time. Therefore, the value of V
ZCD is also very small. This will not exceed the threshold voltage of the back-stage inverter and will not trigger the zero-crossing detection signal ZCD. When SW gradually increases, V
GS4 gradually decreases, and M
N4 also enters the saturated region. The width–length ratio of M
N3 and M
N4 is the same, that is, the process coefficient k
3 = k
4. In addition, the substrate replacement circuit is not considered at this time, and the threshold voltage of the two transistors are assumed to be the same,
Vth3 =
Vth4.
The above equation shows that the condition for zero-crossing detection to be triggered is:
Setting
R1 and
R2 can adjust the zero-crossing trigger point of SW. Generally, considering the inevitable delay from triggering the zero-crossing detection signal ZCD to actually turning off M
N,
R1–R2 < 0 is deliberately set, so that the zero-crossing signal can be triggered slightly in advance, and M
N can be turned off in time. Now, consider the substrate displacement circuit. It is obvious that both M
N3 and M
N4 are substrate-biased, and the threshold voltage of both cannot be the same. The purpose of the substrate replacement circuit is to set the substrate potential of M
N3 and M
N4 to the value of SW when the low side switch is conducted. The above formula is rewritten:
The relationship between the threshold voltage and the substrate bias is known:
Formula (15) is as follows:
Therefore, when SW increases, VSB3 decreases. This results in VTH3 decreasing, and the current remains constant, so VG becomes smaller, thus VGS4 becomes smaller, MN4 enters the saturation area faster, and ZCD, a zero-crossing detection signal, is triggered faster. The zero-crossing detection circuit is simple and sensitive, and it does not need to occupy a large amount of chip area.
When zero-crossing detection is triggered, the relictor closes, and the energy on the inductor is not fully released. As a result, this part of the energy oscillates back and forth between the inductor and the parasitic capacitance of the relictor, and ringing occurs at the switching node, as shown in
Figure 8.
The frequency of this damped oscillation is:
The
CN here is the parasitic capacitance of M
N. Although such oscillation will stabilize at the output voltage Vo, it will have an extra EMI effect on the system noise and bring interference to other analog modules in a system on chip, or it may even affect their normal operation. Therefore, it needs to be eliminated. Since the energy of the inductor is not released completely, we can find a way to let this part of the energy flow back to the output end, so as to avoid the ringing phenomenon without energy loss [
14]. A schematic diagram of the circuit structure with the freewheel switch is shown in
Figure 9.
The simulation results are shown in
Figure 10. It can be seen that the ringing phenomenon disappears. The flip point of zero-crossing detection is −755 uV, and the inductor current is −76 uA. The zero-crossing detection circuit works normally, and the results meet the design expectations.