Brief Comparison of High-Side Gate Drivers for Series Capacitor Buck Converters

Abstract

This short article is concerned with the floating high-side gate driver suitable for driving the high side MOSFET/IGBT switch in the series capacitor buck converter family or converters with similar topological features. Biasing the high-side driver in series capacitor buck converters presents an engineering challenge. To alleviate the problem, a modified high-side driver with a voltage lift circuit for driving a high-side switch is proposed. The suggested solution, while being simple and low cost, has several benefits over the earlier propositions. The primary advantage of the proposed circuit is that it relies on a regulated supply to recharge its boot capacitor so to properly bias the high-side driver. Moreover, the proposed driver can operate in a wide range of input voltages while self-adjusting the correct voltage lift according to the operating point of a particular phase of the series buck converter. Thus, any number of phases can be implemented, avoiding cross-coupling effects and providing the high-switch with gating pulses of same amplitude.

1. Introduction

The topology illustrated in Figure 1 was introduced to scientific society as “Double Step-Down Two-Phase Buck” [1], later as “Multi-phase buck converter with extended duty cycle” [2] and, still later, as the series capacitor buck (SCB) converter [3]. Additional variants of SCB were proposed [4,5]. Yet, probably the earliest mentioning of this circuit can be traced back to [6].

SCB is a modified two-phase interleaved buck converter with a capacitor, C_s, inserted in the conduction path between the input source, and the buck inductor of one of the two phases. Compared to the two-phase buck converter, SCB has several advantages [3], which contribute to its increasing popularity. The prominent features of SCB are the steep step-down conversion ratio, often required by modern computer and telecom systems, and its inherent balance of inductors’ currents as well as of the series capacitor voltage. The additional advantage is the lower peak switch voltage. Also, the lower voltage applied to the inductors generates lower current ripple. These features result in decreased switching losses and allow choosing lower inductance values. The multi-phase action also doubles the output current ripple frequency and allows for reduced output filter capacitor. In resume, SCBs can run at switching frequencies in the range of a few MHz, with improved efficiency, while having a more compact, low-volume, design.

One drawback of SCB is its 50% duty cycle limit, which is a tolerable issue.

Another problem, faced by the practicing engineer approaching the task of SCB design, is related to circuit implementation. Recall the well-known saying that “every switch must have a switch driver”. Examining the switcher of SCB in Figure 1, one can see that SCB has two pairs of high-low switches. The switches M_LB and M_LB of phase B constitute a common high–low totem-pole switch pair and can be driven by any of-the-shelf high/low side drivers. Currently available integrated high-side/low-side drivers, such as [7], were designed to accommodate a bridge-leg switching arrangement implemented with a pair of NMOS switches connected to a common midpoint as shown in Figure 2a. Such a building block can be found in numerous switch-mode power processing topologies. The IC driver manufacturers have resolved the isolation and signal coupling problems by a sophisticated isolation and level shifting circuitry and advanced high voltage IC manufacturing techniques, whereas the high-side driver bias problem was resolved by a simple, yet effective, bootstrapped bias circuit D_b, C_b [8]. As a result, the compact, reliable, and simple to apply IC driver has become the industry standard.

Yet, due to the series capacitor Cs, placed in between M_LA and M_HA, see Figure 1, the SCB’s phase A switching arrangement is peculiar and does pose a design challenge. The series capacitor, C_s, charged to a high voltage, V_S, blocks the diode, D_b, and so prevents recharging the boot capacitor, C_b, see Figure 2b. Thus, the bootstrap circuit fails to provide the proper bias for the high side driver. Thus, the existing floating IC drivers cannot accommodate the SBC’s upper switch.

This article is concerned with the problem of implementing a high-side driver in SCB. First, the problem of biasing the high side driver is discussed and some state-of-the-art solutions found in the literature are presented. Next, as a solution to the problem, a modified driver circuit is suggested. The functionality of the proposed driver is validated by simulation and experiment.

One possible remedy to the biasing problem of the high switch driver in SCB is employing a dedicated miniature dc-dc isolated converter [9]. This may work well, yet it is a costly solution, prohibited in low-cost applications.

The old-school transformer-isolated drive [10] can also be considered. However, the transformer’s magnetizing and leakage inductances introduce limitations on pulse width, amplitude, and rise time as well as undesired oscillations and overshoots. Thus, a transformer drive at high switching frequencies is more of a hindrance than a help.

A thorough literature survey conducted by the authors revealed only two publications that acknowledge the problem of the high-side driver in SBC topologies. Each of the counterparts suggested modifying the bootstrap bias circuits for the existing IC drivers. The bias circuit shown in Figure 3a [3] derives its voltage directly from the unregulated input supply as ${\mathrm{V}}_{\mathrm{b}}={\mathrm{V}}_{\mathrm{in}}-{\mathrm{V}}_{\mathrm{Cs}}-{\mathrm{V}}_{\mathrm{on}}$. The disadvantage here is that the bias voltage varies with the operating conditions, i.e., the voltage, V_in. Therefore, such a bias circuit can be effective in only a limited range of the input voltage.

A better solution, shown in Figure 3b [11], employs a type of bucket-brigade circuit. Here, the boot capacitor of the next level is charged by the boot capacitor of the lower level. The advantage here is that the circuit is fed by a regulated bias power supply V_dr. Yet, the bias voltage available for each consecutive driver is decreased by one diode’s voltage drop relative to the previous level (i.e., the bias voltage for the lowest level high side switch S_m3 driver is V_b3 = V_cc − V_on3, the bias voltage for the intermediate level high side switch S_m2 driver is V_b2 = V_b3 − V_on2, whereas the bias voltage for the top level high side switch S_m1 driver is V_b1 = V_b2 − V_on1). As a result, the amplitudes of the driving pulses decrease from one level to another so each phase of SCB receives a slightly different driving voltage for its high switch.

2. Proposed Floating Gate Driver with Voltage Lifting

The proposed circuit, illustrated in Figure 4, applies a standard floating IC driver modified with a capacitive voltage lift circuit at its output to drive the high side NMOS switch in SBC.

The high-side driver is referenced to the lower midpoint, V_ML. Hence, when the lower switch, M_L, is turned on, the voltage across the boot capacitor, C_b, can be refreshed via the bootstrap diode, D_b, as originally designed for, to about

$${\mathrm{V}}_{\mathrm{b}}={\mathrm{V}}_{\mathrm{cc}}-{\mathrm{V}}_{\mathrm{on}},$$

(1)

Thus, the bootstrap bias circuit can operate correctly.

The output of the floating driver is coupled to the high switch gate using the capacitive voltage lift circuit C_l, D_l, R_g1, R_g2. The operation of the voltage lift circuit is rather straightforward. When the driver’s output is at its low level, V_OL = 0, the lifting capacitor, C_l, is charged via D_l to

$${\mathrm{V}}_{\mathrm{Cl}}={\mathrm{V}}_{\mathrm{S}}-{\mathrm{V}}_{\mathrm{on}},$$

(2)

Meanwhile, the gate of the upper switch is kept one diode voltage drop below its source potential. This commits the high switch to remain in the off state.

When the floating driver output rises to its high level, ${\mathrm{V}}_{\mathrm{OH}}={\mathrm{V}}_{\mathrm{b}}$, the resulting voltage difference appears as the upper switch gating voltage:

$${\mathrm{V}}_{\mathrm{gsH}}=\left({\mathrm{V}}_{\mathrm{OH}}+{\mathrm{V}}_{\mathrm{Cl}}\right)-{\mathrm{V}}_{\mathrm{S}}={\mathrm{V}}_{\mathrm{cc}}-2{\mathrm{V}}_{\mathrm{on}},$$

(3)

Proper choice of the V_cc voltage can ensure reliable turn-on of the high switch.

The task of R_g1 is to dampen the oscillations that may develop between the stray inductance of the circuit and the equivalent capacitance. The bleeding resistance R_g2 is required to keep the upper switch off when the system is idle as well as slowly discharge the lifting capacitor and so help track the changes in the series capacitor’s voltage, V_S.

3. Simulation Results

The operation of the proposed driver was first confirmed by simulation by LTspice v. IV. The schematics of the benchmark circuit is illustrated in Figure 5. Here, a software model of a self-oscillating half-bridge driver IR2153, as appears in the LTspice IV library, was used. The simulated circuit was fed by a high voltage source V1 = 100 V, whereas the voltage source V2 = VS = 20 V represents the series capacitor voltage. The IC is biased by V3 = V_cc = 12 V bias supply.

Simulated waveforms of the circuit in Figure 3 are presented in Figure 6. The top screen shows the V_gs voltages of the low and the high switches. As expected, V_gsH is 2 Von lower than V_gsL, as predicted by (3). The second screen shows the voltage across the lift capacitor, VC1, the bias voltage V_cc, and the bootstrapped bias voltage V_b. The next screens show the voltage across the high switch V_dsH, the high midpoint voltage V_MH, and the low midpoint voltage V_ML = V_dsL.

4. Experimental Results and Conclusions

The laboratory prototype of the proposed floating driver with voltage lifting was built and tested. The prototype driver was employed in a kind of off-line AC-DC application that, similar to the SCB, had a series capacitor placed in between the high and low switches. The exact details of the prototype topology and its workings are irrelevant to the driver issue discussed here, therefore, for the sake of brevity, the converter topology will not be revealed here. Yet, in due time, it may be published elsewhere.

The prototype driver circuit was designed with the following parameters (with reference to Figure 4): self-oscillating Driver IR2153 was employed, power switches M_H, M_L—SPA11N60C3 CoolMOS, D_b—STTH1L06 ultrafast high voltage rectifier, D₁—BAT 54, C_s = 100 uF, C_b =10 uF, C₁ = 100 nF, R_g1 10 Ohm, and R_g2 = 10 kOhm.

The power stage was design to operate from 380 V dc and supply a dc load connected across Cs capacitor with output voltage of 25–30 Vdc and output power of up to 30 W. The proposed driver was operating with variable switching frequency in the fs = 50–100 kHz range.

The experimentally measured waveforms of the driver circuit are shown in Figure 7.

The bottom trace shows the low midpoint voltage, V_ML = V_dsL, with a scale of 20 V/div. The middle trace shows the high midpoint voltage, V_MH = V_Cs + V_ML, with a scale of 20 V/div. The top traces show V_gsH and V_gsL with a scale of 10 V/div. Excellent performance of the proposed driver was observed in practice. As can be seen in Figure 7, the driving pulse delivered to the high switch, V_gsH, is just two diode drops lower than that delivered to the lower switch, V_gsL. Note that correct driving pulse amplitude is maintained regardless of the V_Cs offset introduced by the series capacitor Cs. This is consistent with theoretical prediction (3) and also stands in excellent agreement with simulation results shown in Figure 6.

5. Conclusions

This brief addresses the problem of biasing the high-side driver in SCB converters or converters with similar topological feature (series capacitor in between the upper and lower switches).

The benefits of the suggested driver are that it relies on a regulated supply that recharges its bootstrap capacitor to properly bias the high-side driver. Therefore, the driver can operate in a wide range of input voltages. Moreover, the circuit self-adjusts the correct voltage lift according to the operating point of a particular phase of the series buck converter.

The schematic solution proposed here is simple, low cost and reliable, and may be of help to practicing engineers engaged in the task of designing the SCB converters and its derivatives.