3.1. Five-Transistor OTA
The five-transistor OTA shown in
Figure 2 is one of the most basic and widely used OTAs. The input transistors, M
1 and M
2, form a differential transconductor. An active current mirror formed by M
3 and M
4 is loaded onto the transconductor. M
5 serves as a tail current source, providing a current to the other four transistors.
See
Figure 2a to look into the design of the bias circuit and operation at equilibrium. The current source,
Ib,5, is copied to M
5 via the diode-connected transistor. In general, the most clean and/or precise current, which is generated via a bandgap reference, can be copied simply by only one more diode-connected transistor. This simple bias circuit becomes one of the advantages of a five-transistor OTA compared to OTAs based on cascode structure. At the equilibrium, M
1 and M
2 generate current signals,
ID1 and
ID2, respectively. Since
ID1 is fed into M
3, the current flowing through M
4 is same as in
ID1. As shown in
Figure 2a, when two input signals have the same voltage level,
ID1 and
ID2 have the same magnitude with the same direction.
ID1 and
ID2 are canceled, and no current flows to the load. In contrast, when two input signals have the same DC voltage level with a small AC differential signal,
vid, a current flows to the load due to the different directions of
ID1 and
ID2.
See
Figure 2b for a small signal analysis with a differential input signal. When M
1 and M
2 are matched with the same transconductance, represented as
gm, M
1 and M
2 generate
iout =
gm(
vid/2) and −
iout. Note that the current flowing through M
4 is also
iout due to the current mirror. Two currents from M
2 and M
4 are merged together at the output node, thereby flowing 2
iout =
gmvid to the load. In this regard, the
Gm of a five-transistor OTA,
Gm,5TR_OTA, is expressed as follows:
where
gm1 and
gm2 are the transconductances of M
1 and M
2, respectively.
Now, let us look into the
rout of a five-transistor OTA. At the output node,
ro2 and
ro4 are connected in parallel. Therefore, when M
1 and M
2 are matched with the same output impedance, represented
ro, and when
ro2 is much higher than 1/
gm1, the
rout of a five-transistor OTA,
rout,5TR_OTA, is expressed as follows:
where
ro2 and
ro4 are the output impedances of M
2 and M
4, respectively. The higher the
ro, the higher the
rout,5TR_OTA. A high
rout,5TR_OTA is required to provide a constant current regardless of the load resistance or capacitance.
Next, we analyze the frequency response of a five-transistor OTA. Since a single-stage OTA is a single-pole system,
Ao,
ω3dB, and
ωGB are enough to determine the frequency response of a single-stage OTA. Moreover,
ω3dB and
ωGB as well as
Ao are obtained from the
Gm and
rout.
Ao,
ω3dB, and
ωGB of a five-transistor OTA, represented as
Ao,5TR_OTA,
ω3dB,5TR_OTA, and
ωGB,5TR_OTA, are expressed as follows:
where
CLoad is the capacitance of the load capacitor. At DC, the load capacitor is opened, generating a voltage from
Gm,5TR_OTA and
rout,5TR_OTA. As the frequency increases, the load capacitor cannot be ignored, forming a pole with
rout,5TR_OTA.
The next performance metrics, the input and output swing ranges, are illustrated in
Figure 2c. Here,
VD,SAT is the minimum
Vds to maintain the saturation operation of the transistors. And
Vgs is set to
VD,SAT +
Vth at a minimum, where
Vth is the threshold voltage of the transistor. When
VD,SAT and
Vth of all transistors are same, the input voltage signal must be higher than 2
VD,SAT +
Vth and lower than
VDD −
VD,SAT. In the same condition, since two NMOSs (M
2 and M
5) are operated in a saturation region, the lowest output voltage level is 2
VD,SAT. The highest output voltage level is limited to
VDD −
VD,SAT since M
4 should be operated in the saturation region. Compared to other types of single-stage OTAs, a five-transistor OTA has moderate input and output swing ranges that are neither wide nor narrow. Especially when the input DC bias voltage is relatively low, a PMOS-based five-transistor OTA is more suitable.
To look into other important performance metrics,
SRR and
SRF, unity-gain buffers are designed by five-transistor OTAs as shown in
Figure 2d,e. In
Figure 2d, to derive the
SRR of a five-transistor OTA, represented as
SRR,5TR_OTA, a step response is applied with a very short rising time. To derive the falling
SRF of a five-transistor OTA, represented as
SRF,5TR_OTA, a step response is applied with a very short falling time, as shown in
Figure 2e. This means that the signal is much faster than the OTA bandwidth (see
Figure 2d first). When a step response is applied with a rising edge, M
1 turns on and M
2 turns off. Then, all the current flowing through M
5 flows through M
1, which is copied to M
4 by the current source that is composed of M
3 and M
4. Since the current transferred to M
4 does not flow to M
2 but flows to
CLoad, the output voltage rises linearly along with the step response. Conversely, when a step response is applied with a falling edge, M
1 turns off and M
2 turns on.
ID5 does not flow to M
1, M
3, and M
4, but flows to
CLoad through M
2. The output voltage decreases linearly along with the step response. Note that the output voltage is a result of current accumulation on the capacitor. As a result,
SRR,5TR_OTA and
SRF,5TR_OTA are expressed as follows:
The next performance metrics that we analyze are nonidealities including circuit noise, offset, and mismatches. Since the voltage-to-current conversion and amplification are mainly performed by M1 and M2, the nonidealities of these two input transistors become the most dominant sources that cause performance degradation. In contrast, the nonidealities of M5 become less dominant to the overall performance since they can be canceled out at the output port with perfectly matched M3 and M4. As a result, the effect of the nonidealities of M1 and M2 on the overall performance is greater than that of M3 and M4, and that of M3 and M4 is greater than that of M5. Therefore, in general, circuit designers reduce the performance degradation from the nonidealities by increasing the size of M1 and M2. Moreover, since the mismatch between M3 and M4 cause a systematic offset, a careful layout is needed to reduce the mismatch.
3.2. Telescopic Cascode OTA
The telescopic cascode OTA in
Figure 3 is a type of single-stage OTA that achieves a higher
rout and
Ao compared to those of a five-transistor OTA. In particular, the telescopic cascode OTA can obtain a high
rout and
Ao without an additional stage, thereby achieving power efficiency as well.
Like in a five-transistor OTA, M
1 and M
2 generate current signals, represented as
ID1 and
ID2, respectively. And in a cascode current mirror composed of M
3, M
4, M
8, and M
9,
ID1 is copied to M
4. As shown in
Figure 3a, when two input signals have the same voltage level, no current flows to the load. In contrast, when
vid is applied to the input nodes, a current flows to the load due to the different directions of
ID1 and
ID2.
See
Figure 3b for a small signal analysis with a differential input signal. The principle of the voltage-to-current conversion of a telescopic cascode OTA is the same as that of a five-transistor OTA. Therefore, when M
1 and M
2 are matched with
gm, the
Gm of a telescopic cascode OTA,
Gm,TC_OTA, is expressed as follows:
In contrast, the
rout and
Ao are boosted further thanks to the cascode current mirror. At the output node, the
rout formed by two NMOSs and the
rout formed by two PMOSs are connected in parallel. Therefore, when transistors are matched with the same
gm and
ro, the
rout of a telescopic cascode OTA,
rout,TC_OTA, is expressed as follows:
The
rout,TC_OTA is
gmro times higher than
rout,5TR_OTA in (2). The
rout is amplified by the voltage gain of a single transistor through the cascode current mirror.
Since a telescopic cascode OTA is also a type of single-pole system,
Ao,
ω3dB, and
ωGB determine the frequency response.
Ao,
ω3dB, and
ωGB of a telescopic cascode OTA, represented as
Ao,TC_OTA,
ω3dB,TC_OTA, and
ωGB,TC_OTA, are expressed as follows:
Ao,TC_OTA in (9) is
gmro times higher than
Ao,5TR_OTA in (3), while
ω3dB,TC_OTA in (10) is
gmro times lower than
ω3dB,5TR_OTA in (4). Note that
ωGB,TC_OTA is same as
ωGB,5TR_OTA in (5). The gain of a telescopic cascode OTA is higher than that of a five-transistor OTA for the frequency range less than
ω3dB,5TR_OTA/2π. In contrast, the gain of a telescopic cascode OTA is the same as that of a five-transistor OTA for the frequency range from
ω3dB,5TR_OTA/2π to
ωGB,TC_OTA.
Although the cascode current mirror improves the gain and
rout further, it degrades the input and output swing ranges. Among various types of bias circuits, the bias circuits shown in
Figure 3a are employed to minimize the degradation of the swing range (see M
8 and M
9 first). M
8 and M
9 are biased by a diode-connected PMOS with a current source, where the transistor size of the diode-connected PMOS is four times smaller than those of M
5 and M
9. This diode-connected PMOS generates a voltage difference of 2
VD,SAT +
Vth from
VDD, which is the minimum voltage that allows for both transistors to operate in the saturation region. In this bias condition, M
8 and M
9 can be operated with minimum |
Vds| of
VD,SAT. Similarly, to allow for M
2 and M
7 to operate in the saturation region with a minimum |
Vds| of
VD,SAT, a diode-connected NMOS with a current source where the transistor size of the diode-connected NMOS is four times smaller than those of M
6 and M
7 is employed. When the
VD,SAT and
Vth of all transistors are the same, the input voltage signal must be higher than 2
VD,SAT +
Vth and lower than
VDD − 2
VD,SAT. In the same condition, since three NMOSs are cascoded at the output, the lowest output voltage level is 3
VD,SAT. Similarly, the highest output voltage level is limited to
VDD − 2
VD,SAT due to two cascoded PMOSs at the output node. Compared to the swing ranges of a five-transistor OTA, the telescopic cascode OTA has a more narrow swing range due to the cascade current mirror. Moreover, as shown in
Figure 3a, the complexity and power consumption of bias circuits are increased. That is, the gain and
rout of a telescopic cascode OTA are improved at the sacrifice of swing ranges and the complexity of bias circuits.
The
SRR and
SRF of a telescopic cascode OTA are analyzed in the same way as a five-transistor OTA. As shown in
Figure 3d,e, in the unity-gain buffer configuration, the additional cascode transistors do not affect the
SRR and
SRF. M
6, M
7, M
8, and M
9 just follow the operation of M
1, M
2, M
3, and M
4, respectively. The
SRR and
SRF of a telescopic cascode OTA, represented as
SRR,TC_OTA and
SRF,TC_OTA, are expressed as follows:
The nonidealities of additional transistors, M6–M9, cause negligible performance degradation. The nonidealities of additional transistors, M6–M9, are transferred to the output with a low gain. Therefore, as in a five-transistor OTA, the effect of the nonidealities of M1 and M2 on the overall performance is greater than that of M3 and M4, and that of M3 and M4 is greater than that of M5.
3.3. Folded Cascode OTA
The folded cascode OTA shown in
Figure 4 is employed to extend the input swing ranges of the telescopic cascode OTA while maintaining a high gain and high
rout. The transformation from a telescopic cascode OTA to a folded cascode OTA involves modifying the transistor configuration and biasing arrangement. In the NMOS-input telescopic cascode OTA, the input stage consists of a differential pair, followed by NMOS cascode transistors connected to the load, as shown in
Figure 3. On the other hand, the folded cascode OTA replaces the NMOS cascode transistors with four PMOS transistors configured in a folded arrangement between the input stage and the output stage. Two PMOS transistors, M
8 and M
9, serve as the cascode transistors, while the other PMOS transistors, M
3 and M
4, act as the current sources. The current sources provide bias currents to the input stage and output stage.
The modification improves the input swing range, but as shown in
Figure 3a and
Figure 4a, one more diode-connected transistor is required when the same wide-swing cascode current mirrors are employed. Fortunately, the bias circuit for M
8 and M
9 and the bias circuit for M
10 and M
11 can share one bias current, consuming the same power compared to the bias circuits for a telescopic cascode OTA.
See
Figure 4a first to show the operation at equilibrium. The current flowing through M
9, denoted as
ID9, is the same as
ID4 −
ID2, according to Kirchhoff’s Current Law (KCL). The current flowing through M
6, denoted as
ID6, is copied to M
7, where
ID6 is
ID3 −
ID1 =
ID4 −
ID2. Therefore, like a five-transistor OTA and a telescopic cascade OTA, no current flows to the load when two input signals have the same voltage level.
The small-signal parameters are also the same as those of a telescopic cascade OTA. See
Figure 4b for a small signal analysis with differential input signals. The principle of a voltage-to-current conversion of a folded cascode OTA is the same as that of a telescopic cascode OTA. Since the differential voltage inputs are converted to a current by M
1 and M
2, the
Gm of a folded cascode OTA,
Gm,FC_OTA, is expressed as follows:
where M
1 and M
2 are matched with
gm. Likewise, the
rout is boosted further thanks to the cascode current mirrors. At the output node, the
rout formed by M
7 and M
11 and the
rout formed by two M
2 and M
9 are connected in parallel. Since M
9 works as a common-gate amplifier from the input signal point of view like M
11, M
2 and M
9 also increase the
rout. Therefore, when the transistors are matched with the same
gm and
ro, the
rout of a folded cascode OTA,
rout,TC_OTA, is expressed as follows:
Since the small-signal parameters are same as those of a telescopic cascade OTA,
Ao,
ω3dB, and
ωGB of a folded cascode OTA, denoted as
Ao,TC_OTA,
ω3dB,TC_OTA, and
ωGB,TC_OTA, are expressed as follows:
The same frequency response characteristic as that of a telescopic cascode structure is expected.
As shown in
Figure 4c, the folded cascade OTA has a wider input swing range compared to the telescopic cascade OTA due to the use of a PMOS cascode transistor in the folded arrangement. In a telescopic cascode OTA, the NMOS cascode transistor, M
9, restricts the input swing range as it requires a minimum voltage headroom. However, the PMOS cascode transistor in a folded cascode OTA, M
9, allows for the input voltage to swing more positively, expanding the input range and enabling operation in a wider voltage range. In contrast, the output swing range of a folded cascode OTA is same as that of a telescopic cascode OTA since M
4, M
9, M
7, and M
11 require a minimum voltage headroom.
Figure 4d,e show the slewing of a folded cascode OTA for the rising and falling step responses, respectively. In general,
ID3 and
ID4 are set to be higher than
ID5 [
21]. Let us first look at
Figure 4d,e, where
ID3 and
ID4 are set to be same as
ID5. The rising step response turns on M
1, allowing for M
1 and M
5 to become sinking paths of
ID3. No current flows to M
8 due to
ID3 and
ID5 being equal, which turns off M
2, and the NMOS cascode current mirror is composed of M
6, M
7, M
10, and M
11. As a result, according to the KCL, the
ID4 flows to
CLoad through M
9, and the rising SR of a folded cascode OTA,
SRR,FC_OTA, is expressed as follows:
When the falling step response is applied, M
1 turns off and M
2 turns on, allowing for M
2 and M
5 to become sinking paths of
ID4 and turning off M
9. Therefore, the NMOS cascode current mirror composed of M
6, M
7, M
10, and M
11 sinks the current from
CLoad, where the sinking current magnitude is
ID3. As a result, the falling SR of a folded cascode OTA,
SRF,FC_OTA, is expressed as follows:
where
ID3 =
ID4 =
ID5, and
SRR,FC_OTA and
SRF,FC_OTA are the same as
SRR,FC_OTA and
SRF,FC_OTA, respectively.
When ID3 = ID4 > ID5 and the rising step response is applied, M2 does not turn off perfectly, flowing to ID3 − ID5. Therefore, SRR,FC_OTA also follows (18) despite the increasing current. When ID3 = ID4 > ID5 and the rising step response is applied, the sourcing current ID4 − ID5 flows through M9, which has a different direction of the sinking current ID3 flowing through M7 and M11. SRF,FC_OTA also follows (19) despite the increasing current. As a result, setting ID3 and ID4 as larger than ID5 to increase SRR,FC_OTA and SRF,FC_OTA is not effective since SRR,FC_OTA and SRF,FC_OTA are independent of ID3 and ID4.
The performance degradation due to the nonidealities of a folded cascode OTA includes the performance degradation due to telescopic nonidealities. Like the telescopic cascade amplifier, the nonidealities of cascoded transistors, M8–M11, cause negligible performance degradation due to the low gain. As in a folded cascade OTA, the effect caused by the nonidealities of M1 and M2 on the overall performance is greater than those caused by other transistors. However, in general, the performance degradation by two additional current sources, M3 and M4, are not negligible, thus reducing the nonidealities of M3 and M4 by increasing the gate size, and so on. This added noise is one of the disadvantages of a folded cascode OTA.
3.4. Current Mirror OTA
Telescopic and folded cascode OTAs are employed to increase the rout, thus achieving a high Ao. However, as a trade-off, the output swing ranges of these two OTAs and one of the performance metrics related to speed, ωGB, are limited due to the cascode output stages. Furthermore, another performance metric related to speed, SR, is also limited by the magnitude of the input bias current.
See
Figure 5a to look into the design of the bias circuit and operation at equilibrium. Like a five-transistor OTA, the current source,
Ib,5, is copied to M
5 via the diode-connected transistor. Since M
3 and M
4 are diode connected, the
VGS of M
3 and M
4 are determined by
I5 and the aspect ratios of M
3 and M
4. Through the current mirrors, the
VGS of other transistors are also determined without additional bias circuits. Like a five-transistor OTA, this simple bias circuit becomes one of the advantages of a five-transistor OTA compared to OTAs based on a cascode structure. At the equilibrium, M
1 and M
2 generate current signals,
ID1 and
ID2, respectively.
ID1 is fed into M
3, and
ID6 flowing through M
6 becomes
K∙
ID1 via the current mirror composed of M
3 and another transistor, which is
K times wider than M
3. When M
6 and M
7 have the same aspect ratios,
ID7 flowing through M
7 also becomes
K∙
ID1. Note that
ID2 is equal to
ID1. Since
ID2 is amplified by the current mirror composed of M
4 and another transistor, which is
K times wider than M
4, no current flows to the load. In contrast, when two input signals have the same DC voltage level with a small AC differential signal, denoted as
vid, a current flows to the load due to the different directions of
ID1 and
ID2.
See
Figure 4b for a small signal analysis with a differential input signal. When M
1 and M
2 are matched with the same transconductance, denoted as
gm, M
1 and M
2 generate
iout =
gm(
vid/2) and −
iout.
iout and −
iout are amplified to
K∙
iout and −
K∙
iout at the output node. Two amplified currents are merged together at the output node, thereby flowing 2
iout =
K∙
gmvid to the load. In this regard, the
Gm of a current mirror OTA,
Gm,CM_OTA, is expressed as follows:
Thanks to the current mirrors at the output stage, a higher Gm can be achieved compared to other OTAs from the same gm1 and gm2. However, at the expense of a higher Gm, additional current paths for amplifying the current are required, consuming higher power.
Let us look into the
rout of a current mirror OTA. At the output node,
roK4 and
ro7 are connected in parallel, where
roK4 is the output impedance of the transistor, which is
K times wider than M
4. Therefore, two transistors at the output node have the same output impedance, denoted as
ro, and the
rout of a five-transistor OTA, denoted as
rout,CM_OTA, is expressed as follows:
The frequency response of a current mirror OTA can be derived from small-signal parameters.
Ao,
ω3dB, and
ωGB of a current mirror OTA, denoted as
Ao,CM_OTA,
ω3dB,CM_OTA, and
ωGB,CM_OTA, are expressed as follows:
Here, ro in (21)–(23) is K times lower than ro in (2)–(4) since ro of a single transistor is inversely proportional to the bias current at equilibrium. In this regard, rout,CM_OTA in (21) is K times lower than rout,5TR_OTA in (21). As a result, theoretically, Ao,CM_OTA in (22) is the same as Ao,5TR_OTA in (3). In contrast, ω3dB,CM_OTA in (23) and ωGB,CM_OTA in (24) are K times lower than ω3dB,5TR_OTA in (4) and ωGB,5TR_OTA in (5), respectively.
A current mirror OTA has a wider output swing range compared to other types of OTAs, which becomes one of the advantages of a current mirror OTA. There are only two transistors at the output node, thus guaranteeing that those two transistors operate in the saturation region. The highest output voltage level is limited to VDD − VD,SAT, and the lowest output voltage level is limited to VD,SAT. Since other single-stage OTAs have a larger number of transistors from 3 to 5, a current mirror OTA has the widest output swing ranges among single-stage OTAs. Especially when the input DC bias voltage is relatively low, a PMOS-based five-transistor OTA is more suitable. It can be said that a current mirror OTA can guarantee the rail-to-rail output swing range. The input swing range of a current mirror OTA is the same as that of a five-transistor OTA since these two OTAs have a similar structure at the input node.
The current amplification by
K times also enhances the SR. As shown in
Figure 5d,e, the current flowing through PMOS at the output node determines a rising SR in a current mirror OTA, denoted as
SRR,CM_OTA, and the current flowing through the NMOS at the output node determines a rising SR in a current mirror OTA, denoted as
SRF,CM_OTA. Since
ID5 is amplified by
K times through current mirrors,
SRR,CM_OTA and
SRF,CM_OTA are expressed as follows:
while the SRs of other OTAs are limited by the magnitude of the input bias current, the SR of a current mirror OTA is not limited by the magnitude of the input bias current. However, the higher the
K, the higher the power consumption.
Despite the advantages of a current mirror OTA including a larger Gm, a wider bandwidth, a wider output swing range, and a faster SR, a current mirror OTA suffers greater performance degradation due to nonidealities compared to other structures. Nonidealities of all additional current mirrors are amplified to the output with a moderate gain. Therefore, a current mirror OTA has not been employed as a low-noise amplifier in applications that require a high resolution.