Research Progress in Breakdown Enhancement for GaN-Based High-Electron-Mobility Transistors

Round 1

Reviewer 1 Report

Overall, this paper needs to address the device guideline or suggestions to improve the PPA of HEMT for researchers. Or this paper needs to provide the technological trend of HEMT, not just listing the items of unit processes.

Author Response

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Author Response File: Author Response.pdf

Reviewer 2 Report

Please see attached pdf file for the comments, thank you.

Comments for author File: Comments.pdf

Author Response

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Author Response File: Author Response.pdf

Reviewer 3 Report

Research Progress of Breakdown Enhancement for GaN-Based 2 High Electron Mobility Transistors

 

After reading this work I can not recommend it for publication.

Several English faults, no deeply explanations sorported by physical models. The reference analysis is very simple. Only 35 references for a review are not enough.

The figures are not well illustrated and explained. Finally, no equations and circuits were employed.  

The abstract does not represent a summary of the most important of the manuscript.

Introduction line 29

 

 by the smaller band gap of materials, must be re-written.

 

line 45: maximum operating voltage is only 650V for pGaN HEMT, and 900V for cascode structure.

At least 3 references are needed.

From 2.1. Electric Field Concentration section:

The explanation must be enhanced the bandgap needs to be there and the electrical connections must be illustrated to the reader to know not only where is the depletion region, the applied voltage must be illustrated at the same time.

From 2.2. Leakage Current in Buffer Layer.

Since this work is a review, the background carrier concentration of GaN must be reported (several references). What is common background carrier concentration? Which is the most common impurity such as C?.

Moreover, the buffer layers must be discussed such as AlN or superlattices as AlGaN/AlGaN etc. Here is an important reference for buffer, dislocations, and n type doping.

M A Zambrano-Serrano et al 2022 Mater. Res. Express 9 065903 DOI 10.1088/2053-1591/ac7512

From: 2.3. Leakage Current in Gate and 2.4. Vertical Breakdown

The description is so superficial and the reference 3 enclosed in a circle is wear. In the figure must be illustrated clearly to the reader the direction of the leakage current.

You give numbers such as 1.3kV, but there are no references. Every number you give must be supported with not just for one reference.

 

In section 3 you mentioned:

It can be observed from Fig. 2 that an approximate positive linear correlation exists between the breakdown voltage and the gate-drain spacing of the device adopting self-aligned slant field plate. At a gate-drain spacing of 20 µm, the breakdown voltage of the device can reach up to 1900 V [12].

Unfortunately, you did not give details of the layer treatment such as with F. Moreover, the physics of the breakdown voltage dependence with source electrode dependence. Furthermore, no ELECTRONIC or circuit is able to help to reduce this condition.  

Phases such as those below are not well written, look as generated by google translate,

 Despite that the highest breakdown voltage of GaN device ever recorded is 10400 V [13], its off-state leakage current approximating 0.1mA/mm at 3000 V still remains relatively high, under which circumstance the off-state loss becomes non-negligible

 The conclusions are to basics.

 

Several English faults

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 3 Report

After review the work the authors almost addressed all of my comments. So, now it its suitable for publication

it is ok