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Article

Self-Rectifying Resistive Switching Memory Based on Molybdenum Disulfide for Reduction of Leakage Current in Synapse Arrays

Department of Electronic Engineering, Gangneung-Wonju National University, Gangneung 25457, Republic of Korea
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(22), 4650; https://doi.org/10.3390/electronics12224650
Submission received: 12 October 2023 / Revised: 8 November 2023 / Accepted: 13 November 2023 / Published: 15 November 2023
(This article belongs to the Special Issue Novel Semiconductor Devices Technology and Systems)

Abstract

:
Resistive random-access memory has emerged as a promising non-volatile memory technology, receiving substantial attention due to its potential for high operational performance, low power consumption, temperature robustness, and scalability. Two-dimensional nanostructured materials play a pivotal role in RRAM devices, offering enhanced electrical properties and physical attributes, which contribute to overall device improvement. In this study, the self-rectifying switching behavior in RRAM devices is analyzed based on molybdenum disulfide nanocomposites decorated with Pd on SiO2/Si substrates. The switching layer integration of Pd and MoS2 at the nanoscale effectively mitigates leakage currents decreasing from cross-talk in the RRAM array, eliminating the need for a separate selector device. The successful demonstration of the expected RRAM switching operation and low switching dispersion follows the application of a Pd nanoparticle embedding method. The switching channel layer is presented as an independent (Pd nanoparticle coating and MoS2 nanosheet) nanocomposite. The switching layer length (4000 μm) and width (7000 μm) play an important role in a lateral-conductive-filament-based RRAM device. Through the bipolar switching behavior extraction of RRAM, the formation of the conductive bridges via electronic migration is explained. The fabricated Pd-MoS2 synaptic RRAM device results in a high resistive current ratio for a forward/reverse current higher than 60 at a low resistance state and observes a memory on/off ratio of 103, exhibiting stable resistance switching behavior.

1. Introduction

The traditional architectures based on von Neumann systems have long encountered a problem with the “memory wall”—a bottleneck resulting from data transmission between the memory and processing units. Recently, neuromorphic system technology, drawing inspiration from the human brain, has emerged as a potential solution to this issue. The intricate human brain performs computing, learning, and memory functions in parallel, consuming approximately 10 W of energy within a volume of around 1 L. The neural network of the human brain is designed with 1015 synapses and 1011 neurons, and the strength of neuron–synapse connections is adjusted through a process known as spike-timing-dependent plasticity (STDP). In the field of neuromorphic non-volatile memory technology, the emerging resistive random-access memory (RRAM) device is attracting significant attention due to its excellent properties, including low operation voltage, low power consumption, scalability, and compatibility with complementary metal oxide semiconductor (CMOS) technologies. STDP-mechanism-based synaptic RRAM devices offer the ability to store and retrieve data by altering their resistance states through the application of voltage pulses. This mechanism enables the realization of compact and energy-efficient memory solutions for various applications, including data storage and computing, artificial intelligence, and internet of things devices.
However, RRAM devices face challenges in cross-bar array architectures due to leakage currents caused by interference between nearby cells. To alleviate the cross-talk in memristive RRAM devices, a new concept of operational and structural solutions has been developed. Conventional synapse-based RRAM devices have been adopted in one-transistor and one-resister (1T1R) structures or one-selector and one-resister (1T1S) structures, where each RRAM cell is integrated with a non-linear circuit device known as a selector device [1,2]. These approaches have disadvantages, including larger cell sizes, increased operating voltages, and complex fabrication processes. As an alternative, research has been conducted to develop memory cells with self-rectifying properties to suppress leakage current interference in RRAM cells [3,4,5].
As shown in Figure 1, the vertical sandwich structure of the RRAM device serves as an indicator for thin film materials and various switching mechanisms. The conventional RRAM device structures typically comprise metal-oxide metal or metal-oxide-doped Si. Generally, the electrical performance of RRAM relies on the thin film materials used for the electrode and the switching layer. Various materials have been explored for the application of self-rectifying RRAM, including nanomaterials, carbon-based materials [6,7], metal oxides (MXs) [8], and transition metal dichalcogenides (TMDs), which have been used as switching channel layers in various memory platforms. MXs-based RRAM devices exhibit inherent and favorable properties for the switching behavior. The deposition of the switching layer using MXs, such as titanium dioxide [9], zinc oxide, zirconium dioxide, hafnium oxide [10,11,12], tin dioxide [13], and aluminum oxide [14], among others, is compatible with CMOS materials, making them suitable candidates for the development of high-performance RRAM and electronic synaptic devices. However, despite the thin nature of the MXs-based switching layers in RRAM devices, ultra-fine film deposition often results in significant leakage currents and a limited memory window [15]. Recently, various approaches have been conducted to reduce the operating voltage of the RRAM, except for the method of reducing the thickness of the switching layer. To achieve low-power operation in RRAM, diverse techniques can be employed, including embedding metal nanoparticles to enhance the electric field, incorporating nanostructured materials into the switching channel layer, and altering the electrode [16]. While decorating the switching layer with metal nanoparticles has been effective in reducing the SET voltage, it has been observed that this approach does not necessarily lead to an improvement in the memory window [3].

2. Nanomaterials for Switching Channel Layer

The synthesis of one-dimensional (1D) and two-dimensional (2D) nanostructured materials has unveiled their potential for applications in memory device platforms and toxic gas detection sensors. RRAM devices employing nanostructured materials as the switching layer induce the formation of conductive filaments in thin switching channel layers, resulting in excellent electrical characteristics relative to the deposition area density. The manufacturing process of nanomaterial-based RRAM devices offers insights into the low-power operation and memristive switching properties. It is imperative to propose solutions, which simultaneously reduce leakage current and enhance memory window characteristics. Nanostructured materials have gained attention in the fabrication of flexible RRAM devices due to their ability to uniformly form nanostructures at room temperature [17]. Memristive switching channel layers utilizing carbon-based nanomaterials, such as graphene, graphene oxides, carbon nanotubes (CNTs), single-walled carbon nanotubes, and multi-walled carbon nanotubes, have been reported [18]. On the other hand, 1D CNTs can be categorized into metallic or semiconducting based on the orientation of particles, chirality, and diameter, which significantly affect their electrical and physical properties. One-dimensional CNTs are attracting attention due to their thermal stability and excellent electrical properties. The physical advantages of CNTs are high elasticity and durability, high current density (≈109 A/cm2), and high thermal conductivity (≈3000 W/mK). Among the CNTs deposition methods, achieving the synthesis of semiconducting CNTs through the dip-coating technology is exceptionally challenging [18]. A semiconducting bandgap is necessary to exhibit RRAM self-rectifying diode characteristics as a switching channel layer. Consequently, 2D TMDs nanostructured materials are structurally similar to graphene materials but offer an adjustable bandgap [19]. The junction between the switching channel layer and the electrode facilitates the formation of a Schottky barrier, imparting diode characteristics. Two-dimensional TMDs present promising opportunities to optimize the deposition thickness and leverage unique electrical and physical properties to enhance the performance of RRAM devices. Well-known 2D TMDs layered materials, such as tungsten disulfide, tungsten diselenide, molybdenum diselenide, and MoS2, have garnered interest as suitable materials for RRAM thin film layers [20]. MoS2 exhibits favorable characteristics as a switching channel layer, including flexibility, transparency, and good electron mobility, compared to other materials. Various deposition methods have been employed to achieve high-quality MoS2 nanosheets. Many studies have attempted the deployment of physical vapor deposition or chemical vapor deposition (CVD) technologies to grow thin MoS2 layers [18,19]. MoS2 is of particular interest in RRAM applications due to its self-rectifying switching behavior—a phenomenon in which the direction of the current flow is effectively controlled by the device structure. These memristive switching behavior mechanisms eliminate the need for external diodes or selectors, simplifying device structures and reducing power consumption. Meanwhile, nanoparticles and nanosheets hold promise for use in emerging memory devices and intelligent memristors through the synthesis technology. The fabrication process of nanocomposite-based RRAM devices provides insights into the low-power operation and resistance switching characteristics [21,22].
To showcase high-performance RRAM devices, there have been reports of nanocomposite-based MoS2 RRAM devices using materials such as poly(4-vinylphenol) [23], reduced graphene oxide (rGO) [24], and polymethylmethacrylate (PMMA) [25]. It is worth noting that these RRAM devices were fabricated on substrates such as indium tin oxide (ITO) coated glass and polyethylene naphthalate (PEN). While there have been advancements in vertically stacking MXs and nanocomposites as switching channel materials, the field of RRAM devices based on metal nanoparticle MoS2 switching layers remains relatively unexplored. Recent investigations have focused on the impact of nanoparticles embedded in the switching channel layer on the RRAM switching mechanism. One promising approach to generating stable electric fields and reducing switching dispersion within the RRAM’s switching channel layer is the doping of transition metals, such as palladium (Pd), platinum (Pt), ruthenium (Ru), and nickel (Ni). The Pd nanoparticle coating method demonstrates excellent transparency, low SET voltage, and a wide switching memory window [3]. Introducing Pt nanoparticles into the electric field has been shown to reduce the operating voltage, enhance stable resistive switching (RS) operation, and decrease switching dispersion [26]. Furthermore, decorating the RS layer with Ru nanoparticles has been employed to improve device yield and retention performance [27]. Ni nanoparticles have been found to enhance the local electric field, resulting in reduced switching dispersion [28].
Therefore, the independent fabrication process of nanocomposite switching layer RRAM holds promise for applications in emerging memory devices and intelligent memory components. Horizontal conductive filaments (CFs)-based RRAM devices formed within the switching layer are proposed to alleviate the cross-talk between cells due to current leakage during the SET/RESET process in the memory array. A novel approach to achieving self-rectifying switching behavior in RRAM devices is proposed in this study by employing Pd-decorated MoS2 nanocomposites on SiO2/Si substrates. The integration of Pd-MoS2 at the nanoscale not only enhances the device’s switching behavior but also addresses the issue of leakage current caused by cross-talk in RRAM arrays. Furthermore, the Pd nanoparticle embedding technology reduces switching dispersion and aids in the formation of CFs within the electric field. This advancement has the potential to enable efficient operation in high-density memory cells without the need for additional selector devices.

3. Experimental Details

3.1. Fabrication Process

The fabrication of lateral CFs RRAM devices based on Pd-MoS2 nanocomposites is depicted in Figure 2a. Initially, a series of cleaning steps were conducted using acetone, isopropyl alcohol, and deionized water to eliminate organic solvents from the p-type silicon substrate (size: 10 mm × 10 mm). After drying with N2 gas, a 300 nm SiO2 layer was generated on the p-type substrate through dry oxidation. For the synthesis of the overall MoS2 switching channel layer, the CVD method was employed by introducing MoO3 powder (18 mg) and S powder (120 mg) into the furnace equipment. During the growth of MoS2, the argon (Ar) gas flow rate, central heating zone temperature, and upstream S zone temperature were set at 25 SCCM, 750 °C, and 180 °C, respectively. Figure 2b illustrates the nanostructures of monolayer MoS2 (≈0.72 nm) and multilayer MoS2 (≈1.44 nm). Subsequently, the monolayer and multilayer MoS2 films were synthesized on the SiO2 without the need for photolithography. Figure 2c shows the deposition rate of the DC sputter. Following the pattering of a Pd mask (size: 9000 μm × 2500 μm), 8 nm of Pd nanoparticles were embedded with the MoS2 nanosheets to form the switching channel layer. In this process, optimizing the Pd decoration and MoS2 synthesis is critical. If the Pd deposition thickness is 1 nm, the Pd molecules at the MoS2 interface may not be well defined, potentially leading to low Pd nanoparticle coverage density [29]. If the Pd thickness exceeds 10 nm, the Pd nanoparticles tend to form a continuous Pd electrode sheet [30]. Pd, titanium (Ti), and gold (Au) were manufactured using 99.99% pure targets. The DC sputter deposition conditions were held constant, with Ar gas flow rate, DC power, chamber working pressure, and substrate temperature set at 30 SCCM, 100 W, 1.4 × 10−3 Torr, and a temperature range from 0 to 60 °C, respectively. To apply the top electrode (TE) and bottom electrode (BE) through two-terminal electrode mask pattering (size: 7000 μm × 2000 μm), the Ti/Au electrodes were deposited with thicknesses of 10 nm/40 nm and an electrode area of 14,000,000 μm2, completing the fabrication of the RRAM device.

3.2. Raman Spectroscopy

Raman data spectroscopy precisely analyzes the exact number of layers, structural properties, and energy of the vibration modes, which provide important insights into nanomaterials [31]. In Raman data measurements, Figure 3a,b focus on the crucial peaks associated with two vibrational modes (E2g and A1g) of MoS2. The E2g peak of MoS2 is significantly influenced by its crystalline structure, particle size, and thickness during growth. Additionally, the A1g peak vibration is related to the crystalline structure and thickness of MoS2, serving as an indicator of material quality. Figure 3c describes the Raman spectrum—an important indicator for understanding the physical properties and structure of monolayer and multilayer MoS2 on the SiO2/Si substrate. For monolayer MoS2, the E2g and A1g peaks were observed at 382 cm−1 and 402 cm−1, respectively. In contrast, for multilayer MoS2, these peaks appeared at 380 cm−1 and 407 cm−1, respectively. The E2g peak (in-plane vibrational mode) involves parallel vibrations of Mo and S atoms within MoS2. Additionally, the A1g peak (out-of-plane vibrational mode) encompasses the vertical vibrations of S atoms [32]. The distance between the two peaks acts as an indicator, which directly represents the number of layers of MoS2. It was confirmed that the distance between the peaks increases due to high-intensity vibrations as the number of layers increases.

3.3. Photoluminescence Mapping

Photoluminescence (PL) spectroscopy is utilized to determine the material’s electronic states, structural characteristics, and bandgap based on the energy of emitted photons. As illustrated in Figure 4a, PL signals were observed at room temperature using a 532 nm laser. For monolayer MoS2 samples, it can be observed that the PL intensity exhibits a lower peak compared to multilayer MoS2. Through PL mapping, MoS2 synthesized via CVD techniques exhibits high-quality crystalline growth. Planck’s constant (6.62 × 10−34 J·s), the speed of light (2.99 × 108 m/s), Boltzmann’s constant (1.38 × 10−23 J/eV), and wavelength are denoted as h, c, k, and λ, respectively, and Equation (1) is used to calculate the energy of emitted photons.
E = h × c k × λ = 1240 λ ( e V )
Figure 4a shows that the PL peak of monolayer MoS2 nanosheets appears at 660 nm, while that of multilayer MoS2 nanosheets is located at 995 nm. Applying the conversion relationship between wavelength and photon energy, Figure 4b reveals that the bandgap of monolayer MoS2 is extracted as 1.87 eV, while that of multilayer MoS2 is observed to be 1.24 eV. Consequently, this aligns with the bandgap range typically known through research [33]. The intensity of the PL peak represents the efficiency of the light emission process occurring in MoS2 [32].

4. Results and Discussion

The RS operation model in RRAM devices has typically been described using three main theoretical mechanisms. RS behaviors are influenced by factors such as the deposition thickness, length and width of the switching channel layer, device stack materials, the measurement environment, and RS operation parameters. Generally, thermal–chemical reactions, electrochemical metallization (ECM), and valence change mechanisms (VCM) are employed to explain RS behaviors. In STDP mechanism-based RRAM devices using MXs materials, the ECM model is recognized for forming conductive bridges through the movement of metal ions within the channel layer. In contrast, the VCM model regulates CFs by creating and recombining oxygen vacancies (Vo) induced by an electric field. In the initial state of VCM, an initial high-resistance state (HRS) is established with low concentrations of Vo within the MXs. Subsequently, when a forming voltage is applied to the TE, breakdown occurs within the MXs switching layer, leading to the generation of Vo and the formation of CFs through which the current flows between the electrodes. This phenomenon is commonly referred to as electroforming, characterized by the simultaneous increase in the electric field and temperature, resulting in positive feedback, which generates numerous Vo at once, causing a rapid change in the resistance state. MXs-based RRAM devices can modulate resistance by repeating the SET and RESET processes after the initial formation. Following the formation process, the application of voltage combines oxygen ions with the filaments, thereby increasing resistance (HRS), which is a key aspect of the RESET process. The RESET process exhibits a more gradual resistance modulation compared to the formation process, as it involves the breaking of CFs, primarily occurring around the interfacial layers. Consequently, in the SET process, which reduces resistance to achieve a low-resistance state (LRS), the CFs reconnect to an even greater extent than during the formation stage. To summarize, by adjusting the voltage applied to the TE, MXs-based RRAM devices can achieve multiple distinct resistance states (HRS, LRS), along with gradual resistance modulation, reflecting variations in synaptic weights in neural network models. Recently, new conceptual models have been proposed to control the current paths by generating ions or vacancies using various switching channel materials, nanomaterials, and nanocomposites in RRAM cells [34,35]. In addition, CFs can be formed in the switching channel layer through nanoparticle-embedded effects and the physical and electrical molecular bonding layer.

4.1. Resistive Switching Mechanisms

The RS mechanism for Pd coated multilayer MoS2 RRAM device is illustrated in Figure 5. An electrical RS operation (electronic migration by TE and electronic migration by Pd) has been conceived to form the S vacancy (Vs) filaments in the current paths [36]. Figure 5a shows the initial HRS with low concentrations of Vs distributed in the switching layer. When a forward voltage bias is applied to the TE, the switching layer collapses, and negatively charged S ions are accumulated under the TE. Through the SET process, the TiSx layer is formed by reacting with Ti, as shown in Figure 5b [37]. Additionally, the S ions, which are far from the TE, form Vs filaments due to an electrical field caught in Pd nanoparticles. When a conductive filament connects the TE and BE, the RRAM cells cause an LRS. The migration of S ions in the active channel layer occurs as follows. The S ions, which are far from TE, are not subject to the electronic TE effect. However, S ions are formed via the electric field effect of Pd nanoparticles [38]. When the TE and BE are connected via the lateral CFs, the RRAM devices cause the LRS. Additionally, TE and Pd electronic migration was observed effectively in the formation of lateral CFs at the switching channel interface rather than in the channel. When a negative voltage bias is applied to the TE, the S ions migrate into the MoS2 layer. As a result, the TiSx layer decreases in size, and the CFs rupture, causing a transition to an HRS (RESET process).

4.2. I–V Measurement

The fabricated Pd-MoS2 nanocomposite RRAM devices were measured at constant temperature and humidity with a vacuum probe station and semiconductor parameter analyzer (HP4156A). Bias was applied to the TE (size: 7000 μm × 2000 μm) with the BE (size: 7000 μm × 2000 μm) grounded throughout the measurement process. The compliance current (CC) was set at a value of 20 μA to suppress the overcurrent through the device. Figure 6a illustrates the measured current–voltage (I–V) characteristics of the RRAM device, consisting of an ideal switching layer with multilayer MoS2 (approximately two layers) and Pd nanoparticles (approximately 8 nm). Additionally, the parameters of the proposed RRAM include the total area (size: 1 cm2), the lateral CFs-formed switching channel area (size: 7000 μm × 4000 μm), and the MoS2/Ti contact interface width (channel width: 7000 μm). The normalized I–V curve was extracted by considering the channel width, which activated the formation of CFs in RRAM. Asymmetrical bipolar switching behavior was observed due to the Schottky barrier at the interface of multilayer MoS2 and the electrode. The Schottky contact at the MoS2/Ti interface prevented reverse current and allowed forward current to flow. In both the forward and reverse LRS, the rectifying current ratio (>6 × 10) was assessed by comparing the forward current (Iforward) of 0.612 μA at a forward voltage of +2 V with the reverse current (Ireverse) of 0.012 μA at a reverse voltage of −2 V. The selector-integrated RRAM controlled leakage current and exhibited self-rectifying operation. The RRAM with the Pd-nanoparticles embedded MoS2 channel structure demonstrated bipolar switching, with continuous SET and RESET sweeps and stable RS behavior (VSET = +4.75 V, VRESET = −4.1 V), as shown in Figure 6b. When extracting the SET and RESET currents, the ISET and IRESET were found to be less than 1 μA, indicating excellent memory performance, such as low-power operation, high memory window on/off ratio (≈103), and nanoscale device fabrication. Furthermore, it appears that the issue of leakage current due to cross-talk in the RRAM array cells was addressed, and high-density memory array stacking was feasible. Table 1 summarizes the comparison of the device stack structure, nanocomposites based MoS2, on/off ratio, and other parameters for the MoS2 switching layer RRAM.

5. Conclusions

This research work demonstrated an independent horizontal switching layer RRAM based on Pd-nanoparticle-decorated multilayer MoS2. Through the optimization of Pd nanoparticle (approximately 8 nm) deposition via DC sputtering and MoS2 nanosheet (approximately 1.44 nm) synthesis via CVD, we achieved the electrical migration of Vs and the formation of TiSx in the switching channel layer. The lateral-CF-based RRAM device reduced the switching dispersion and enhanced the local electric field through the Pd nanoparticle doping method. The MoS2/Ti contact formed sufficient Schottky barrier effects to exhibit non-linear I–V switching characteristics. The Pd-MoS2 RRAM, which self-integrated without the need for a selector device, achieved a high memory window (approximately 103) and an asymmetric LRS with a rectifying current ratio (>6 × 10). Therefore, it is important to optimize the Pd nanoparticle deposition density, doping time, deposition thickness, and process conditions (temperature, humidity), in addition to analyzing transition metal activation. Furthermore, it is essential to assess the effects of the reduced length and width of the RRAM device’s switching channel layer on the on/off current, operating voltage, and switching characteristics. Nanocomposite-based RRAM devices should address the leakage current due to cross-talk in nanoscale cell fabrication and high-density three demension stack arrays. Ultimately, the application of the 2D TMDs nanomaterial memristor platform presents a direction for emerging memory devices and intelligent memristor fields.

Author Contributions

Conceptualization, D.J. and M.-W.K.; methodology, D.J.; validation, D.J.; investigation, D.J.; resources, D.J.; writing—original draft preparation, D.J.; writing—review and editing, D.J.; visualization, D.J.; supervision, M.-W.K.; project administration, D.J. and M.-W.K.; funding acquisition, M.-W.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research work was supported by the National R&D Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science and ICT (NRF-2022M3I7A1078936), and this research work was supported by the “Regional Innovation Strategy (RIS)” through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (MOE) (2022RIS-005).

Data Availability Statement

The data presented in this study are available in this article.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Zhou, J.; Kim, K.-H.; Lu, W. Crossbar RRAM arrays: Selector device requirements during read operation. IEEE Trans. Electron Devices 2014, 61, 1369–1376. [Google Scholar] [CrossRef]
  2. Zhang, L.; Cosemans, S.; Wouters, D.J.; Groeseneken, G.; Jurczak, M.; Govoreanu, B. On the optimal ON/OFF resistance ratio for resistive switching element in one-selector one-resistor crosspoint arrays. IEEE Electron Device Lett. 2015, 36, 570–572. [Google Scholar] [CrossRef]
  3. Wang, X.-F.; Tian, H.; Zhao, H.-M.; Zhang, T.-Y.; Mao, W.-Q.; Qiao, Y.-C.; Pang, Y.; Li, Y.-X.; Yang, Y.; Ren, T.-L. Interface engineering with MoS2–Pd nanoparticles hybrid structure for a low voltage resistive switching memory. Small 2018, 14, 1702525. [Google Scholar] [CrossRef]
  4. Govoreanu, B.; Crotti, D.; Subhechha, S.; Zhang, L.; Chen, Y.Y.; Clima, S.; Paraschiv, V.; Hody, H.; Adelmann, C.; Popo, M.; et al. A-VMCO: A novel forming-free, self-rectifying, analog memory cell with low-current operation, nonfilamentary switching and excellent variability. In Proceedings of the 2015 Symposium on VLSI Technology (VLSI Technology), Kyoto, Japan, 16–18 June 2015; IEEE: New York, NY, USA, 2015. [Google Scholar]
  5. Luo, Q.; Zhang, X.; Hu, Y.; Gong, T.; Xu, X.; Yuan, P.; Ma, H.; Dong, D.; Lv, H.; Long, S.; et al. Self-rectifying and forming-free resistive-switching device for embedded memory application. IEEE Electron Device Lett. 2018, 39, 664–667. [Google Scholar] [CrossRef]
  6. Chen, Y.-C.; Eshraghian, J.K.; Shipley, I.; Weiss, M. Analog synaptic behaviors in carbon-based self-selective RRAM for in-memory supervised learning. In Proceedings of the 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), San Diego, CA, USA, 1 June 2021–4 July 2021; IEEE: New York, NY, USA, 2021. [Google Scholar]
  7. Bai, Y.; Wu, H.; Wang, K.; Wu, R.; Song, L.; Li, T.; Wang, J.; Yu, Z.; Qian, H. Stacked 3D RRAM array with graphene/CNT as edge electrodes. Sci. Rep. 2015, 5, 13785. [Google Scholar] [CrossRef]
  8. Ye, C.; Wu, J.; He, G.; Zhang, J.; Deng, T.; He, P.; Wang, H. Physical mechanism and performance factors of metal oxide based resistive switching memory: A review. J. Mater. Sci. Technol. 2016, 32, 1–11. [Google Scholar] [CrossRef]
  9. Ryu, J.H.; Kim, S. Artificial synaptic characteristics of TiO2/HfO2 memristor with self-rectifying switching for brain-inspired computing. Chaos Solitons Fractals 2020, 140, 110236. [Google Scholar] [CrossRef]
  10. Rodriguez-Fernandez, A.; Aldana, S.; Campabadal, F.; Sune, J.; Miranda, E.; Jimenez-Molinos, F.; Roldan, J.B.; Gonzalez, M.B. Resistive switching with self-rectifying tunability and influence of the oxide layer thickness in Ni/HfO2/n+-Si RRAM devices. IEEE Trans. Electron Devices 2017, 64, 3159–3166. [Google Scholar] [CrossRef]
  11. Ryu, H.; Kim, S. Self-Rectifying Resistive Switching and Short-Term Memory Characteristics in Pt/HfO2/TaOx/TiN Artificial Synaptic Device. Nanomaterials 2020, 10, 2159. [Google Scholar] [CrossRef]
  12. Chand, U.; Huang, K.C.; Huang, C.Y.; Tseng, T.Y. Mechanism of nonlinear switching in HfO2-based crossbar RRAM with inserting large bandgap tunneling barrier layer. IEEE Trans. Electron Devices 2015, 62, 3665–3670. [Google Scholar] [CrossRef]
  13. Rahmani, M.K.; Ismail, M.; Mahata, C.; Kim, S. Effect of interlayer on resistive switching properties of SnO2-based memristor for synaptic application. Results Phys. 2020, 18, 103325. [Google Scholar] [CrossRef]
  14. Kim, H.D.; Kim, S.; Yun, M.J. Self-rectifying resistive switching behavior observed in Al2O3-based resistive switching memory devices with p-AlGaN semiconductor bottom electrode. J. Alloys Compd. 2018, 742, 822–827. [Google Scholar] [CrossRef]
  15. Tian, H.; Chen, H.-Y.; Gao, B.; Yu, S.; Liang, J.; Yang, Y.; Xie, D.; Kang, J.; Ren, T.-L.; Zhang, Y. Monitoring Oxygen Movement by Raman Spectroscopy of Resistive Random Access Memory with a Graphene-Inserted Electrode. Nano Lett. 2013, 13, 651. [Google Scholar] [CrossRef]
  16. Yu, S.; Wu, Y.; Wong, H.-S.P. Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory. Appl. Phys. Lett. 2011, 98, 103514. [Google Scholar] [CrossRef]
  17. Mullani, N.; Ali, I.; Dongale, T.D.; Kim, G.H.; Choi, B.J.; Basit, M.A.; Park, T.J. Improved resistive switching behavior of multiwalled carbon nanotube/TiO2 nanorods composite film by increased oxygen vacancy reservoir. Mater. Sci. Semicond. Process. 2020, 108, 104907. [Google Scholar] [CrossRef]
  18. Kim, Y.L.; Jung, H.Y.; Park, S.; Li, B.; Liu, F.; Hao, J.; Kwon, Y.K.; Jung, Y.J.; Kar, S. Voltage-switchable photocurrents in single-walled carbon nanotube silicon junctions for analog and digital optoelectronics. Nat. Photonics 2014, 8, 239–243. [Google Scholar] [CrossRef]
  19. Luo, Y.; Zhang, C. Pt-activated TiO2-MoS2 nanocomposites for H2 detection at low temperature. J. Alloys Compd. 2018, 747, 550–557. [Google Scholar] [CrossRef]
  20. Bhattacharjee, S.; Caruso, E.; McEvoy, N.; Coileáin, C.; O’Neill, K.; Ansari, L.; Duesberg, G.S.; Nagle, R.; Cherkaoui, K.; Gity, F.; et al. Insights into Multilevel Resistive Switching in Monolayer MoS2. ACS Appl. Mater. Interfaces 2020, 12, 6022–6029. [Google Scholar] [CrossRef]
  21. Shi, Y.; Zhou, W.; Lu, A.Y.; Fang, W.; Lee, Y.H.; Hsu, A.L.; Kim, S.M.; Kim, K.K.; Yang, H.Y.; Li, L.J.; et al. Van der Waals epitaxy of MoS2 layers using graphene as growth templates. Nano Lett. 2012, 12, 2784–2791. [Google Scholar] [CrossRef]
  22. Ma, X.; Shi, M. Thermal Evaporation Deposition of Few-layer MoS2 Films. Nano-Micro Lett. 2013, 5, 135–139. [Google Scholar] [CrossRef]
  23. Saini, S.; Dwivedi, A.; Lodhi, A.; Khandelwal, A.; Tiwari, S.P. Resistive switching behavior of TiO2/(PVP: MoS2) nanocomposite hybrid bilayer in rigid and flexible RRAM devices. Mem.-Mater. Devices Circuits Syst. 2023, 4, 100029. [Google Scholar] [CrossRef]
  24. Das, N.S.; Mitra, S.; Chowdhury, A.; Roy, A. Nonvolatile memristive devices based on in situ functionalized layered rGO-MoS2 nanocomposites. ECS J. Solid State Sci. Technol. 2022, 11, 071003. [Google Scholar]
  25. Bhattacharjee, S.; Sarkar, P.K.; Prajapat, M.; Roy, A. Electrical reliability, multilevel data storage and mechanical stability of MoS2-PMMA nanocomposite-based non-volatile memory device. J. Phys. D Appl. Phys. 2017, 50, 265103. [Google Scholar] [CrossRef]
  26. Liu, C.-Y.; Huang, J.-J.; Lai, C.-H. Resistive switching characteristics of a Pt nanoparticle-embedded SiO2-based memory. Thin Solid Film. 2012, 529, 107–110. [Google Scholar] [CrossRef]
  27. Lin, M.H.; Wu, M.C.; Lin, C.H.; Tseng, T.Y. Resistive switching characteristics and mechanisms of Pt-embedded SrZrO3 memory devices. J. Appl. Phys. 2010, 107, 124117. [Google Scholar] [CrossRef]
  28. Tsai, Y.T.; Chang, T.C.; Lin, C.C.; Chen, S.C.; Chen, C.W.; Sze, S.M.; Yeh, F.S.; Tseng, T.Y. Influence of nanocrystals on resistive switching characteristic in binary metal oxides memory devices. Electrochem. Solid-State Lett. 2010, 14, H135. [Google Scholar] [CrossRef]
  29. Luo, Y.; Zhang, C.; Zheng, B.; Geng, X.; Debliquy, M. Hydrogen sensors based on noble metal doped metal-oxide semiconductor: A review. Int. J. Hydrogen Energy 2017, 42, 20386–20397. [Google Scholar] [CrossRef]
  30. Cho, U.J.; Jang, D.; Jeon, Y.; Kim, T.; Jo, B.; Kim, R.; Kim, Y.; Kwon, M.-W. A Palladium-Deposited Molybdenum Disulfide-Based Hydrogen Sensor at Room Temperature. Appl. Sci. 2023, 13, 10594. [Google Scholar] [CrossRef]
  31. Lee, C.; Yan, H.; Brus, L.E.; Heinz, T.F.; Hone, J.; Ryu, S. Anomalous lattice vibrations of single-and few-layer MoS2. ACS Nano 2010, 4, 2695–2700. [Google Scholar] [CrossRef]
  32. Han, T.; Liu, H.; Wang, S.; Chen, S.; Li, W.; Yang, X.; Cai, M.; Yang, K. Probing the Optical Properties of MoS2 on SiO2/Si and Sapphire Substrates. Nanomaterials 2019, 9, 740. [Google Scholar] [CrossRef]
  33. Chow, P.K.; Singh, E.; Viana, B.C.; Gao, J.; Luo, J.; Li, J.; Lin, Z.; Elías, A.L.; Shi, Y.; Wang, Z. Wetting of mono and few-layered WS2 and MoS2 films supported on Si/SiO2 substrates. ACS Nano 2015, 9, 3023–3031. [Google Scholar] [CrossRef]
  34. Rehman, M.M.; Rehman, H.M.M.U.; Gul, J.Z.; Kim, W.Y.; Karimov, K.S.; Ahmed, N. Decade of 2D-materials-based RRAM devices: A review. Sci. Technol. Adv. Mater. 2020, 21, 147–186. [Google Scholar] [CrossRef]
  35. Zhang, Z.; Wang, F.; Hu, K.; She, Y.; Song, S.; Song, Z.; Zhang, K. Improvement of resistive switching performance in sulfur-doped HfOx-based RRAM. Materials 2021, 14, 3330. [Google Scholar] [CrossRef]
  36. Li, D.; Wu, B.; Zhu, X.; Wang, J.; Ryu, B.; Lu, W.D.; Lu, W.; Liang, X. MoS2 memristors exhibiting variable switching characteristics toward biorealistic synaptic emulation. ACS Nano 2018, 12, 9240–9252. [Google Scholar] [CrossRef] [PubMed]
  37. Liu, L.; Wang, Y.; Chen, W.; Ren, S.; Guo, J.; Kang, X.; Zhao, X. Robust resistive switching in MoS2-based memristor with Ti top electrode. Appl. Surf. Sci. 2022, 605, 154698. [Google Scholar] [CrossRef]
  38. Monama, N.O. Electronic Structure Studies of Pallandium Sulphide (PdS) and Platinum (pt) Ternaries. Master’s Thesis, University of Limpopo, Polokwane, South Africa, 2008. [Google Scholar]
  39. Bessonov, A.A.; Kirikova, M.N.; Petukhov, D.I.; Allen, M.; Ryhänen, T.; Bailey, M.J.A. Layered memristive and memcapacitive switches for printable electronics. Nat. Mater. 2014, 14, 199–204. [Google Scholar] [CrossRef] [PubMed]
  40. Sangwan, V.K.; Jariwala, D.; Kim, I.S.; Chen, K.-S.; Marks, T.J.; Lauhon, L.J.; Hersam, M.C. Gate-tunable memristive phenomena mediated by grain boundaries in single-layer MoS2. Nat. Nanotechnol. 2015, 10, 403–406. [Google Scholar] [CrossRef]
Figure 1. Illustration of structures, switching mechanisms, and various materials for RRAM device applications.
Figure 1. Illustration of structures, switching mechanisms, and various materials for RRAM device applications.
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Figure 2. (a) The schematic diagram of the lateral-CF-based RRAM device with the Pd nanoparticles/MoS2 nanosheet switching layer between the Ti/Au top electrode and Ti/Au bottom electrode; (b) The structure of monolayer MoS2 (0.72 nm) or multilayer MoS2 (1.44 nm) lattice layer; (c) Deposition rates of various metals (Ti, Pd, and Au) via DC sputtering; (d) The process flow chart illustrating the fabrication of the proposed RRAM architecture.
Figure 2. (a) The schematic diagram of the lateral-CF-based RRAM device with the Pd nanoparticles/MoS2 nanosheet switching layer between the Ti/Au top electrode and Ti/Au bottom electrode; (b) The structure of monolayer MoS2 (0.72 nm) or multilayer MoS2 (1.44 nm) lattice layer; (c) Deposition rates of various metals (Ti, Pd, and Au) via DC sputtering; (d) The process flow chart illustrating the fabrication of the proposed RRAM architecture.
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Figure 3. (a) E2g band in-plane vibration of MoS2; (b) A1g band out-of-plane vibration of MoS2; (c) Raman spectrum of monolayer MoS2 and multilayer MoS2 on the SiO2/Si. Two vibrational modes (E2g and A1g) of MoS2.
Figure 3. (a) E2g band in-plane vibration of MoS2; (b) A1g band out-of-plane vibration of MoS2; (c) Raman spectrum of monolayer MoS2 and multilayer MoS2 on the SiO2/Si. Two vibrational modes (E2g and A1g) of MoS2.
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Figure 4. The scanning PL spectrum of both monolayer MoS2 and multilayer MoS2; (a) Wavelength; (b) Energy bandgap of the emitted photon.
Figure 4. The scanning PL spectrum of both monolayer MoS2 and multilayer MoS2; (a) Wavelength; (b) Energy bandgap of the emitted photon.
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Figure 5. Resistive switching (RS) behavior in the Pd nanoparticle coating multilayer MoS2 RRAM device is depicted. A schematic representation of the mechanisms for the lateral conductive filaments (CFs)-based RRAM device is shown: (a) High-resistance state (HRS, initial state); (b) Low-resistance state (LRS, after the SET process). The red and blue arrows indicate the direction of S-ion migration (electronic migration by TE and electronic migration by Pd).
Figure 5. Resistive switching (RS) behavior in the Pd nanoparticle coating multilayer MoS2 RRAM device is depicted. A schematic representation of the mechanisms for the lateral conductive filaments (CFs)-based RRAM device is shown: (a) High-resistance state (HRS, initial state); (b) Low-resistance state (LRS, after the SET process). The red and blue arrows indicate the direction of S-ion migration (electronic migration by TE and electronic migration by Pd).
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Figure 6. I–V characteristics of Au/Ti/Pd-MoS2/Ti/Au RRAM. (a) Self-rectifying RS operation. A rectifying current ratio was observed at Iforward (@ V = +2 V) and Ireverse (@ V = −2 V). A memory window (≈103) was extracted; (b) I–V characteristics of Pd-MoS2 RRAM for repeated voltage (−6 V to 6 V) sweeps. The switching channel width (7000 μm), switching channel length (4000 μm), and MoS2 thickness (1.44 nm) are depicted in the RRAM diagram.
Figure 6. I–V characteristics of Au/Ti/Pd-MoS2/Ti/Au RRAM. (a) Self-rectifying RS operation. A rectifying current ratio was observed at Iforward (@ V = +2 V) and Ireverse (@ V = −2 V). A memory window (≈103) was extracted; (b) I–V characteristics of Pd-MoS2 RRAM for repeated voltage (−6 V to 6 V) sweeps. The switching channel width (7000 μm), switching channel length (4000 μm), and MoS2 thickness (1.44 nm) are depicted in the RRAM diagram.
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Table 1. Summary of the performance parameters of the RRAM device with the type of TE and BE, MoS2-based switching layer, memory window, and rectifying current ratio.
Table 1. Summary of the performance parameters of the RRAM device with the type of TE and BE, MoS2-based switching layer, memory window, and rectifying current ratio.
TE and BESwitching LayerOn/Off RatioRectifying RatioRef.
ITO and ITOHfOx/Pd-MoS2≈102-[3]
Au and AuMoS2≈105-[28,29,30,31]
Au/Ti and Au/TiMoS2≈101-[36]
Ti and PtMoS2≈102-[37]
Ag and AgMoS2/MoOx≈106-[39]
Au and TiNHfOx/MoS2/TiOx≈106-[40]
Au/Ti and Ti/AuPd-MoS2≈103>6 × 10This work
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Jang, D.; Kwon, M.-W. Self-Rectifying Resistive Switching Memory Based on Molybdenum Disulfide for Reduction of Leakage Current in Synapse Arrays. Electronics 2023, 12, 4650. https://doi.org/10.3390/electronics12224650

AMA Style

Jang D, Kwon M-W. Self-Rectifying Resistive Switching Memory Based on Molybdenum Disulfide for Reduction of Leakage Current in Synapse Arrays. Electronics. 2023; 12(22):4650. https://doi.org/10.3390/electronics12224650

Chicago/Turabian Style

Jang, DongJun, and Min-Woo Kwon. 2023. "Self-Rectifying Resistive Switching Memory Based on Molybdenum Disulfide for Reduction of Leakage Current in Synapse Arrays" Electronics 12, no. 22: 4650. https://doi.org/10.3390/electronics12224650

APA Style

Jang, D., & Kwon, M. -W. (2023). Self-Rectifying Resistive Switching Memory Based on Molybdenum Disulfide for Reduction of Leakage Current in Synapse Arrays. Electronics, 12(22), 4650. https://doi.org/10.3390/electronics12224650

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