1. Introduction
In wireless communication systems, filters are essential to obtain accurate signals. The multiple standardization of today’s communication protocols makes the filter operating frequency band no longer monolithic, and considering compatibility, filters are required to achieve the filtering of harmful signals in different frequency ranges, so the bandwidth of the filter needs to be adjustable [
1,
2]. Currently, continuous-time analog filters often use an active resistor–capacitor structure, which is mainly composed of operational amplifiers, resistors R, and capacitors C, and can be applied to higher frequencies [
3,
4]. But in modern integrated circuit processes, the absolute values of resistors and capacitors are not precise enough, and there is a large absolute tolerance value, which limits the processing of high-precision analog signals. However, a switch-capacitor is used to simulate and replace the resistor so that the ratio of the capacitance is directly related to the accuracy of the signal, where the relative error between two capacitors can be minimized in a standard CMOS process [
5]. Moreover, considering the area of the silicon wafer, a small capacitor can be simulated and replace a large resistance resistor, which can save a lot of area. Therefore, the analog filter implemented in the form of switch-capacitor can achieve the advantages of low power consumption, high accuracy, and small area [
6,
7,
8]. At the same time, switch-capacitor filters also offer programmability options, making it possible to achieve modular and flexible architectures [
9]. References [
10,
11,
12,
13] describe the design of switch-capacitor filters, but only the filtering characteristics of a certain function are designed separately, the range of applications is limited, and the bandwidth is not adjustable. References [
14,
15,
16] describe the design with an adjustable bandwidth, but the range of adjustment is limited. In this paper, a second-order switch-capacitor filter based on the relationship between the transfer function characteristics of each function filter is designed by using switch-capacitor technology, which integrates low-pass, high-pass, band-pass, band-stop, and all-pass. The programmable capacitance ratio method can flexibly adjust the bandwidth over a wide range and achieve different quality factor
Q values. The second-order filter can be cascaded to form a higher-order filter.
The rest of this article is organized as follows: In
Section 2, a second-order filter structure that integrates low-pass, high-pass, band-pass, band-stop, and all-pass is constructed based on the transfer functions of each power filter.
Section 3 provides a specific design for the internal circuit and achieves adjustable bandwidth and
Q value design.
Section 4 completes the design of the fourth-order Butterworth low-pass filter by cascading the designed second-order filter.
Section 5 completes the chip testing results.
Section 6 and
Section 7 provide discussions and conclusions, respectively.
2. Circuit Structure
Starting from the theory of standard response of second-order filters, we study the response of second-order filters. It is not only important for the design of second-order filters, but also a fundamental requirement for designing high-order filters. Among all filtering function functions, the second-order filter response can be written as follows:
In the equation,
determines the functional characteristics of the filter, which is a polynomial of order 2 or less,
is the undamped natural frequency, and
is the damping coefficient. From the denominator of the above equation, it can be seen that this transfer function has two poles related to
:
When , the poles are two negative real poles, and the natural response of the system consists of two decaying exponential terms. The system is stable and is referred to as overdamping. When , a pair of conjugate negative poles will be generated, and the natural response of the system consists of a decaying sine term. The system is stable and is called underdamped. When , the poles appear on the imaginary axis, and the natural response of the system consists of a constant amplitude with a frequency of sine term. When , a pole appears in the right half plane, and the natural response of the system reveals that the system is unstable. Therefore, in filter design, we must ensure that to ensure the stability of the filter system.
The transfer functions of the second-order low-pass, band-pass, high-pass, band-stop, and all-pass filters in the s-domain are as follows:
low-pass:
band-pass:
high-pass:
band-stop:
all-pass:
where
is the DC gain,
is the cutoff frequency (the center frequency of the band-pass and the band-stop filter), also known as the −3 dB frequency,
Q is the quality factor of the filter, and
is a zero introduced by the band-stop filter. According to the relationship of
and
, band-stop filters can be divided into three types: standard band-stop, low-pass band-stop, and high-pass band-stop. If the zero frequency is the same as the pole frequency, it is a standard band-stop. If the zero frequency is greater than the pole frequency, it is a low-pass band-stop. If the zero frequency is less than the pole frequency, it is a high-pass band-stop.
From the above Formulas (3)–(7), it can be seen that their denominator contains the 2nd term of the complex frequency s, and an integrator circuit unit can generate the 1st term of the complex frequency
s, as well as the 1st term circuit of s containing the value of
Q. Therefore, the filter must contain two integrator circuits and arithmetic operation circuits. And the integrator circuits need to be connected in series to form the 2nd term of
s. From the molecular point of view, the simplest is the low-pass filter, the DC gain is extracted beyond the fractional equation, and the molecular term is only 1. From the comparison of Equations (3) and (4),
, it can be seen that the transfer function of the integrator circuit is
, which is the inverse function of the above equation, so the low-pass can be realized by the band-pass output and then through the integrator circuit. And the input signal and
of the band-pass signals attenuated are summed up, then standard band-stop filter can be realized, as shown in
Figure 1.
The corresponding s-domain transfer function is:
low-pass:
band-pass:
band-stop (standard type):
According to Formulas (5)–(7), it can be seen that the high-pass band-stop, high-pass, and all-pass filtered outputs can also be obtained through arithmetic operations on the low-pass and band-pass outputs, and their structures are shown in
Figure 2a,
Figure 2b and
Figure 2c, respectively.
In
Figure 2a, its corresponding s-domain transfer function is:
low-pass:
band-pass:
band-stop (high-pass type):
In
Figure 2b, its corresponding s-domain transfer function is:
low-pass:
band-pass:
high-pass:
In
Figure 2c, its corresponding s-domain transfer function is:
low-pass:
band-pass:
all-pass:
In order to save area, this article adopts the method of introducing taps at different positions in the same filter loop to achieve low-pass, high-pass, band-pass, band-stop, and all-pass filtering functions. The overall architecture is shown in
Figure 3, where the module mode select is controlled by the two bit control words M0 and M1 to control the conduction states of switches S1, S2, and S3. The corresponding relationships are shown in
Table 1, and the four operating modes, mode 1, mode 2, mode 3, and mode 4, correspond to the four filtering structures mentioned above. Compared to mode 1, mode 2 achieves the same functionality, but the
Q value in mode 2 is
that in mode 1, which improves the quality factor and has a wider range of adaptation. The dashed boxes in
Figure 3 represent the bandwidth and quality factor
Q adjustment sections, respectively.
In order to achieve the fast simulation speed of AC characteristics and easy observation of impact response in transient simulation, the overall architecture adopts active RC mode for the switch-capacitor module SCN and integrator module, and then replaces resistors with capacitors. In the circuit, all devices adopt an ideal model without parasitic parameters, and the operational amplifier gain is set to 100 dB without bandwidth limitation. The corresponding simulation results under the four operating modes are shown in
Figure 4. From the simulation results, it can be seen that this structure can fully achieve low-pass, high-pass, band-pass, band-stop, and all-pass filter functions.
4. Fourth-Order Butterworth Low-Pass Filter
Based on the above second-order filter characteristics, a fourth-order Butterworth low-pass filter is designed by cascading dual second-order filters, and its structure is shown in
Figure 22. The input signal is input from the IN port of Filter A, with the low-pass output LP of Filter A as the input of Filter B, and the low-pass output LP of Filter B as the output of a fourth-order low-pass filter. The digital module is the digital interface part, which realizes the selection of working modes and the assignment of
and quality factor
Q. The digital interface part is composed of address lines A3 to A0, data lines D1 and D0, and write enable control bit
. When the write enable bit is at a low level, data are written to the register corresponding to the address line, and when the write enable bit is high, the value in the register remains unchanged.The correspondence between register functions and address lines is shown in the
Table 2.
The configuration of the filter is as follows: the clock signal frequency
is 200 kHz, the operating mode is mode 1, and the cutoff frequency
is 2 kHz. Then the ratio of capacitance is determined in the two-stage filter according to Formula (43). Using the Filter Solutions software, we obtain the transfer function
of the filter, as well as the transfer functions
and
for each stage:
The internal circuit structures of Filter A and Filter B are the same.
Figure 23 shows the internal circuit of Filter A. Based on the requirements of
,
, and
, the component values and register configurations of each level of filter are determined, as shown in
Table 3 and
Table 4.
The selection of unit capacitance
is a compromise considering speed, layout area, matching degree, and noise. From the perspective of circuit speed and layout area, the smaller the unit capacitance, the better. However, if the capacitance per unit area is too small, it will have a negative impact on matching and noise. We know that the mismatch between capacitors (without considering layout factors) is inversely proportional to the capacitance area. In order to achieve sufficient matching, the side length of a unit capacitor is designed to be above 20
m. The KT/C noise is directly related to the capacitance value. During the switching capacitor charging process, a total root mean square noise voltage of
is generated on the capacitor charging resistor, where the component distributed within the cutoff frequency is
, and M is the oversampling rate. Taking into account the above performance parameters, the side length of
is selected as 30
m.
and
are adjustable capacitors that adjust the
Q value and bandwidth respectively. They can be obtained from Equations (51) and (52).
The fourth-order low-pass filter operates in mode 1, with an input frequency of 2 kHz sine wave and an amplitude of 2 V. Transient simulation is completed at a clock frequency of 200 kHz, and the simulation results are shown in
Figure 24.
6. Discussion
The test results show that our second-order switch-capacitor filter is powerful and can cover all functional filtering characteristics, including low-pass, high-pass, band-pass, band-stop, and all-pass functional filtering. In addition, it also has other advantages. On the chip, 64 level center frequency and 128 level Q value can be independently programmed and adjusted without affecting each other. When switching frequency points, different frequency points can be achieved without the need for many external devices, making adjustment flexible. It has a wide range of applications, with two independent second-order switch-capacitor filters on the chip that can be used separately or cascaded into a fourth-order filter. It can also use a weighted structure of chip and chip cascading to achieve higher-order filters. For example, in railway transportation systems, the track frequency shift automatic blocking system achieves an automatic blocking function through frequency shift signals, such as the UM71 standard uplink carrier frequency center frequencies of 2000 Hz and 2600 Hz, respectively, and the center frequencies of the downlink carrier frequency are 1700 Hz and 2300 Hz, respectively. Before detecting frequency shift signals, preprocessing of the signal is necessary. Usually, there are several methods to achieve switching between multiple frequency points in the low frequency range. The first method is to use a multi-stage frequency selection circuit in series. Due to the discreteness of device parameters, this method requires that all frequency selection circuits have a small deviation in the center frequency, making it difficult to change the multi-stage center frequency uniformly. The second method uses multiple analog switches, operational amplifiers, resistors, capacitors, and other discrete components to form an active filter for frequency selection. However, the circuit uses a large number of components, making parameter adjustment very difficult. Our universal filter has a dual second-order universal switch-capacitor active filter that is easy to program and can switch between different frequency points without the need for many external devices. It can be used as a signal filtering unit in the front end of railway frequency shift signal detection instruments. Currently, the chip has completed board level testing, and the next step will be system-level testing in the railway system.
Table 6 summarizes the performance comparison results between this article and other references, indicating that the switch-capacitor filter designed in this article has strong functionality. Foreign countries have always had an advantage in the field of high-precision, low-power, and low-offset switch-capacitor filters. In recent years, domestic research has mainly focused on high-order switch-capacitor filters, N-path switch-capacitor filters, and Gm-C filters, while there is relatively little research on universal filters. We have designed a second-order universal switch-capacitor filter, hoping to complete some work to fill the gap. However, we believe that we still need to optimize the switch-capacitor filter chip from the following aspects: (1) Power consumption. From the test results, using a ±5 V power supply voltage, the power consumption is 80 mW, which is higher than traditional continuous time filters. We need to further optimize the power consumption based on the characteristics of the process, cost, etc. (2) Optimization of internal circuit structure. As one of the important units, the performance of the operational amplifier directly affects the performance of the switch-capacitor filter. From the design of the operational amplifier structure, the structure is simple, but the bandwidth is small. For CMOS operational amplifiers, the bandwidth will be limited by the characteristic frequency
of the MOS transistor, where the characteristic frequency
is proportional to the gate length
of the MOS transistor. We adopt the 24 V high-voltage transistor process, where the minimum gate length of NMOS is 3
m, while the minimum gate length of PMOS is 4
m, which greatly limits the bandwidth of the amplifier. The next step is to optimize the structure to achieve a high bandwidth operational amplifier.